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path: root/src/usr/intr
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* Automatically include config.hDan Crowell2019-12-061-1/+0
* Modify INTRP Initialization Order to route LSI interrupts over PSHIHBBill Hoffa2019-11-081-7/+7
* INTRP HW Workaround for Clockgating IssueBill Hoffa2019-03-272-9/+23
* Clear INT_CQ related firs after reseting INTRRP logic in HBChristian Geddes2018-11-012-0/+96
* Remove printTimaInfo function until we figure out how to avoid issuesChristian Geddes2018-10-112-37/+0
* intr: Use the correct trace handle in intrrp TRACDCOMP callsAndrew Jeffery2018-09-251-3/+3
* Support HB running in SMFDean Sanner2018-09-242-3/+8
* Don't Process Interrupts During ShutdownIlya Smirnov2018-09-192-1/+42
* Additional tracing for shutdown eventsMatt Derksen2018-09-121-1/+1
* Only unmask source on proc targ passed to unmask function in intrrpChristian Geddes2018-08-012-101/+146
* Lookup remote node's HRMOR value save from prev boot during MPIPLChristian Geddes2018-07-271-1/+19
* Add TIMA and IC LSI ESB states to memdiag hang debug outputChristian Geddes2018-07-262-1/+47
* Mark IPC_DATA_INVALID Errors as InformationalIlya Smirnov2018-07-191-2/+2
* Handle inter-node HRMOR correctly on 3/4 nodesDean Sanner2018-07-181-3/+3
* Need to add CPU_SPR_HRMOR when calculating HB reserved mem limits.Thi Tran2018-07-121-2/+1
* Print out MBOX/INTR state info on DMA request hangChristian Geddes2018-07-052-4/+184
* Leverage INTRP fully for SBE PSU Interrupt HandlingBill Hoffa2018-06-282-71/+3
* Add kernel debug trace to Invalid IPC Message ErrorsBill Hoffa2018-06-251-0/+4
* Multinode MPIPL INTRP Initialization ChangesBill Hoffa2018-06-082-23/+38
* Fixes to node IPC messaging to handle non-zero base addressesBrian Bakke2018-06-071-7/+40
* FFDC enhancements for core activate failsDan Crowell2018-05-191-3/+1
* Implement Interrupt Resource Provider Init for MPIPL Multi-Node SystemsBill Hoffa2018-05-072-615/+113
* Use the effective chip and group ids to calc mmio addrRichard J. Knight2018-05-071-12/+12
* Properly handle INTRP unmask error handlingBill Hoffa2018-02-141-2/+12
* Re-order INTR/IPC shutdown message handlingBill Hoffa2018-02-141-10/+14
* Updates to make multinode IPC workDean Sanner2018-02-131-3/+9
* Multi-Drawer (IPC) Interrupt/Messaging SupportBill Hoffa2018-01-251-53/+56
* Interrupt Handling Flow Change to Prevent DeadlockBill Hoffa2018-01-152-117/+206
* Set hostboot_mode bit on P3PC interrupt scom reg during intrrp initChristian Geddes2017-12-081-1/+48
* Secure Boot: Blacklist: Init PSI bridge BAR and FSP BAR properly for securityNick Bofferding2017-11-302-0/+69
* Re-add errlog cleanupChristian Geddes2017-10-131-0/+6
* Clear INT_PC registers on MPIPL when initializing intrrpChristian Geddes2017-10-092-6/+42
* Set variables to nullptr after they are deletedChristian Geddes2017-09-251-0/+6
* Ability to boot in SMT1 or SMT2 in HostbootDean Sanner2017-09-141-4/+22
* Fix race condition between INTR and SBEIODan Crowell2017-07-312-61/+23
* Set fused core enabled on the thread cntxt reg after resetting XIVE HWcrgeddes2017-07-132-0/+35
* Move disabling PSI CEC interrupts to the common path for INT resetcrgeddes2017-07-112-6/+20
* Enable LSI interrupt after masking sources in interrupt service initcrgeddes2017-06-201-0/+2
* Fix PVR check for Nimbus DD1Dan Crowell2017-05-111-2/+2
* Update the interrupt routing for the Slave proccrgeddes2017-05-081-0/+13
* Remove deprecated attribute FABRIC_NODE_IDPrachi Gupta2017-04-271-4/+4
* Disable resetting on INT unit during MPIPLcrgeddes2017-04-171-2/+15
* Create PVR routines to handle DD2 changesDan Crowell2017-03-091-5/+8
* Hostboot Base TCE SupportMike Baiocchi2017-03-081-23/+0
* Fix up interrupt init process for MPIPLcrgeddes2017-02-222-24/+107
* Need to access XIVE Thread management area with master threadDean Sanner2017-01-121-1/+10
* Clear out interrupt mask list after resetting XIVE unit for MPIPLcrgeddes2016-12-211-0/+4
* Disable PSI INT during handoff to payloadDean Sanner2016-12-211-0/+7
* Fix bug in MPIPL path for INTP initcrgeddes2016-12-201-3/+6
* Perform Interrupt ACK + EOI on Master Core Thread 0Bill Hoffa2016-12-151-3/+33
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