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* Implement Interrupt Resource Provider Init for MPIPL Multi-Node SystemsBill Hoffa2018-05-072-615/+113
* Use the effective chip and group ids to calc mmio addrRichard J. Knight2018-05-071-12/+12
* Properly handle INTRP unmask error handlingBill Hoffa2018-02-141-2/+12
* Re-order INTR/IPC shutdown message handlingBill Hoffa2018-02-141-10/+14
* Updates to make multinode IPC workDean Sanner2018-02-131-3/+9
* Multi-Drawer (IPC) Interrupt/Messaging SupportBill Hoffa2018-01-251-53/+56
* Interrupt Handling Flow Change to Prevent DeadlockBill Hoffa2018-01-152-117/+206
* Set hostboot_mode bit on P3PC interrupt scom reg during intrrp initChristian Geddes2017-12-081-1/+48
* Secure Boot: Blacklist: Init PSI bridge BAR and FSP BAR properly for securityNick Bofferding2017-11-302-0/+69
* Re-add errlog cleanupChristian Geddes2017-10-131-0/+6
* Clear INT_PC registers on MPIPL when initializing intrrpChristian Geddes2017-10-092-6/+42
* Set variables to nullptr after they are deletedChristian Geddes2017-09-251-0/+6
* Ability to boot in SMT1 or SMT2 in HostbootDean Sanner2017-09-141-4/+22
* Fix race condition between INTR and SBEIODan Crowell2017-07-312-61/+23
* Set fused core enabled on the thread cntxt reg after resetting XIVE HWcrgeddes2017-07-132-0/+35
* Move disabling PSI CEC interrupts to the common path for INT resetcrgeddes2017-07-112-6/+20
* Enable LSI interrupt after masking sources in interrupt service initcrgeddes2017-06-201-0/+2
* Fix PVR check for Nimbus DD1Dan Crowell2017-05-111-2/+2
* Update the interrupt routing for the Slave proccrgeddes2017-05-081-0/+13
* Remove deprecated attribute FABRIC_NODE_IDPrachi Gupta2017-04-271-4/+4
* Disable resetting on INT unit during MPIPLcrgeddes2017-04-171-2/+15
* Create PVR routines to handle DD2 changesDan Crowell2017-03-091-5/+8
* Hostboot Base TCE SupportMike Baiocchi2017-03-081-23/+0
* Fix up interrupt init process for MPIPLcrgeddes2017-02-222-24/+107
* Need to access XIVE Thread management area with master threadDean Sanner2017-01-121-1/+10
* Clear out interrupt mask list after resetting XIVE unit for MPIPLcrgeddes2016-12-211-0/+4
* Disable PSI INT during handoff to payloadDean Sanner2016-12-211-0/+7
* Fix bug in MPIPL path for INTP initcrgeddes2016-12-201-3/+6
* Perform Interrupt ACK + EOI on Master Core Thread 0Bill Hoffa2016-12-151-3/+33
* INTRP Reset Workaround for XIVE HW Reset Not WorkingBill Hoffa2016-12-122-137/+236
* Update INTP init for MPIPL pathcrgeddes2016-11-112-30/+94
* Create function to handle External InterruptsBill Hoffa2016-11-052-76/+83
* Mask Interrupt Sources Prior to Resetting Interrupt LogicBill Hoffa2016-10-191-3/+15
* Multi-Proc Interrupt Support with Remote LSIsBill Hoffa2016-10-072-210/+653
* Handle Multiple LSI Interrupts SimultaneouslyBill Hoffa2016-09-261-31/+46
* Refactor Polling for PSU Interrupt handling by INTRPBill Hoffa2016-08-102-5/+5
* Close timing window between PSUDD and INTRDean Sanner2016-07-071-7/+9
* PSIHB Interrupt Support for Multi-CoreBill Hoffa2016-06-291-3/+37
* Disable PSI Interrupts on PSIHB during initBill Hoffa2016-06-022-14/+28
* XIVE CAMS is 1 byte access, disable VPC Pull errorDean Sanner2016-05-263-4/+120
* Enable waking threads on master core with doorbell interruptsBill Hoffa2016-05-171-9/+9
* Doorbell Interrupt Base Support for Core/Thread WakeupBill Hoffa2016-05-062-104/+102
* Use SBE for scoms to slave chipsMatt Derksen2016-05-041-0/+1
* Add INTRP message handling for UNREGISTER_MSG_QBill Hoffa2016-04-272-3/+30
* Remove PSIHB ESB BAR disable workaround for simulatorBill Hoffa2016-04-211-6/+0
* P9 PSIHB Base Interrupt SupportBill Hoffa2016-03-303-862/+1012
* Update constants and comments for P9 PIR formatDan Crowell2016-02-292-28/+30
* Investigate graceful shutdown path anomoliesRichard J. Knight2015-04-241-1/+1
* P8+ VPO - HB supports to istep 7 for NVLINK testThi Tran2015-01-161-0/+10
* Fix spelling mistakes using codespell.Patrick Williams2015-01-152-8/+8
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