| Commit message (Collapse) | Author | Age | Files | Lines |
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The existing code path would send 2 master stops, one in
i2cForceResetAndUnlock() and another in i2cSendSlaveStop().
The one in i2cSendSlaveStop() can cause IPL failures if the
VSPD voltage is not online for a centaur I2C port because
it requires checking that the I2C bus is "free" (pulled up)
before reporting success.
Change-Id: I435f4e738d1c000e23167221a42f6747f0dce93b
Signed-off-by: Robert Lippert <rlippert@google.com>
Signed-off-by: William A. Kennington III <wak@google.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36263
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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- Security registers prevent usage of diag mode
- FSI to host engine mapping changes in P9
Change-Id: I1b88e73cc1cdb6c01a24710916fdfe71cd664b48
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34926
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
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-This is the typical port where the TPM is connected,
and the extra security features for locality 4 interfere
with the diag mode reset
Change-Id: I5dddc8263d6a75e246ce3e2043037ab9f69555ff
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34544
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
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Change-Id: I7dd49b51f233a7862907f236813f2ed26da455c5
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32616
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
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New interfaces added:
I2C::getDeviceInfo()
IPMI::getBmcInfo()
CONSOLE::getUartInfo()
New attributes:
SYSTEM_FAMILY
SYSTEM_TYPE
Change-Id: I7d1a018c01067a19b8a66f853e11922c910fcc54
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30405
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Elizabeth K. Liner <eliner@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Updated i2c master code to support 4 engines in P9 and scom offset changes
Updated attributes to support 4 engines and to match existing simics models
Change-Id: I29aeb98274407777a59f11404f45d08ecadbeab2
RTC: 153481
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24211
Tested-by: Jenkins Server
Tested-by: FSP CI Jenkins
Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I8355693b0ee16dfbaef5361006b564c4b59b714d
RTC:147385
ForwardPort: yes
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22859
Tested-by: Jenkins Server
Tested-by: FSP CI Jenkins
Reviewed-by: Matthew A. Ploetz <maploetz@us.ibm.com>
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-DDR4 has 512-byte EEPROM with 2 256-byte pages.
This commit contains the necessary page switching
logic to support this.
Change-Id: Iaa8e3e344def98b71d6a9e9387c5e0d9137a0397
RTC:137707
ForwardPort: yes
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/797
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Jenkins OP Build CI
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Tested-by: Jenkins OP HW
Tested-by: FSP CI Jenkins
Reviewed-by: Matthew A. Ploetz <maploetz@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/871
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Change-Id: I39e1d7fa7854be7425831e657c82a4a3ebdeebf2
RTC:137627
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/777
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Includes changes for nimbus.por
Making recent Simics usable by Hostboot
Removing portions of code not yet ready
Basic LPC read/write
Change-Id: Ic40a9613934fab7bb6a28a8100685496246bb5ea
RTC:132170
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21931
Tested-by: Jenkins Server
Reviewed-by: WILLIAM G. HOFFA <wghoffa@us.ibm.com>
Reviewed-by: Christian Geddes <crgeddes@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Support added for TPM DD2.0
Added call to host_update_master_tpm during host_discover_targets istep
host_update_master_tpm istep performs TPM_STARTUP on TPM
Change-Id: Ie9c232ed6ecf72da58c40df726fe1deaec5af053
RTC: 125287
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/18075
Tested-by: Jenkins Server
Reviewed-by: STEPHEN M. CPREK <smcprek@us.ibm.com>
Tested-by: Jenkins OP Build CI
Tested-by: Jenkins OP HW
Tested-by: FSP CI Jenkins
Reviewed-by: Timothy R. Block <block@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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This commit adds more information into the two uint64_t user data
sections for certain error logs, including I2C Master HUID, engine,
port, and bus speed.
Change-Id: Ia2c91795c22619931c37b52fa4ff2091cb5d5ef3
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/20060
Tested-by: Jenkins Server
Tested-by: Jenkins OP Build CI
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: FSP CI Jenkins
Tested-by: Jenkins OP HW
Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com>
Reviewed-by: WILLIAM G. HOFFA <wghoffa@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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While the processor and centaur I2C code is common, the centaur only
has one I2c master/engine (engine 0), where as the processor has two.
This commit removes engine 1 from the I2C Master list for Centaurs
in the devtree.
Change-Id: Icd4da919a126372949d30aa4b07d7b87ecf151d4
RTC: 129126
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/18046
Tested-by: Jenkins Server
Reviewed-by: William H. Schwartz <whs@us.ibm.com>
Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Before setting up the I2C Masters for PHYP there is now a check that
the engine is in a good state. If it is in a bad state, an I2C reset
is issued in an attempt to recover the master before setting it up.
Change-Id: Ib023366fc416bb9d5de9fcd0b885c879f22b918f
CQ: SW295172
Backport: release-fips830
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/17524
Tested-by: Jenkins Server
Reviewed-by: STEPHEN M. CPREK <smcprek@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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This commit removes a workaround that limited all I2C resets to
just engine 0 on processors. (Centaurs only use engine 0). Now,
if there is a device off of one of the buses connected to engine 1
(port 0, 1, or 2), then a reset will be issued on the bus.
Change-Id: Id2091b44d931be5321420c091fe91a803cc5df65
CQ: SW300339
Backport: release-fips830
CMVC-Prereq: 955865
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/17309
Tested-by: Jenkins Server
Reviewed-by: STEPHEN M. CPREK <smcprek@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: WILLIAM G. HOFFA <wghoffa@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Previously, Hostboot code was only setting the I2C Master Engine
mode registers if hostboot thought that there was a device off of
at least one of the ports connected to the master/engine. This
commit now sets all of the mode registers (master engines 0 and 1)
for all of the processors in the system.
Change-Id: I1371fb12f44c675b076d2e094e6513f74aff5856
CQ: SW302964
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/16995
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: WILLIAM G. HOFFA <wghoffa@us.ibm.com>
Reviewed-by: STEPHEN M. CPREK <smcprek@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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This commit fixes 2 bugs where the full "Force Reset and Unlock"
I2C reset procedure used to both avoid and recover from I2C Bus
Arbitration Lost errors was not being performed correctly on any
ports but port 0.
Change-Id: Ie967d81917e9b942d5cb516856075ebdb5029487
CQ: SW297864
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/16842
Reviewed-by: WILLIAM G. HOFFA <wghoffa@us.ibm.com>
Tested-by: Jenkins Server
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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There are multiple uses for the I2C Switches in the misc_args_t
struct used in I2C operations. The struct was not defaulting the
switches value to zero and there were negative consequences of this
early in the IPL for the i2cPresence() function.
Fixes open-power/hostboot#18
Change-Id: I83d34770ff04cfe31bf07b320d8821c8fa80c705
CQ: SW2999529
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/16447
Tested-by: Jenkins Server
Reviewed-by: MATTHEW A. PLOETZ <maploetz@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Fixed a bug with the initial commit that when I2C Reset is called for
procesors, the reset is only done on I2C Master Engine 0.
Change-Id: I7ac5f6bee5fee9beb286b029b7fdab187685460b
CQ: SW300339
Backport: release-fips830
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/16637
Tested-by: Jenkins Server
Reviewed-by: STEPHEN M. CPREK <smcprek@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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When I2C Reset is called for procesors, the reset is only done on
I2C Master Engine 0 with this change.
Change-Id: I6df6181d5dc7b24a3cd270930a50e52023eb1d73
CQ: SW300339
Backport: release-fips830
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/16547
Tested-by: Jenkins Server
Reviewed-by: STEPHEN M. CPREK <smcprek@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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This commit removes the call for i2cResetActiveMasters() during istep
6.3 host_init_fsi for POWER Systems. This call was attempting to
reset the Slace Processors' FSI-based I2C Engines and was intermittently
causing problems. It was determined this call was not needed for POWER
systems as the FSP should have the system initialized properly for Hostboot.
Change-Id: Ic6087ecd5ae82ea6a2807017e1d584e8c4072f9f
CQ: SW296222
Backport: release-fips830
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/16017
Tested-by: Jenkins Server
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: Ibc78e9d1545ba6f973cc09185b90f08653d56111
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/15785
Tested-by: Jenkins Server
Reviewed-by: Joshua P. Rispoli <jprispol@us.ibm.com>
Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Update i2cSetupMasters similar to i2cResetActiveMasters to accept a parameter
to select procs and/or mem buffs and host and/or fsi engines.
Change-Id: I943248e01acd3254acf5635a284a05c827645123
RTC: 115834
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/15552
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Report all I2C masters, busses and end devices in the devtree.
Current support includes the following devices:
-Processor module vpd (primary and backup)
-Processor SBE SEEPROM (x2)
-Memory buffer VPD
-DIMM SPD
Change-Id: Ic0e08c208331ce9701de27111cc2e9f54a81fcf7
RTC: 117996
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/15203
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Michael Baiocchi <baiocchi@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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This commit cleans up some changes for recent commits for Stories
116439 and 115834. No major functionality was added.
Change-Id: I1675a749eda74454631629ca780013f90e70e8d3
RTC: 116439
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/15052
Tested-by: Jenkins Server
Reviewed-by: WILLIAM G. HOFFA <wghoffa@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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- See https://github.com/lucasdemarchi/codespell
Change-Id: I03e102d1ebb9473b6226fa9b6edb684fa0218a2f
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/15031
Tested-by: Jenkins Server
Reviewed-by: STEPHEN M. CPREK <smcprek@us.ibm.com>
Reviewed-by: Zane Shelley <zshelle@us.ibm.com>
Reviewed-by: Brian Silver <bsilver@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: I28722938782322e1a378968656e4b2573aa43ccf
RTC: 119764
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/14959
Tested-by: Jenkins Server
Reviewed-by: Michael Baiocchi <baiocchi@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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This change supports resetting any I2C Master of a processor or
memory buffer that has a device off of one of its engines.
Change-Id: I2849d3c3d1901489310547ad06ba568aaab32a60
RTC: 115834
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/14967
Tested-by: Jenkins Server
Reviewed-by: WILLIAM G. HOFFA <wghoffa@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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PHYP doesn't use the Centaur engines and Opal will set them up
themselves so HB doesn't need to do this. The immediate
motivation to remove this is to avoid a potential ibscom
collision between OCC and HB.
Change-Id: I7086e6e5105eb0d40f4727e695e49c5c5d486eb2
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/14932
Tested-by: Jenkins Server
Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Also contains I2C attribute work-arounds.
Change-Id: I6d1164cfefe4edcc6631e8cf51c288ce25489fab
RTC: 113492
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/13665
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Michael Baiocchi <baiocchi@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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This code defaults all slave processors to use FSI I2C access method at
the start of the IPL. Then in istep 6.12 it calls a new function
i2cSetAccessMode() to set them to Host I2C access method for the rest of the
IPL.
Change-Id: Ib13d274aa9a64a533bce79d34e75c0bee4d3e5c8
RTC: 116439
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/14590
Tested-by: Jenkins Server
Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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RTC:117048
Change-Id: Ie63fb413cb9efb9d1ea450467efa500613939af2
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/14494
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Added i2c bus reset (force i2c reset) to isteps 6.3 and 6.12.
Change-Id: I35a95b4fdf6c045906f3620262c23ef4ec2baef2
RTC:116374
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/14493
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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This commit adds additional MRW parsing and a new I2C Bus attribute
to pull the needed information from the MRWs for EEPROM and I2C operations.
Change-Id: I28abec9a04fe27502cab02790c00b15329a8b364
RTC: 80614
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/14298
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Tested-by: Jenkins Server
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With the code change for FSI I2C support scom registers are now
calculated. There was a case in i2cSetupMasters() where the engine
parameter was not set and it created an errant scom register access.
This case has been fixed.
Change-Id: I1fd2e25720d86161142fccae8acd0a7924d22be5
RTC: 109926
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/14305
Reviewed-by: STEPHEN M. CPREK <smcprek@us.ibm.com>
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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This commit adds FSI I2C Device Driver read and write support. The
majority of interfaces are common, with the main difference being the
registers that are being used. The FSI Device Driver also had to
be udpated to support non-4-byte reads and writes.
Change-Id: Ife3cfaedc6f23a161192710d1e9f1e74a942d399
RTC: 109926
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/13300
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: ANIRUDH BAGEPALLI <abagepa@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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This commit add a method to manually toggle the clock and data lines
to reset the I2C bus that is locked. This method will also reset the
slave I2C chips.
Change-Id: I6353dd24f86ca9b0a649875b11bae47035887c84
RTC:97439
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/13659
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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This commit moves pcie power off prior to starting PCIe clocks.
It also created i2cResetMaster() function to be called before
SBE Update in istep 9.
Change-Id: I330a5cabf1e778c1354aa3d93d4dedfded7bf013
CQ: SW276751
Backport: release-fips820
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/13235
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: I1e909145a28c4cce750baee5d79f8f1672235ba9
RTC: 106255
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/12841
Tested-by: Jenkins Server
Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: I5664587b4f889099290ef50d50fa9ce5e580e1eb
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/11167
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Updates to I2C Device Driver code to base its settings off of
system's Nest Frequency.
Change-Id: Iefc556a7d868544d57dd545dc3c41e4bad9d01be
Backport: release-fips810
RTC: 96656
CQ: SW253157
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/9574
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: I695a38ae88583a052cae19b930eb53171f8fab2b
RTC:94993
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/9050
Tested-by: Jenkins Server
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: Michael Baiocchi <baiocchi@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Currently Hostboot only supports I2C interactions with the SBE
SEEPROMs which can run at the faster 1MHz bus speed. Therefore,
I am changing the default to run at 1MHz while keeping the ability
to set the speed to 400KHz that PHYP needs (via i2cSetupMaster()).
Change-Id: I99eb2933502803816e52d1c88d7570bb11319c47
RTC: 80614
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/8413
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Callouts were added to I2C, EEPROM, MVPD and CVPD (via IPVPD code),
and SPD code.
Change-Id: Ibcb14ea3a228a5175b6faed06189286b0e0526bc
RTC: 69113
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/7966
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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This commit removes the retry path from the I2C Device Driver
and adds two to the EEPROM Device Driver. This will provide
more flexibility to I2C DD use in the future, while keeping the
current level of EEPROM DD robustness.
Change-Id: I2b2aa3ed83557a5f2d9523cd55a7486924205e2f
RTC: 89667
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/7508
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Enable IBSCOM for Centaur DD2.x chips
Add appropriate error handling
Flip scom to FSI after IBSCOM fail
Enable reconfig loop cleanup
Code verified on hardware
Change-Id: I394789b900e5779dded78dd5fbcc9b9257e856fb
RTC: 69115
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/7410
Tested-by: Jenkins Server
Reviewed-by: Michael Baiocchi <baiocchi@us.ibm.com>
Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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A change was made to ignore the BEAM error signaling a loop is
only run once. It is be design that this loop is run once.
Change-Id: I99c7661cc9b2537603cdb4534b7e7ae78deb895c
RTC: 84067
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/7361
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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This commit adds more attribute fields to be used in the
EEPROM device drivers. The I2C device driver is also being
updated so that it can eventually get the desired bus speed
from an attribute, as well.
Change-Id: I6b609cafdd7ea3b015a4f62009297e0149ba5b84
RTC: 72715
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/6116
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Adding an I2C Device Driver interface that has an additional
offset paramter which allows for a single operation to set both the
device's internal offset and then do a read or write to the device.
RTC: 73815
Change-Id: Ib77682f3b7e2088d77ce28b885c544e5cb785f6a
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/5524
Tested-by: Jenkins Server
Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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There were several changes required for successful operation
of the I2C and EEPROM Device Drivers based on HW Testing.
There was also a need to upddate the attribute files and
various testcases for processor support.
Change-Id: Idd9351ffb01a992c835f99d06ef1246709eceb8b
RTC: 64765
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/4678
Tested-by: Jenkins Server
Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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