| Commit message (Collapse) | Author | Age | Files | Lines |
|---|
| ... | |
| |
|
|
|
|
|
|
| |
Change-Id: I28b4c114bdfb00a8f252bc4ce12a725f292c266b
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/495
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
|
| |
|
|
|
|
|
|
|
|
|
| |
Also turned off the FSI init in the FSI and SCOM testcases because
it is now called by the istep code automatically.
Updated the centuar.chip file to add scom registers.
Change-Id: Icf1278808eeb67c1afdabf02b0ad08bc99c8ed40
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/477
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
|
| |
|
|
|
|
|
|
| |
Change-Id: Ic8fcd3c69330878e8e7a75ba6ba9d3c60aca6251
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/482
Tested-by: Jenkins Server
Reviewed-by: Mark W. Wenning <wenning@us.ibm.com>
Reviewed-by: Monte K. Copeland <copelanm@us.ibm.com>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
RTC Story 3792
- Added 7 more Venice targets and 7 more Centaur targets to the
simics_VENICE.system.xml to match the latest simics config
Note: remove Centaurs are currently disabled due to SW107421
- Modified testcases to be more tolerant of system config differences
- Changes to initialization flow to be more tolerant of missing
chips
- Expanded the size of the HB_DATA section of PNOR to hold the
additional targets (up to 128KB space now, actual is 36KB)
Change-Id: Ic92708ccb147fb18bf992ef3ac318a287d32fafe
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/445
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
There are a group of attributes defined for FSI now.
-ATTR_FSI_MASTER_CHIP
-ATTR_FSI_MASTER_TYPE
-ATTR_FSI_MASTER_PORT
-ATTR_FSI_SLAVE_CASCADE
-ATTR_FSI_OPTION_FLAGS
Also includes work for Story 3996. The attributes are now broken
into 3 distinct pieces:
- attribute_types.xml : defines hostboot attributes
- target_types.xml : defines different types of targets
- XXX.system.xml : system-specific information, equivalent to what
we'll get from system workbook
These are then used to generic system-specific binaries, currently
for 3 platforms:
- simics_SALERNO_targeting.bin
- simics_VENICE_targeting.bin
- vbu_targeting.bin
Change-Id: I2bf920cc62cceb761ab44a07df433da44249d0e0
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/426
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This code will initialize the FSI hardware and allow access
to remote slaves.
Note - current code is hardcoded to using the MFSI-0 port on the
master processor wrapped back into its own CFAM.
Note2 - One testcase is disabled pending integration of required
fixes to the simics models.
Contains work for
- Task 3830 : FSI Master Regs
- Task 3831 : FSI Slave Regs
Change-Id: I8dd5f0e03cf083e35cf8241db22ad6d76ba85fac
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/359
Tested-by: Jenkins Server
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
|
| |
|
|
|
|
|
| |
Change-Id: I521870c1f11fb33ae3829b96c6c0fca18c1a0c62
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/391
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
|
|
|
-Initial work for FSI Device Driver (Story 3334)
-Read/Write interface (Story 3550)
Code is capable of basic read and write operations provided that the
Simics models are updated
Note: contains early work for FSI Initialization that should be ignored for now
Change-Id: I08e795422de127b62c2d1629d7a4e0f12b21e348
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/287
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
|
