| Commit message (Collapse) | Author | Age | Files | Lines |
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Uses the scom from proc_thread_control HWP to start all of the
threads that aren't started yet on the master core.
Change-Id: I93efba6ebebbf9d286a399fc58fa437b30e830b1
RTC: 37008
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1242
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Add support for new User Details error log class that will log a
hardware register. Developer can read the data and then call the
errlog function to have it dumped, or can just call the errlog
function to do the deviceRead go get the data.
Also, fix bugs in a couple of device read functions that were too
strict in their size check - input buffer size just needs to be >=
size required, not ==.
Change-Id: I05ba42ecd13b3fc963c56bb706d855c9c89412a3
RTC: 38497
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Tested-by: Jenkins Server
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Temporarily remove nanosleep calls in PNOR, FSI, Scom device
drivers to enhance VPO performance. Cuts ddr_phy_reset from 17
hours to 17 min
Also fixed race condition in hb-istep
Change-Id: I0a60275066a9e14b564d0294c083eec8647b2ff7
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1206
Tested-by: Jenkins Server
Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Mark W. Wenning <wenning@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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-Fixed Mutex issue in FSIDD
-Remove FSIDD workaround for a perceived simcis bug which we now think was just the mutex issue.
-Cleaned up some traces in scom.C
-Temporarily disabled testCastOutPages() to avoid memory issues
-Tweaked periodics in cpumgr.H
Change-Id: Ic34193cc2f81a40530214cd3338dfb405d1e8198
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1171
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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- Moved common targeting code to own subtrees
- Updated many components with header file changes
- Implemented abstract pointer class
- Implemented Hostboot specific support for targeting commonality
- Changed attribute VMM base address to 4 GB (From 3 GB)
- Removed tabs, fixed > 80 character lines
Change-Id: Ie5a6956670bfa4f262f7691b4f0ce5a20ed289fe
RTC: 35569
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/909
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Added a new attribute SP_FUNCTIONS to control some of the
functionality that the FSP may or may not be handling.
Updated FSI code to key off of new attribute instead of
looking for VPO mode
Migrated over to using HUID for tracing/logging and
added a utility function for other code to use.
Change-Id: Ide410d088b24a15004236d39b3e4bde784248a52
RTC: 39704
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/877
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Fixing a possible multi-threading issue in how the FSI driver
collects FFDC. I am keeping track of the Task that hit the
error to avoid hitting the mutex twice.
Change-Id: Ic48cc046e1a23c67df84802c51307be645a06a8d
RTC: 35287
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/806
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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This is work for Task 38048
-Updated bbuild to an 810 build with the latest Simics support
-Pulled support for Salerno from build tools
-Changed DEFAULT_MACHINE to MURANO
-Updated testcases to follow error logging guidelines
-Fixed up some FSI error handling bugs
-Disabled FSI loopback on VENICE (fix with Task 39187)
-Disabled a few testcases (see Impediment 39188)
Verified both MURANO and VENICE configurations
Change-Id: Ie7761f49c9e653489c8c4dad261b1c8852fa7548
RTC: 35596
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/791
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change CFAM SCAN trace to 32-bit values
Update based on Patrick & Dan's comment
Update based on Patrick's comment
Change-Id: I003048f23656c2f2c043fb8c605442429cfbf973
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/671
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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-Updated bbuild to c0131a_1205.760 (released 1205.760 driver)
-Removed writes to MCRSP32 regs from testcase (see Issue 35803)
-Removed access to made-up reg 0x12345 from scom test
-Removed Simics workaround for reg 0x02011403 in scom test
-Updated debug FFDC for FSI errors
Change-Id: I2714d3b179406d35f7e460a6c0629c961083e6df
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/647
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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The same code was in a dozen places so I added a wrapper function.
Change-Id: I5b1d34e0f94b91289960c73670199ff22f4c6860
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/643
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Fix build break
Change-Id: Id24777db58cf6dd818bf85431bc8e2fd3dc39aa4
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/620
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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RTC Impediment 4656
A Simics-side change is going into fips under 821496
Change-Id: I76984bf8c4906334875e9738ab992cc6a1933ec6
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/617
Tested-by: Jenkins Server
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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for each chip versus a single global mutex.
RTC Story 4389
Also stuck in a quick fix for Issue 4493 at the same time.
Verified against VENICE model with a Centaur.
Change-Id: I62fc2c979315b60594104550f8095aa80996c40f
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/599
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: Id9371157bd51a7c646fd9b7440d09532e68c0577
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/579
Tested-by: Jenkins Server
Reviewed-by: MATTHEW S. BARTH <msbarth@us.ibm.com>
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
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Task 4086
If the powerbus is alive we will use the remote master's OPB logic
directly instead of using the master proc's logic and cascading
through the MFSI port.
Added a target-specific mutex to handle concurrency issues.
Note - the new code path cannot be tested until XSCOM is completed
with Story 4382
I also modified some error handling to take care of errors exposed
by the fsipres testcase.
Verified on SALERNO and 2-proc VENICE models.
Change-Id: If48ddde60cef819ff6b921e00bdbab5027830be4
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/569
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: Ic8fcd3c69330878e8e7a75ba6ba9d3c60aca6251
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/482
Tested-by: Jenkins Server
Reviewed-by: Mark W. Wenning <wenning@us.ibm.com>
Reviewed-by: Monte K. Copeland <copelanm@us.ibm.com>
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RTC Story 3792
- Added 7 more Venice targets and 7 more Centaur targets to the
simics_VENICE.system.xml to match the latest simics config
Note: remove Centaurs are currently disabled due to SW107421
- Modified testcases to be more tolerant of system config differences
- Changes to initialization flow to be more tolerant of missing
chips
- Expanded the size of the HB_DATA section of PNOR to hold the
additional targets (up to 128KB space now, actual is 36KB)
Change-Id: Ic92708ccb147fb18bf992ef3ac318a287d32fafe
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/445
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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There are a group of attributes defined for FSI now.
-ATTR_FSI_MASTER_CHIP
-ATTR_FSI_MASTER_TYPE
-ATTR_FSI_MASTER_PORT
-ATTR_FSI_SLAVE_CASCADE
-ATTR_FSI_OPTION_FLAGS
Also includes work for Story 3996. The attributes are now broken
into 3 distinct pieces:
- attribute_types.xml : defines hostboot attributes
- target_types.xml : defines different types of targets
- XXX.system.xml : system-specific information, equivalent to what
we'll get from system workbook
These are then used to generic system-specific binaries, currently
for 3 platforms:
- simics_SALERNO_targeting.bin
- simics_VENICE_targeting.bin
- vbu_targeting.bin
Change-Id: I2bf920cc62cceb761ab44a07df433da44249d0e0
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/426
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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This code will initialize the FSI hardware and allow access
to remote slaves.
Note - current code is hardcoded to using the MFSI-0 port on the
master processor wrapped back into its own CFAM.
Note2 - One testcase is disabled pending integration of required
fixes to the simics models.
Contains work for
- Task 3830 : FSI Master Regs
- Task 3831 : FSI Slave Regs
Change-Id: I8dd5f0e03cf083e35cf8241db22ad6d76ba85fac
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/359
Tested-by: Jenkins Server
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I521870c1f11fb33ae3829b96c6c0fca18c1a0c62
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/391
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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-Initial work for FSI Device Driver (Story 3334)
-Read/Write interface (Story 3550)
Code is capable of basic read and write operations provided that the
Simics models are updated
Note: contains early work for FSI Initialization that should be ignored for now
Change-Id: I08e795422de127b62c2d1629d7a4e0f12b21e348
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/287
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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