| Commit message (Collapse) | Author | Age | Files | Lines |
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Some components can continue to operate in the face of the SuperIO
controller being unavailable on the LPC bus (specifically, the UART and
boot flag processing). Other components require it present (AST-based
SFC implementations and the AST mailbox). Components in the latter
category can just fail with an errl when they attempt to access the
controller, but for those in the former category we add an isAvailable()
function in the SIO namespace to sidestep dealing with errors.
Specifically, isAvailable() tests for the expected error when the
SuperIO controller is disabled, and returns an errlHndl_t if any other
error occurs. This way true LPC errors are propagated to the caller to
commit as desired.
For the moment *all* errors produced by the SIO::isAvailable() LPC bus
access will result in the SIO code assuming the device is absent. We
should be more precise about this, but the hardware behaviour seen under
hostboot currently prevents us from being more specific. This problem is
highlighted by a FIXME block in the implementation of
SIO::isAvailable().
Change-Id: Id30a09b48586d2054e0cdae625ee23df68ac2aa3
Signed-off-by: Andrew Jeffery <andrewrj@au1.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67460
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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This reverts commit 627379aeaa27e30d66ebb0aecf218708d465162c, which
incorrectly attempted to account for LPC errors during testing for SIO
absence. The broken patch interprets the OPBM status as LPCHC status and
expects an LPCHC SYNC Abnormal error, however as it's the OPBM status
that indicates the error we never hit the LPCHC error path to populate
the errl with the error RC expected by the SIO driver.
Change-Id: Ib993d4a2b9b4e5018d9273a1c82f8b5c21ec9a25
Signed-off-by: Andrew Jeffery <andrewrj@au1.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67459
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Some components can continue to operate in the face of the SuperIO
controller being unavailable on the LPC bus (specifically, the UART and
boot flag processing). Other components require it present (AST-based
SFC implementations and the AST mailbox). Components in the latter
category can just fail with an errl when they attempt to access the
controller, but for those in the former category we add an isAvailable()
function in the SIO namespace to sidestep dealing with errors.
Specifically, isAvailable() tests for the expected error when the
SuperIO controller is disabled, and returns an errlHndl_t if any other
error occurs. This way true LPC errors are propagated to the caller to
commit as desired.
Change-Id: Ib94ceabfd4f4e9c63c114cfe3db3c954dbb6d6e5
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67315
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: ANDREW R. JEFFERY <andrewrj@au1.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
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Change-Id: I2d6ae43f123f745ee64e59c12017f12d7593123b
Signed-off-by: Andrew Jeffery <andrewrj@au1.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/62507
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Disable-CI: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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If the service processor has pre-configured the hardware to the state
required by the host firmware it can set a bit to indicate this. If the
bit is set, avoid touching the UART configuration.
Change-Id: I96d228b5d89749eb531522e4ae90396b47776c43
Signed-off-by: Andrew Jeffery <andrewrj@au1.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/62506
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Disable-CI: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Disable-CI: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: Ica065fb2dd4402c0fa71466055bcccb573d48101
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31877
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Elizabeth K. Liner <eliner@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I2e1a79509065177b4047ce7befe9cbbca5210255
RTC:161647
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30998
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: VENKATESH SAINATH <venkatesh.sainath@in.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Reviewed-by: Matthew A. Ploetz <maploetz@us.ibm.com>
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The SuperIO driver makes accesses to the SIO chip from the console and
pnor module thread safe.
Change-Id: Ib07dea2867d14684806c56cd965b26c95810f7f3
RTC:115576
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/20928
Tested-by: Jenkins Server
Tested-by: Jenkins OP Build CI
Tested-by: Jenkins OP HW
Tested-by: FSP CI Jenkins
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: PRACHI GUPTA <pragupta@us.ibm.com>
Reviewed-by: Richard J. Knight <rjknight@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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We need to write the address to 0x2e, and the data to 0x2f.
Change-Id: I1271a134c19d921fa1ee54b5f0d1c0e092df9e2b
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/19146
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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The SUART1 base address is at 60 hex, not 60 decimal.
Luckily, we've been setting it (from g_uartBase) to the default value
of 0xf8.
Change-Id: If6e6a095871bee5b55355590a28087ccc2a6bf62
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/18941
Tested-by: Jenkins Server
Tested-by: Jenkins OP Build CI
Tested-by: Jenkins OP HW
Reviewed-by: Richard J. Knight <rjknight@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: I16b631992271fc03b50f187c11911cdbf7d7c108
RTC:118752
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/15430
Tested-by: Jenkins Server
Reviewed-by: Brian H. Horton <brianh@linux.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: WILLIAM G. HOFFA <wghoffa@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Unlock SIO after console setup
Fix PP write length
Change-Id: I3b5b9c589ac16b392a0df6f9d4355f8aa1701061
RTC: 97493
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/14028
Tested-by: Jenkins Server
Reviewed-by: Michael Baiocchi <baiocchi@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: Iaf2da65e0a965001c7387b86daa2990934e7dbb9
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/13251
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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