| Commit message (Collapse) | Author | Age | Files | Lines |
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Change-Id: Idb7a2d8d72a55f644efd0b2548eca5df5d062e6d
RTC: 47491
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2011
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Add mmLinearMap to create block at a specified phys addr.
Added iv_MaptoPhy in the block to indicate we are physically mapped
block and to not apply the HRMOR.
Change-Id: I75ddb19b82ae9a2035ff873edff8a34a33c74639
RTC:43401
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1846
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: Ib234df5b96275b0174994712d5b250681625f148
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1928
Tested-by: Jenkins Server
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: I196e58be48195f653ab16a74dedafabafbd07bbc
RTC: 47013
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1774
Tested-by: Jenkins Server
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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The memory profiling tools sometimes encountered a condition where
the kernel stack was becoming corrupted. I tracked it down to the
winkle code storing the winkle-save state at the wrong end of the
stack. Moving the winkle-save area to the bottom of the stack,
which is where I originally intended it to go.
Also noticed that the task issuing the winkle was in "running"
state while waiting for the cores to come out of winkle. Ensure
that the kernel updates the task state with a non-running status
while we are waiting for winkle to complete.
Change-Id: I07a56ea6f24cbc09362f9227d81915da5bc9f148
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1737
Tested-by: Jenkins Server
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Changes to kernel code to support detection and use of HRMOR
offset in memory
Changes to tooling to handle the real memory offset
New interface to retrieve the physical address that
corresponds to a virtual address
To test, run these commands before starting up Hostboot:
system_cmp0.cpu0_0_05_0.write-reg HRMOR 0x8000000
proc_venicechip_cmp0.phys_mem.del-map p8Proc0.l3_cache_ram 0 0
RTC: 46032
Change-Id: I50ab248f941218a3a14a8f0fc12a551b56dc7cf3
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1553
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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When executing the nap instruction, all thread state can be
lost. This was causing r0 to be lost, which contained the
system-call number for the idle thread to request permission
to execute nap and as a result 'task-yield' was executed
instead of 'cpu-nap' after the idle thread took its first
nap.
Re-arranged the sreset code that handles nap-wakeup to deal
with thread-state being lost when entering nap and instead
using the previously saved task-state from the 'cpu-nap'
system call.
Change-Id: Id7468a8577c4d7b273b23bc97e7dd040555e7b67
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1567
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Created per-node arrays of CPU objects rather than a single array
for the entire system. These are created dynamically as CPUs are
enabled.
Also disabled support for P7 due to the PIR layout being different
and hence would have needed two different sets of assembly code.
We have been running exclusively on the P8 Mambo model for a while.
RTC: 42815
Change-Id: Ib92de8a7c07c2e700a3b7f0c03c64d484b447ca2
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1630
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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The Power processor has instructions of the form 'or a,a,a'
that allow code to change the priority of a hw-thread relative
to the others. We initially used 'or 1,1,1' as low priority
and 'or 3,3,3' as high priority. This is used in, for instance,
spinlocks to reduce the priority of a hw-thread while waiting
for another thread to perform an activity.
This code originally came from HAL. In reading the Power ISA
closer I realized that 'or 3,3,3' has no effect when in
user-space code, which means that a spinlock-like effect in
user code is going to end up with the thread stuck at low
priority until the next context switch. To prevent this we
are going to change from 1/3 to 1/2 as the priority levels.
Change-Id: I60ee866cde37499106f5e1e1d68a0b5ddeedf403
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1569
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: I47a8ad7914c6833c476a7944be5d352f45467f3a
RTC: 47725
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1646
Tested-by: Jenkins Server
Reviewed-by: Mark W. Wenning <wenning@us.ibm.com>
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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* Choose thread with the lowest PIR as the last to enter payload.
* Use HRMOR update process from Murano Book IV.
RTC: 43166
Change-Id: I629f4a55cba1967a13c31a16095697b7142ca407
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1529
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Due to the LPCR values, nap can already be exited by an
interrupt or decrementer event. Remove EE in the MSR so
that we are guarenteed that we fully enter nap even if
there is a interrupt or decrementer pending.
Change-Id: If70f82ea7c05576c1dd97de9e2a1d930c36ba46f
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1515
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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RTC: 44730
Change-Id: Ifaeecc659e1bfd8ded4744dc591fc993471519ba
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1471
Tested-by: Jenkins Server
Reviewed-by: Mark W. Wenning <wenning@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: Ifd611129c2d7173b5e0dec36c870e06a4d851009
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1384
Tested-by: Jenkins Server
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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RTC: 43738
Change-Id: I91c2bfe57bba04a02dd5169542de8e76e1654ae8
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1387
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Task 44887
Change-Id: If87b6e80b974bb4cbff13844d8a3f055a17282d2
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1378
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: Mark W. Wenning <wenning@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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RTC: 37009
Change-Id: I56669805c86d9659a20ad7c26e5e9860c7a248c7
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1087
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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* Allow page allocation system call to force coalesce if a
contiguous block is unavailable. [long-term enhancement]
* Workaround lack of large contiguous memory for PageTable
test-cases, which require 256K, by allocating a VMM block.
This should be removed when story 43401 is implemented.
[short-term workaround]
Change-Id: Idddb30eaa3aeac52d56b82a70355095f31d4a0cd
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1369
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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* Debug tool for PageManager.
* Support PageMgr allocations of non-2^k size.
* Switch page-allocation to always be in kernel-mode.
While investigating issue 44511, I noticed two problesm with the
memory page allocator (PageManager). First, the allocator did
not support allocations of pages which were not a power of 2,
which would result in pages appearing to "leak". Second, in
situations where a large allocation was requested and there was
not a large chunk available, the allocation would enter a
live-lock condition where coalescing would never occur.
Switched the PageManager so that all allocations happen in
kernel space. This allows us to force memory-release operations
on the syscall path when we are out of memory and also put in
place a task_yield call which will allow coalescing to eventually
occur. Issue 44523 is suppose to fully resolve any of these
live-lock paths.
RTC: 44511
Change-Id: Ifefd5d0996ee6914e291c862fac0c7b76980717f
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1330
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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RTC: 40831
Change-Id: I7889f91eec44a10d56ffc94e03c7557f8085100a
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1272
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Opened Issue 44509 to resolve MDIA issue.
Opened Issue 44511 to resolve OOM.
Change-Id: I5b1e577fb45344a1bed0cfb33ded98ecc836bdf5
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1291
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
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Change-Id: I6f5f44009f8b6e76ac660977c567b35400980b22
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1204
Tested-by: Jenkins Server
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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RTC: 42647
Change-Id: If420c26e2eee2f6abdb27d59b3cadf57155d39b8
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1124
Tested-by: Jenkins Server
Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: I3a8a6a521d219a55600b3370fb75a25b8ed085be
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1154
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: I004772e9005ce08d72d666a9b4073afd7b74e582
RTC: 41635
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1053
Tested-by: Jenkins Server
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: Iffe829bb68d3769cdd0ca3bf8ecb478ca31013bb
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1052
Tested-by: Jenkins Server
Reviewed-by: Van H. Lee <vanlee@us.ibm.com>
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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RTC: 39730
Change-Id: Ib548202f6f935b46cd92e0ddbf48d19b5ff6679a
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/977
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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RTC: 39989
Change-Id: Ib8bf236f387b7eddff53074adc80b9cb12d04360
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/884
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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This code is currently unused, due to InitService not having the
payload address and the start_host_os IPL step being unimplemented.
For testing purposes the 'shutdown' call in initservice.C can be
changed to pass a non-zero base address (such as 256MB).
RTC: 40871
Change-Id: I0f4b6bae62ede1853aabbcb28082300005e31897
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/926
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Tested-by: Jenkins Server
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
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Change-Id: Ie0ba82a759afee2e4809924b32c7ef0fefcd0ad1
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/914
Tested-by: Jenkins Server
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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- Changed overall page table behavior to no longer use C bits
in page table entries. Instead, individual blocks mark
pages as dirty based on stores during page faults. Initially
all writable pages are marked read-only until the first store
to it. At that time the block gets an exception and changes
the permission on the page table entry to writable and marks
its own SPTE to dirty.
- Greatly reduced the number of tlbie's and page table accesses.
Accomplished this by:
* Skipping many of the page table manipulations, such as
LRU updates, when the PTE is invalid.
* Converting most of the previously general-case of
"Modifying a PTE" to specific cases such as "Resetting
the Reference Bit" and "Modifying the SW field".
- Fixed the LRU-flush algorithm so that it is O(n) instead of
O(n^2), where n = size of page table.
Change-Id: I2520fa88970fd7f656e6348bf6b34d5db82fd3db
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/892
Tested-by: Jenkins Server
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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- Reduce DCBZ and ICBI calls in memory copy and init functions.
- Reduce strlen calls in trace.
- Set thread to low priority while waiting on in-kernel barrier.
Change-Id: Ic9c23b1e26797ff393e5862819830de60554747e
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/871
Tested-by: Jenkins Server
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Brian H. Horton <brianh@linux.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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This is work for Task 38048
-Updated bbuild to an 810 build with the latest Simics support
-Pulled support for Salerno from build tools
-Changed DEFAULT_MACHINE to MURANO
-Updated testcases to follow error logging guidelines
-Fixed up some FSI error handling bugs
-Disabled FSI loopback on VENICE (fix with Task 39187)
-Disabled a few testcases (see Impediment 39188)
Verified both MURANO and VENICE configurations
Change-Id: Ie7761f49c9e653489c8c4dad261b1c8852fa7548
RTC: 35596
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/791
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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RTC: 38206
Change-Id: Iab79041931db533ad6b6ebd057c1ef9fe4c4b8cc
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/714
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: I4cdcf3b4f93bd75aca4a495f3faa16af9ba217d7
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/753
Tested-by: Jenkins Server
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: I808fc55ca4706bf03df63b1a72acc87ddba20822
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/705
Tested-by: Jenkins Server
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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The P8 processor (in RFC02230 targeted for ISA 2.07) adds a
new SPR register HFSCR (Hypervisor Facility Status and Control
Register). This register allows the hypervisor to disable
access to some resources, such as floating point and VSX,
from a partition. The purpose of this is to save time in
saving the partition context when switching partitions.
Since we sometimes enable floating point instructions we need
to also enable the HFSCR[FP]. We could do this when enabling
floating point in the MSR, but the SPR does not exist in P7.
Instead we'll do it as-needed on the hw-thread the first time
it executes a FP instruction. The FP instruction will cause
the hype_fac_unavail exception and the exception handler will
set HFSCR appropriately.
Change-Id: I6c1e75939bb59142cbcf692fa56deb2271d6bdc3
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/676
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: I73a446754cd03178055459eb75c7b2f87b51b0f3
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/635
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: Ib715b3a4e775ef183244e8769c6560a85ac19104
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/612
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: Icd2e9ed7de2c0227b25979622d0f37a77595570a
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/609
Tested-by: Jenkins Server
Reviewed-by: MATTHEW S. BARTH <msbarth@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: Iaac392b9f4287ba888e454532c4061d6a14c6e5c
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/593
Tested-by: Jenkins Server
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
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Previously, when we map a page into a high virtual address we
unmap that same page from the low heap address range (by
setting the permissions to NO_ACCESS). This commit changes
the behavior to only prevent writes to the heap range by
setting the permissions to READ_ONLY.
The heap management code uses atomic instructions to manage a
stack of free pages (see PageManager::allocatePage). There
was a race condition where two threads would both be allocating
a page at the same time; one of which was a kernel thread
fulfilling a VMM exception by allocating a page. Due to the
way Simics emulates hardware threads, by the time the other
thread executed the load instruction to find Head->Next of the
free page stack, the permissions were already changed on the
page containing Head, such that the load would fail with a
data storage exception.
There were a few other possible changes proposed for this fix
and this seemed like the most straight-forward. Others were:
1) Change heap management to not have the stack nodes on
the pages themselves but allocate a separate set of
nodes. This would cause a large re-write to the PageMgr.
2) Identify the data storage exception and interrogate the
corresponding instruction address that raised the
instruction. If the instruction was in PageManager,
treat it as a spurious instruction, advance the NIP, and
continue execution.
The change to READ_ONLY instead of NO_ACCESS should have little
impact. The original intent of using NO_ACCESS was to better
catch bad address and buffer overrun bugs. In most cases, the
erroring code is going to attempt a write to the bad address, so
this situation will still be caught. Since there is a single
address space, this feature was mostly to detect bad code writing
on top of instructions, which READ_ONLY will still detect.
Change-Id: I454f2fd51aeea55592e4fe3b8969f7667d7e97a6
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/605
Tested-by: Jenkins Server
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: MATTHEW S. BARTH <msbarth@us.ibm.com>
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Change-Id: I5f5d9c30b4cc0f0d8704fb99c10757e0f41018bf
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/603
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Reviewed-by: Mark W. Wenning <wenning@us.ibm.com>
Reviewed-by: MIKE J. JONES <mjjones@us.ibm.com>
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Change-Id: If6b499d819b71298b8a64e096e1eb83c639ad645
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/517
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: Ie3f3fb2050428af1fc398b1577dfc090cd7d26cf
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/591
Tested-by: Jenkins Server
Reviewed-by: MIKE J. JONES <mjjones@us.ibm.com>
Reviewed-by: Melissa J. Connell <missyc@us.ibm.com>
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: MATTHEW S. BARTH <msbarth@us.ibm.com>
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- RTC4451
Change-Id: I3328ec3f032d7c8163fe63b683016357432ab976
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/580
Tested-by: Jenkins Server
Reviewed-by: Van H. Lee <vanlee@us.ibm.com>
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Change-Id: Id9371157bd51a7c646fd9b7440d09532e68c0577
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/579
Tested-by: Jenkins Server
Reviewed-by: MATTHEW S. BARTH <msbarth@us.ibm.com>
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
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- Modify debug fw to support writing data.
- Modify debug fw to support clocking model forward.
- Add simics environment support for both.
- Kernel support to start a task when directed.
- Write debug tool to modify kernel structure for debug.
Change-Id: Ic001dfd45f91392aefbc9d5096c5344018d5190e
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/518
Tested-by: Jenkins Server
Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: I9d9094d5c6689c9127c6948239c7c9aaebacdfde
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/514
Tested-by: Jenkins Server
Reviewed-by: MATTHEW S. BARTH <msbarth@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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no_access SPTE entry
Change-Id: I66e0aa4f47819dd2cc4be69ff6f18ca1d4a851e4
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/484
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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