| Commit message (Collapse) | Author | Age | Files | Lines |
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- Free excess allocation pages in reverse order
Change-Id: I4c5f2909275e2d3dc71b0806fbf177a101b47292
CQ: FW633822
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/16066
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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- See https://github.com/lucasdemarchi/codespell
Change-Id: I03e102d1ebb9473b6226fa9b6edb684fa0218a2f
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/15031
Tested-by: Jenkins Server
Reviewed-by: STEPHEN M. CPREK <smcprek@us.ibm.com>
Reviewed-by: Zane Shelley <zshelle@us.ibm.com>
Reviewed-by: Brian Silver <bsilver@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: I5664587b4f889099290ef50d50fa9ce5e580e1eb
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/11167
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: Iccf938f8d2ee2b56747a6e266ced3ec957b6a46e
CQ: SW247870
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/9120
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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RTC: 64763
Change-Id: Ie910a57ca96bc6fc673097dbaf72e7df469b2017
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/4803
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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* Start kernel in 1/4 cache mode per Secureboot.
* Copy Secureboot header for base image for later use.
* Blind-purge bottom half of cache.
* Add bottom of cache into memory maps for 1/2 cache mode.
RTC: 64762
Change-Id: I1b45f30a2d45c9709d4fd486cfe0ca2ce86b051c
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/3773
Reviewed-by: Michael Baiocchi <baiocchi@us.ibm.com>
Tested-by: Jenkins Server
Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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RTC:64829
Change-Id: Ic8e7983f6838b79c359c4cee2647b7676493cb1e
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/3564
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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If fake PNOR isn't being used, we can expand our memory space to
the full 8MB cache. There will be follow up work with RTC: 49137
to support 4MB degraded caches for bring-up.
Change-Id: I1248efa37965f39ebab62aae556349c34aa24b66
RTC: 47356
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2319
Tested-by: Jenkins Server
Reviewed-by: Melissa J. Connell <missyc@us.ibm.com>
Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Add mmLinearMap to create block at a specified phys addr.
Added iv_MaptoPhy in the block to indicate we are physically mapped
block and to not apply the HRMOR.
Change-Id: I75ddb19b82ae9a2035ff873edff8a34a33c74639
RTC:43401
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1846
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: Ib234df5b96275b0174994712d5b250681625f148
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1928
Tested-by: Jenkins Server
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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* Debug tool for PageManager.
* Support PageMgr allocations of non-2^k size.
* Switch page-allocation to always be in kernel-mode.
While investigating issue 44511, I noticed two problesm with the
memory page allocator (PageManager). First, the allocator did
not support allocations of pages which were not a power of 2,
which would result in pages appearing to "leak". Second, in
situations where a large allocation was requested and there was
not a large chunk available, the allocation would enter a
live-lock condition where coalescing would never occur.
Switched the PageManager so that all allocations happen in
kernel space. This allows us to force memory-release operations
on the syscall path when we are out of memory and also put in
place a task_yield call which will allow coalescing to eventually
occur. Issue 44523 is suppose to fully resolve any of these
live-lock paths.
RTC: 44511
Change-Id: Ifefd5d0996ee6914e291c862fac0c7b76980717f
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1330
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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RTC: 40831
Change-Id: I7889f91eec44a10d56ffc94e03c7557f8085100a
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1272
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Opened Issue 44509 to resolve MDIA issue.
Opened Issue 44511 to resolve OOM.
Change-Id: I5b1e577fb45344a1bed0cfb33ded98ecc836bdf5
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1291
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
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RTC: 42647
Change-Id: If420c26e2eee2f6abdb27d59b3cadf57155d39b8
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1124
Tested-by: Jenkins Server
Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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RTC: 39989
Change-Id: Ib8bf236f387b7eddff53074adc80b9cb12d04360
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/884
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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- Reduce DCBZ and ICBI calls in memory copy and init functions.
- Reduce strlen calls in trace.
- Set thread to low priority while waiting on in-kernel barrier.
Change-Id: Ic9c23b1e26797ff393e5862819830de60554747e
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/871
Tested-by: Jenkins Server
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Brian H. Horton <brianh@linux.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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This is work for Task 38048
-Updated bbuild to an 810 build with the latest Simics support
-Pulled support for Salerno from build tools
-Changed DEFAULT_MACHINE to MURANO
-Updated testcases to follow error logging guidelines
-Fixed up some FSI error handling bugs
-Disabled FSI loopback on VENICE (fix with Task 39187)
-Disabled a few testcases (see Impediment 39188)
Verified both MURANO and VENICE configurations
Change-Id: Ie7761f49c9e653489c8c4dad261b1c8852fa7548
RTC: 35596
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/791
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: Iaac392b9f4287ba888e454532c4061d6a14c6e5c
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/593
Tested-by: Jenkins Server
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
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Change-Id: I79b9cfad5d80267c6709b094d7f852d89e08534b
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/452
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: Ibe725a43e6366d9113ec99df1cc6aafa7bbb770e
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/431
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
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Change-Id: Icce8e01f3d1cd2942f2b9ff802993da0441535ee
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/344
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
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Change-Id: I205f2409e56032cfc0aaf01d7e26d357f0b86373
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/277
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Tested-by: Jenkins Server
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Change-Id: I309bc63bdb27baa21f65de05e12324b9c4ce3407
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/212
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: Ic7f158b07b5b37465af5b129153d63645ced1bad
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/205
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com>
Reviewed-by: MATTHEW S. BARTH <msbarth@us.ibm.com>
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- Segment Manager
- Base / Device Segments
- Block for Base image.
Change-Id: Ic0c058e5c5b210ec1c48d30f6ed9f9837d74a3c8
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/193
Tested-by: Jenkins Server
Reviewed-by: MATTHEW S. BARTH <msbarth@us.ibm.com>
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The space after our code image but before the first page is unused, so
we only need to dcbz the pages. This reduces any dependency on cache
size in the dcbz loop boundary condition calculations.
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