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* Fix page coalesce bug in coalescing end of cache memory rangeNick Bofferding2019-04-081-9/+11
| | | | | | | | | | | | | | | | | Fixes a page coalesce bug where the page coalesce routine failed to factor in the actual start address of the range, and therefore could not coalesce pages back together correctly. Additionally, decreases the amount of space reserved for the OCC bootloader from an inadvertent 32k to 4k as intended. Change-Id: Iffd35560d67f6b2f27daf6dca3dc45a900fb4335 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75636 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add new istep for Hostboot doneDan Crowell2019-01-121-0/+2
| | | | | | | | | | | | | Add a specific 'istep' MAGIC call that indicates a successful boot that can be used by the Simics CI suite Change-Id: If4dcdd7f16d8b630b0200d7d5edc61f473e4e123 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69580 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Support HB running in SMFDean Sanner2018-09-241-4/+14
| | | | | | | | | | | | | | | | | | | | | | Support SMF for P9N/P9C. Lots of minor tweaks to make this work, but the biggest is to run userspace in problem state This is needed because for SMF Hostboot will need to run in S=1, HV=0,PR=1 (and kernel in S=1, HV=1, PR=0) This commit makes P9 HB userpsace run in HV=0 PR=1 and kernel in HV=1, PR=0. Change-Id: Ia4771df5e8858c6b7ae54b0746e62b283afb4bc4 RTC: 197243 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/50530 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Base Core/Kernel Changes to Support the Axone Processor ChipBill Hoffa2018-08-201-0/+3
| | | | | | | | | | | | | | | - Add the new cpu type, update the pvr checks and other miscellaneous changes to support a new Axone proc chip type Change-Id: Ie2541bf826bdff65f6f11b0f16839855d69eb4d6 RTC: 173001 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64260 Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Restore Timebase on Master Core Threads 1-3 after Sleep/WinkleBill Hoffa2018-07-241-3/+1
| | | | | | | | | | | | | | Change-Id: I329dd64345f2474cb0dad628ccc2244d85be86c2 CQ: SW429364 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/63147 Reviewed-by: ILYA SMIRNOV <ismirno@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Handle inter-node HRMOR correctly on 3/4 nodesDean Sanner2018-07-181-8/+9
| | | | | | | | | | | | | | | | | | | | | Recent changes to direclty use HRMOR for calculating addresses broke 3 and 4 node configs. This commit removes the multiplication of _nodal_ HRMOR * group id (since the _nodal_ HRMOR mechanism now factors that in). It also uses the IPC addresses to handle start payload, so math/constants are not used to find master node. Change-Id: I919783bc60b5e4914c58f80752881fcb15649e95 CQ:SW438196 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/62659 Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/62708
* Debug improvements for exceptions and OOM hangsDan Crowell2018-06-151-0/+45
| | | | | | | | | | | | | | | | | There are two main changes in this commit: 1) Forcing an assert if we cannot allocate pages after 10,000 attempts to yield. 2) Adding a backtrace for a lot of exception paths. Change-Id: I755ada753b78abed56e553f7c669f0f98ae68700 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/58224 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Write Hostboot HRMOR into core scratch reg 1Dan Crowell2018-06-041-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | Hostboot code will write the current HRMOR value into core scratch reg 1 (scom=xx010A87, spr=0x08) at initial boot. This data is ORed into the memory size data that was already present. The bootloader code will do the same. Also updated the debug tools to key off of this data if it is available to avoid any HRMOR hardcoding. The purpose of this change is to provide a method for the FSP code to handle various memory remapping scenarios that are currently in plan without needing any explicit communication from Hostboot. Change-Id: Ia3c81980ebd780ae182956cddae785dd408fbed9 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59699 Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Updates to make multinode IPC workDean Sanner2018-02-131-1/+5
| | | | | | | | | | | | | | | | | | -Fixed node/group id calculations -Reduced dbell printk to prevent printk overflow -Fixed architectual hole in how internode IPC works Workitems won't work, instead just always check for IPC on any doorbells to master thread -Changed PIR tracing to print out in hex Change-Id: I25eb7f87fd812a90f98a7724b1ac1100f764fe7b Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53187 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
* host_coalesce_host: bup updatesPrachi Gupta2018-02-061-6/+4
| | | | | | | | | | | | | | | | | | | | - move p9_fab_iovalid to fab_iovalid common lib to avoid conflicts with hwp lib - doorbell_send to wake up the cores in istep18 - move block wakeup interrupts set later in the istep 18 flow after we have suspended the mbox and drained the interrupt queue Change-Id: I241240ca1d1787182c5baaf3bdd10283878d5798 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52701 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: SWATHI M. BHATTIPROLU <bhmadhur@in.ibm.com> Reviewed-by: Sakethan R. Kotta <sakkotta@in.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Remove half cache init and do it in the page managerStephen Cprek2017-07-201-48/+3
| | | | | | | | | | | | | Change-Id: I3e870c9b50d13704c4c88adfc96e5943cff9dae2 RTC: 175114 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42153 Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fix PVR check for Nimbus DD1Dan Crowell2017-05-111-0/+12
| | | | | | | | | | | | | | | | | | Added check for bit 18 to distinguish between Nimbus DD1.0 and Cumulus DD1.0 Consolidated Nimbus DD1 checking to a common function Added printk output that shows which CPU we're running on Modified some existing printk output to use fewer characters Change-Id: I1c42df0051fc2d9cc5fa54d95f68c3bd26b86462 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39876 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Include HUID of failed Proc in TI data for certain SBE errorsBill Hoffa2017-05-101-2/+3
| | | | | | | | | | | | | | | - Include a generic error pipleline for other future error scenarios to leverage this functionality Change-Id: Icc1399ee93157c7106d394944a3355285a8cd830 RTC: 171865 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39072 Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Expand hostboot progress indicator in core scratch 3 regcrgeddes2017-05-021-1/+19
| | | | | | | | | | | | | | | | | | | Previously this register only had 2 values. "running" in ascii and 0 This commit adds 3 more possible states. Now 0 represents that HB passed off control to the hypervisor. "shutdown" represents that HB TI'ed. "bootload" says we are in the bootloader. "starthbb" means the bootloader has started the base image. "running" means hostboot is up and running. Change-Id: I11e7ef3dbb559a221343070b2c1b15f67853710b RTC: 171742 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39730 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Enable STOP wakeup on Hypervisor External InterruptDean Sanner2017-03-021-3/+5
| | | | | | | | | | | | | - Latest HCODE image change requirements now need to enable LPCR[17] prior to issuing STOP Change-Id: I21488e0795b5dcd710b026ebbace2d158fdf9694 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37374 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Remove last of old hwpf directoryDan Crowell2016-08-301-1/+1
| | | | | | | | | | | | | | Remove all of the old fapi1 HWPs from P8 Update makefiles/code to not include old hwpf headers Change-Id: Idc840554721f68b0af3b6ee6c7ad84f5df258e60 RTC: 146345 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28844 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Updates for new scratch registers in P9Andrew Geissler2016-08-161-3/+7
| | | | | | | | | | | | | | | P9 moves us from 8 scratch registers to 4. This commit handles this change and also adds the base support for partial cache. Change-Id: Ibe050c663744285dd3e77850649236a669dadbd6 RTC: 150923 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27462 Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Handle 8MB reduced cache modeMarty Gloff2016-08-101-4/+5
| | | | | | | | | | | | Check scom register (0x1001181B) for reduced cache mode and expand the memory footprint appropriately, reduced 8MB or full 10MB. Change-Id: I5920572077cdcee317e7b3b9abe999e6de295459 RTC:152954 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27522 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fix P9 expansion into bottom 512K cacheDean Sanner2016-07-111-1/+1
| | | | | | | | | | Change-Id: Ie7d8ab2ae3730b57448a07f0367c8715d61b6124 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/26495 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Stephen M. Cprek <smcprek@us.ibm.com> Reviewed-by: Matthew A. Ploetz <maploetz@us.ibm.com>
* Update purge of L3 cache during initial bootElizabeth Liner2016-06-101-1/+1
| | | | | | | | | | Change-Id: Ic6cfabbdfe8f10cf5fa1cd9a4a13093452b61978 RTC:118832 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24021 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Enable waking threads on master core with doorbell interruptsBill Hoffa2016-05-171-40/+19
| | | | | | | | | | | | | Change-Id: Iceb33f0b8c802e7448e8b77200623048f7f7ab61 RTC: 141924 CMVC-Coreq: 993299 CMVC-Prereq: 994801 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23591 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Doorbell Interrupt Base Support for Core/Thread WakeupBill Hoffa2016-05-061-3/+7
| | | | | | | | | | | | | | | | | | | | | | | | | This change includes: - Implementation of a generic KernelWorkItem Class - Kernel functionality for doorbell send to specific PIRs - Kernel changes to send core/thread Wakeup doorbells using doorbell_send() + placing KernelWorkItems on a cpu stack obj to be executed during doorbell wakeup - Kernel Interrupt Message handler changes to send wakeup msgs - Interrupt Resource Provider (INTRRP) Changes to handle wakeup msgs and monitor for timeouts - Changes to the IPL flow to invoke proper Core/Thread Wakeup - A basic outline (commented out) for how IPC messages can be implemented in the future Change-Id: I547fb8719bac657def561565ae11ab18cde72096 CMVC-Prereq: 992722 RTC:137564 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22815 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* HOSTBOOT: Support fused coresBrian Stegmiller2015-12-111-4/+67
| | | | | | | | | Change-Id: I2ad133be733ee9e41590b3b8bd60bd6abe69d1a9 RTC: 126786 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22054 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Base kernel changes for Nimbus/CumulusCorey Swenson2015-12-111-1/+7
| | | | | | | | | Change-Id: Ic5dfde1e975453d760631335bab674919e1109e7 RTC: 126637 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/18321 Tested-by: Jenkins Server Reviewed-by: Christian Geddes <crgeddes@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Changes to fix ipl-time checkstop FIR collectionaalugore2015-10-281-1/+8
| | | | | | | | | | | | | | | | | -Fulfill OCC requirement to be aligned on 1MB boundary -Use temporary memory buffer to hold OCC lid -Small change to how Hostboot loads FIR data to SRAM Change-Id: I561ec89c8e04fe9e820e9e2448a2d5cb26423a3a Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21293 Reviewed-by: WILLIAM G. HOFFA <wghoffa@us.ibm.com> Tested-by: Jenkins Server Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Tested-by: FSP CI Jenkins Reviewed-by: Brian H. Horton <brianh@linux.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Add Naples support to the kernelBrian Silver2014-06-231-0/+3
| | | | | | | | | Change-Id: Ie748454257938103bdb76d7ac1b5d425bc97d348 RTC: 107941 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/11298 Tested-by: Jenkins Server Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Change copyright prolog for all files to Apache.Patrick Williams2014-05-211-10/+10
| | | | | | | Change-Id: I5664587b4f889099290ef50d50fa9ce5e580e1eb Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/11167 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Use new scratch reg for hb_done and set early in IPLAndrew Geissler2014-03-131-7/+17
| | | | | | | | | | | | | | | | | This is to support using the scratch register for the power off message. I moved to a new scratch register since we were sharing with a SBE scratch reg that was needed early in HB IPL. NOTE! This will have a co-req with an FSP track so we'll need to coordinate. CMVC-Coreq: 917527 Change-Id: I5f81f15126d6ad8d2c9459c5afe730554256c037 RTC: 95818 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/9220 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: MIKE J. JONES <mjjones@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Workaround invalid SBE use of IPI inject registerDean Sanner2014-03-041-0/+2
| | | | | | | | | Change-Id: I40600399daf2ef563b534bd91143a4f45d00ff79 CQ: SW248610 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/9273 Tested-by: Jenkins Server Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Set hostboot_done scratch reg after all winkles and controlled shutdownAndrew Geissler2014-02-191-2/+12
| | | | | | | | Change-Id: Ie2887464cc57fe9d5974de5e8031d82f5c42fb06 CQ: SW246446 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/8808 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Missing HB interruptsDoug Gilbert2014-02-081-2/+3
| | | | | | | | CQ: SW244546 Change-Id: Ice49cdd7e4acd8168ec2cfc29e1970c5daa49780 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/8666 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Fix HRMOR offset calculation for TuletaDoug Gilbert2014-01-131-3/+4
| | | | | | | Change-Id: Idf8be3986fb3ebe0fb5a7914fa4981052b943c3e Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/8028 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* implement start_payload for multi-drawerDoug Gilbert2014-01-101-5/+59
| | | | | | | | RTC: 71994 Change-Id: I422f349d5588731a5e7cfc504d96e497958d6b95 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/7426 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Move scratch7 write earlier in IPL (SW222933)Dan Crowell2013-09-101-0/+7
| | | | | | | | Change-Id: I873a2b0d9d54ce60c1345a741aa238e5088b240a CQ: SW222933 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/6058 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Clear memstate on shutdown.Patrick Williams2013-08-191-0/+9
| | | | | | | | | | | | | | | - Erase memory state once we switch to the payload so the dump tools do not try to extract Hostboot (and waste a lot of time). - Add 'limit' option to fsp-memdump that will prevent dumping more than 8MB. Change-Id: I14f553b12383de5c27aa558d706450e0eb1c844c CQ: SW219324 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/5793 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Restore memory state scratch after winkle.Patrick Williams2013-08-091-0/+8
| | | | | | | | | | Change-Id: I4871fde72e73a767f57efcce4a4764fde4f32d1e CQ: SW210030 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/5742 Tested-by: Jenkins Server Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Basic devtree supportDean Sanner2013-08-091-1/+4
| | | | | | | | | | Simple devtree support for Sapphire in SPless mode Change-Id: I4a70bfc5cd3eb3dbd1b443869c046c789f98cc95 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/3739 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Enhance hb-dump to support full memory extraction.Patrick Williams2013-07-101-3/+5
| | | | | | | | | | Change-Id: I74823572a4935d3c8c4d7999d8c00c0286de1523 RTC: 50233 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/5170 Tested-by: Jenkins Server Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Secureboot memory layout support.Patrick Williams2013-06-141-0/+47
| | | | | | | | | | | | | | | | * Start kernel in 1/4 cache mode per Secureboot. * Copy Secureboot header for base image for later use. * Blind-purge bottom half of cache. * Add bottom of cache into memory maps for 1/2 cache mode. RTC: 64762 Change-Id: I1b45f30a2d45c9709d4fd486cfe0ca2ce86b051c Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/3773 Reviewed-by: Michael Baiocchi <baiocchi@us.ibm.com> Tested-by: Jenkins Server Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Clean up potential uninitialized object instances.Patrick Williams2013-05-011-4/+2
| | | | | | | | Change-Id: I859f94234d5672f55f745dd37b9662c310b694a7 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/4236 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Allow winkle of all threads for multi-drawer add.Patrick Williams2013-04-081-1/+94
| | | | | | | | | | | RTC: 63124 Change-Id: I1ad1d6bdf6a2848b686b25504fabddddb701d440 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/3813 Tested-by: Jenkins Server Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Michael Baiocchi <baiocchi@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Update Core Scratch Reg 6 with L3 vs Mainstore for FSP to queryMissy Connell2013-03-261-13/+48
| | | | | | | | | RTC:64829 Change-Id: Ic8e7983f6838b79c359c4cee2647b7676493cb1e Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/3564 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Change PLID printk to be hex.Patrick Williams2013-03-041-1/+1
| | | | | | | | Change-Id: Ifbfa8dce23f6ec086863bf83c1e5ae9e39dcc48a Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/3394 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Get realmem buffer for SLW output bufferMark Wenning2013-01-071-7/+4
| | | | | | | | Change-Id: I0ac43ab3eaeb5dfb9edc626a5a41e553988ec926 RTC: 52972 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2736 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Lockless trace implementationPatrick Williams2012-12-141-3/+0
| | | | | | | | | RTC: 35396 Change-Id: I96ea0d95606f04abb4dc2b0470345ca475b53912 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2520 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Expand memory footprint to full 8MB cache.Patrick Williams2012-11-141-0/+57
| | | | | | | | | | | | | | If fake PNOR isn't being used, we can expand our memory space to the full 8MB cache. There will be follow up work with RTC: 49137 to support 4MB degraded caches for bring-up. Change-Id: I1248efa37965f39ebab62aae556349c34aa24b66 RTC: 47356 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2319 Tested-by: Jenkins Server Reviewed-by: Melissa J. Connell <missyc@us.ibm.com> Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Terminate Immediate on a shutdown and assertMissy Connell2012-11-091-57/+85
| | | | | | | | Change-Id: I37c8956afb11c69201f4936821cff5e153327780 RTC:43793 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2194 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* pore_gen_cpuregMark Wenning2012-11-071-1/+1
| | | | | | | | | Change-Id: Ic5cb0817118bf0de7d706124708e5b8551ba4258 RTC: 41425 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1899 Tested-by: Jenkins Server Reviewed-by: Van H. Lee <vanlee@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Fixes for winkle state.Patrick Williams2012-09-211-1/+2
| | | | | | | | | | | | | | | | | | | The memory profiling tools sometimes encountered a condition where the kernel stack was becoming corrupted. I tracked it down to the winkle code storing the winkle-save state at the wrong end of the stack. Moving the winkle-save area to the bottom of the stack, which is where I originally intended it to go. Also noticed that the task issuing the winkle was in "running" state while waiting for the cores to come out of winkle. Ensure that the kernel updates the task state with a non-running status while we are waiting for winkle to complete. Change-Id: I07a56ea6f24cbc09362f9227d81915da5bc9f148 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1737 Tested-by: Jenkins Server Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Allow processors on logical nodes != 0.Patrick Williams2012-09-061-29/+23
| | | | | | | | | | | | | | | | | Created per-node arrays of CPU objects rather than a single array for the entire system. These are created dynamically as CPUs are enabled. Also disabled support for P7 due to the PIR layout being different and hence would have needed two different sets of assembly code. We have been running exclusively on the P8 Mambo model for a while. RTC: 42815 Change-Id: Ib92de8a7c07c2e700a3b7f0c03c64d484b447ca2 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1630 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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