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* Support HB running in SMFDean Sanner2018-09-241-0/+82
| | | | | | | | | | | | | | | | | | | | | | Support SMF for P9N/P9C. Lots of minor tweaks to make this work, but the biggest is to run userspace in problem state This is needed because for SMF Hostboot will need to run in S=1, HV=0,PR=1 (and kernel in S=1, HV=1, PR=0) This commit makes P9 HB userpsace run in HV=0 PR=1 and kernel in HV=1, PR=0. Change-Id: Ia4771df5e8858c6b7ae54b0746e62b283afb4bc4 RTC: 197243 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/50530 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Implement Interrupt Resource Provider Init for MPIPL Multi-Node SystemsBill Hoffa2018-05-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - In MPIPL the HW interrupt config could be such that interrupts will cross node boundaries. HB handles interrupts independently on each node - so initialize INTRP in a way to handle this transition. - Modify the MPIPL flow with the following changes: a) Set the Interrupt LSI State Machine to disabled b) Enable LSI Mode via the Interrupt Control Register c) Force all nodes to sync after steps a + b - Enable INTRP Multi-Node MPIPL Sync Code developed in P8 - Each node will now initialize its own internode_info data area during an initial IPL - Coalescing of the Host will modify this data to define all the nodes in the system - During the MPIPL each node can view each others area to determine when all nodes have reached the common sync point - Remove Legacy P8 MPIPL INTRP Code that is not used Change-Id: Idb742eafc7389f328ea7f506c4c4541c989e52b6 RTC: 182712 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57993 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Close race condition in multi instance IPCDean Sanner2018-02-161-3/+14
| | | | | | | | | | | | | | | | | | P9 Doorbells operate differently than P8 IPI mechanism, creating a race condition. Basically because the HB kernel turns a doorbell into a message, and then is ready for another one -- it can lose the next one since repeated messages with same key are dropped (IPC handling clears memory comm area, other HB instances notice, fill and drop a doorbell before getting back into kernel) Change-Id: I8eb6f010600afb9de365c8942fcd24227903436f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54118 Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Multi-Drawer (IPC) Interrupt/Messaging SupportBill Hoffa2018-01-251-3/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | - Use doorbells instead of IPIs (no IPI support using LSI interupts in the XIVE intr architecture) - New message type from kernel to userspace so the kernel can notify the HB userspace Interrupt Resource Provider (INTRP) that an IPC message was sent to the particular HB instance (in P8 this happened automatically as that was part of the IPI architecture). - Re-enable testcase that validates that an IPC message can be successfully sent. Change-Id: Ic846f8dca45217205ed61d8381a573e995cb16f2 RTC: 150861 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52004 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Enable waking threads on master core with doorbell interruptsBill Hoffa2016-05-171-2/+0
| | | | | | | | | | | | | Change-Id: Iceb33f0b8c802e7448e8b77200623048f7f7ab61 RTC: 141924 CMVC-Coreq: 993299 CMVC-Prereq: 994801 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23591 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Doorbell Interrupt Base Support for Core/Thread WakeupBill Hoffa2016-05-061-13/+15
| | | | | | | | | | | | | | | | | | | | | | | | | This change includes: - Implementation of a generic KernelWorkItem Class - Kernel functionality for doorbell send to specific PIRs - Kernel changes to send core/thread Wakeup doorbells using doorbell_send() + placing KernelWorkItems on a cpu stack obj to be executed during doorbell wakeup - Kernel Interrupt Message handler changes to send wakeup msgs - Interrupt Resource Provider (INTRRP) Changes to handle wakeup msgs and monitor for timeouts - Changes to the IPL flow to invoke proper Core/Thread Wakeup - A basic outline (commented out) for how IPC messages can be implemented in the future Change-Id: I547fb8719bac657def561565ae11ab18cde72096 CMVC-Prereq: 992722 RTC:137564 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22815 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* P9 PSIHB Base Interrupt SupportBill Hoffa2016-03-301-19/+16
| | | | | | | | | | | | | | | | | | | This change includes the following: - Kernel Updates to handle hypervisor interrupt vector - Interrupt Resource Provider changes to setup and handle LSI Based interrupts - Kernel updates to handle modified interrupt flow for LSI Based interrupts - Attribute updates for Scom BAR Registers Change-Id: If63f246a0090ab8c81c3fa8ac3ab6871a0af2e31 RTC:137561 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/20692 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Change copyright prolog for all files to Apache.Patrick Williams2014-05-211-10/+10
| | | | | | | Change-Id: I5664587b4f889099290ef50d50fa9ce5e580e1eb Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/11167 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Workaround invalid SBE use of IPI inject registerDean Sanner2014-03-041-0/+12
| | | | | | | | | Change-Id: I40600399daf2ef563b534bd91143a4f45d00ff79 CQ: SW248610 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/9273 Tested-by: Jenkins Server Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Fix interrupt msg loss on multiple interruptsDean Sanner2014-02-141-3/+7
| | | | | | | | CQ:SW247017 Change-Id: I66b27aeac0c23366deb390963edf5d88fbd8406c Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/8862 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Missing HB interruptsDoug Gilbert2014-02-081-2/+2
| | | | | | | | CQ: SW244546 Change-Id: Ice49cdd7e4acd8168ec2cfc29e1970c5daa49780 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/8666 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* IPC deadlockDoug Gilbert2014-01-101-1/+1
| | | | | | | | CQ: SW239987 Change-Id: I2a33e767916cd80ae3b4acc604104963cbc648ac Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/7828 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Handle winkle-wakeup times in slave cores.Patrick Williams2013-11-071-1/+6
| | | | | | | | Change-Id: I6978d66ecfdef57da9754e6251d2ac1d3d078210 RTC: 73559 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/6851 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Handle interrupts on MPIPLDean Sanner2013-08-211-0/+14
| | | | | | | Change-Id: I315d5c802819bf6f16cd6adbffe77530bd42699a Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/5427 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Prevent flood of interrupts early in host boot start-up on MPIPL.Doug Gilbert2013-07-011-10/+29
| | | | | | | | | | | RTC: 72995 CQ: SW181350 Change-Id: Ia1061c4fc28987227a8cb5f02a539de9851863b8 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/4922 Tested-by: Jenkins Server Reviewed-by: Van H. Lee <vanlee@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Inter-processor communications for multinodeDoug Gilbert2013-05-161-9/+2
| | | | | | | | RTC: 63128 Change-Id: Ica27c7f714bc8b874c9bccb663a32d3cfba37c5a Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/4193 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Add thread-safety to kernel interrupt handler.Patrick Williams2013-04-181-0/+4
| | | | | | | | | | | | | | | | | | | | The interrupt handling was originally written with the intent that only a single thread would receive interrupts. We purposefully program the Interrupt Presenter hardware to route all interrupts to a single core. IPIs (Inter-processor Interrupts) are not routable by the ICP and end up being delivered to the targeted thread. When we trigger a winkle-wakeup of a thread, that thread gets the IPI interrupt. Since we broadcast the IPI to all threads on a core there is potential for multiple threads to be using the interrupt object at once. Hence, we added a spinlock to protect it. Change-Id: I736de774496b13cc9f344d389b9f249bbabeb036 Tested-by: Jenkins Server Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Fixes for GCC 4.7Patrick Williams2013-04-171-2/+3
| | | | | | | Change-Id: Ief0b9202e13bd70cf0de84ca3cb20f5c6df4d3d8 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/4035 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Allow winkle of all threads for multi-drawer add.Patrick Williams2013-04-081-2/+15
| | | | | | | | | | | RTC: 63124 Change-Id: I1ad1d6bdf6a2848b686b25504fabddddb701d440 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/3813 Tested-by: Jenkins Server Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Michael Baiocchi <baiocchi@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Switch Interrupt Presenter to get ICPBAR value from an attributeDoug Gilbert2012-12-141-56/+71
| | | | | | | | Change-Id: I5d95f3e3e2d803f07c7d8f3bf2d8ee522e1b4519 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2406 Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com> Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Support for core_activate via IPI.Patrick Williams2012-07-161-4/+9
| | | | | | | | RTC: 37009 Change-Id: I56669805c86d9659a20ad7c26e5e9860c7a248c7 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1087 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Fix task deadlock in VMM flush operation.Patrick Williams2012-06-181-42/+23
| | | | | | | | Change-Id: I6f5f44009f8b6e76ac660977c567b35400980b22 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1204 Tested-by: Jenkins Server Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* INTR set IPCBAR scom reg on init and add INTR shutdown interfaceDoug Gilbert2012-05-111-4/+11
| | | | | | | | | | RTC: 39730 Change-Id: Ib548202f6f935b46cd92e0ddbf48d19b5ff6679a Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/977 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Save current task in interrupt path.Patrick Williams2012-03-151-2/+26
| | | | | | | | Change-Id: I4cdcf3b4f93bd75aca4a495f3faa16af9ba217d7 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/753 Tested-by: Jenkins Server Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Interrupt presenter implementationDoug Gilbert2012-01-051-0/+125
Change-Id: If6b499d819b71298b8a64e096e1eb83c639ad645 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/517 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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