| Commit message (Collapse) | Author | Age | Files | Lines |
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Change-Id: I859f94234d5672f55f745dd37b9662c310b694a7
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/4236
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Added a new access type of BYPASS_HRMOR that the ptmgr will
support when a PTE is added, so that blocks can support
addresses which do not have the HRMOR applied.
This is needed so that mm_linear_map will work correctly when
HRMOR != 0.
Change-Id: Ie4599d63a4454f425e0a0964b02fec7075c4401e
RTC: 60665
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2733
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Add mmLinearMap to create block at a specified phys addr.
Added iv_MaptoPhy in the block to indicate we are physically mapped
block and to not apply the HRMOR.
Change-Id: I75ddb19b82ae9a2035ff873edff8a34a33c74639
RTC:43401
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1846
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Changes to kernel code to support detection and use of HRMOR
offset in memory
Changes to tooling to handle the real memory offset
New interface to retrieve the physical address that
corresponds to a virtual address
To test, run these commands before starting up Hostboot:
system_cmp0.cpu0_0_05_0.write-reg HRMOR 0x8000000
proc_venicechip_cmp0.phys_mem.del-map p8Proc0.l3_cache_ram 0 0
RTC: 46032
Change-Id: I50ab248f941218a3a14a8f0fc12a551b56dc7cf3
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1553
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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- Changed overall page table behavior to no longer use C bits
in page table entries. Instead, individual blocks mark
pages as dirty based on stores during page faults. Initially
all writable pages are marked read-only until the first store
to it. At that time the block gets an exception and changes
the permission on the page table entry to writable and marks
its own SPTE to dirty.
- Greatly reduced the number of tlbie's and page table accesses.
Accomplished this by:
* Skipping many of the page table manipulations, such as
LRU updates, when the PTE is invalid.
* Converting most of the previously general-case of
"Modifying a PTE" to specific cases such as "Resetting
the Reference Bit" and "Modifying the SW field".
- Fixed the LRU-flush algorithm so that it is O(n) instead of
O(n^2), where n = size of page table.
Change-Id: I2520fa88970fd7f656e6348bf6b34d5db82fd3db
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/892
Tested-by: Jenkins Server
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: Iaac392b9f4287ba888e454532c4061d6a14c6e5c
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/593
Tested-by: Jenkins Server
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
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Previously, when we map a page into a high virtual address we
unmap that same page from the low heap address range (by
setting the permissions to NO_ACCESS). This commit changes
the behavior to only prevent writes to the heap range by
setting the permissions to READ_ONLY.
The heap management code uses atomic instructions to manage a
stack of free pages (see PageManager::allocatePage). There
was a race condition where two threads would both be allocating
a page at the same time; one of which was a kernel thread
fulfilling a VMM exception by allocating a page. Due to the
way Simics emulates hardware threads, by the time the other
thread executed the load instruction to find Head->Next of the
free page stack, the permissions were already changed on the
page containing Head, such that the load would fail with a
data storage exception.
There were a few other possible changes proposed for this fix
and this seemed like the most straight-forward. Others were:
1) Change heap management to not have the stack nodes on
the pages themselves but allocate a separate set of
nodes. This would cause a large re-write to the PageMgr.
2) Identify the data storage exception and interrogate the
corresponding instruction address that raised the
instruction. If the instruction was in PageManager,
treat it as a spurious instruction, advance the NIP, and
continue execution.
The change to READ_ONLY instead of NO_ACCESS should have little
impact. The original intent of using NO_ACCESS was to better
catch bad address and buffer overrun bugs. In most cases, the
erroring code is going to attempt a write to the bad address, so
this situation will still be caught. Since there is a single
address space, this feature was mostly to detect bad code writing
on top of instructions, which READ_ONLY will still detect.
Change-Id: I454f2fd51aeea55592e4fe3b8969f7667d7e97a6
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/605
Tested-by: Jenkins Server
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: MATTHEW S. BARTH <msbarth@us.ibm.com>
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Change-Id: Id9371157bd51a7c646fd9b7440d09532e68c0577
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/579
Tested-by: Jenkins Server
Reviewed-by: MATTHEW S. BARTH <msbarth@us.ibm.com>
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
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no_access SPTE entry
Change-Id: I66e0aa4f47819dd2cc4be69ff6f18ca1d4a851e4
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/484
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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MERGED changes.. only need Patrick and Mark to review extintsvctasks.H
Change-Id: Iba5814e1b5913c6181a2be96df9682555fa2ab58
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/458
Tested-by: Jenkins Server
Reviewed-by: Melissa J. Connell <missyc@us.ibm.com>
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Change-Id: I79b9cfad5d80267c6709b094d7f852d89e08534b
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/452
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: Ic0bb4122164e11f6d13e6850abf8ae9bd32caea2
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/393
Tested-by: Jenkins Server
Reviewed-by: MATTHEW S. BARTH <msbarth@us.ibm.com>
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Add code that applies the permissions requested.
Add merge conflicts
Change-Id: I5911406ba4670714faaf4880399da71692559397
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/353
Tested-by: Jenkins Server
Reviewed-by: Melissa J. Connell <missyc@us.ibm.com>
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Change-Id: Icce8e01f3d1cd2942f2b9ff802993da0441535ee
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/344
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
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path to update the LRU statistics when the PageTableManager code
clears the reference bit. This is not meant to be a complete
implementation (different Task is open for that).
This is Task 3400.
Change-Id: If67efd16ead6f68a74f5f5a698013c1b852864d9
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/231
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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- Create stack segment.
- Allocate stack blocks on stack create.
Change-Id: Ida90055afb68f208c479b5fdc19d3d931d026105
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/271
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: Ib582703a77a7000440db2fec88c6a76644ec35bc
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/284
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: Id18e604facd517598a18968af3dff927026ad894
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/272
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: Ieb56aa89190d7efd56c357245b24a979ee7ad79a
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/270
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: I205f2409e56032cfc0aaf01d7e26d357f0b86373
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/277
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Tested-by: Jenkins Server
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Change-Id: I65be2258e5e6bd707797415a5376fd94c3bab68a
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/265
Tested-by: Jenkins Server
Reviewed-by: MATTHEW S. BARTH <msbarth@us.ibm.com>
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- Block-traversal logic.
- Memory leaks in message interface.
- Race condition in message interface.
Change-Id: I7b341b174593e04624975cdd589745587e461e14
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/263
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: MATTHEW S. BARTH <msbarth@us.ibm.com>
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Change-Id: I4f1775b6a843140be97f3c328155aa1654086723
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/254
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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- Segment Manager
- Base / Device Segments
- Block for Base image.
Change-Id: Ic0c058e5c5b210ec1c48d30f6ed9f9837d74a3c8
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/193
Tested-by: Jenkins Server
Reviewed-by: MATTHEW S. BARTH <msbarth@us.ibm.com>
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