| Commit message (Collapse) | Author | Age | Files | Lines |
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This commit adds an interface to read the HW Key Hash located in the HBBL
section of each Processor's two SBE Seeproms.
Change-Id: I906434269746c296c646f7b0594575c58b145294
RTC: 167585
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38465
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
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Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Reviewed-by: Stephen M. Cprek <smcprek@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Add code to initialize TPM Info on OpenPower systems to the correct
length and to all zeros.
Change-Id: Ica2cd689cdc32e93746f68fa613c8dfbca1740bc
RTC:166834
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36967
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
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Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Reviewed-by: Stephen M. Cprek <smcprek@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Add the ability to store TPM Related Information in HDAT for
OpenPower systems.
Change-Id: I3782ac3d5717565cacc60902c35178ec013b7711
RTC:166834
Signed-off-by: Jaymes Wilks <mjwilks@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36374
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
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Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Reviewed-by: Stephen M. Cprek <smcprek@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Thermal Control CMD data enhancments.
AVS Bus Data enhancments.
OCC checkpoint fix.
Change-Id: Iaefe4a2a7cfd8408aefeafe818245524be84c253
RTC:170737
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38370
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Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I1671459ca58684b14f65f322ff6dccddcaad40a2
RTC: 170685
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38104
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Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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RTC: 149253
Change-Id: Id9325ca0fd1b59c21a46a5af495cd944753ab27d
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35362
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Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Reviewed-by: Prachi Gupta <pragupta@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I42ec4de748bcfaf1efd41680e087b9664539a69f
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37608
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
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Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Caleb N. Palmer <cnpalmer@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: Ica8b6a87612d961e337a164d8c67d3f6531e118e
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34869
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Reviewed-by: Jayashankar Padath <jayashankar.padath@in.ibm.com>
Reviewed-by: Elizabeth K. Liner <eliner@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
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This reverts commit a0c2aa6132a0b49975327f5aa9238d1d3e2b750b.
Change-Id: I6cfe36de59e6981ff23aa7d9aea1474f14729d2d
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38362
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Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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This catches if the const array size does not match the number of
pnor sections and out of range index errors
Also it adds genErrlParsing for bootloader files
Change-Id: I0a90816a7620022dec16bc7358a68ffbdade0083
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38159
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
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Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
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Base SBE boot side for slave processor off SB keyword in MVPD rather
than off boot side used by master processor.
Change-Id: I3165d536f104c0d1f394de93a390bd0f722e4777
CQ: SW383676
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38152
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Reviewed-by: Richard J. Knight <rjknight@us.ibm.com>
Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Add the new Host interface for SBE message passing.
Change-Id: I220a864a072bcc60cc873cde243a28cc899e2722
RTC:170759
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37694
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Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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This commit traces the HwKeyHash to Secureboot-specific error logs. It also
adds the infrastucture necessary to parse secureboot-specific errorlog user
data sections. It includes 2 new custom sections: one which is used in this
commit, and another which will be used in a future commit.
Change-Id: Id5fb115ad1214f956e5256d3641236021e4642ab
RTC:165205
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37901
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Reviewed-by: Stephen M. Cprek <smcprek@us.ibm.com>
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Reviewed-by: Marshall J. Wilks <mjwilks@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Disable verification in bootloader if SAB not set
Change-Id: If5f1adcbe0277f2a4223d8cea6a5e2048019871d
RTC: 167741
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37214
Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
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Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Add sbe_sp_intf.H from SBE repository to include SBE variables from SBE
Change-Id: I49aa987ab4b81b94939791571f005aa29338b36e
RTC: 169436
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36560
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Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Reviewed-by: Prachi Gupta <pragupta@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: Ia731f7ee2fff280d078da9878322f69beb3aa7cc
RTC: 167581
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36221
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Reviewed-by: Stephen M. Cprek <smcprek@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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This commit adds a trace of the Security Switch and CBS Control/Status
registers for all processors in the system. These registers are also
captured for Security-specific error logs.
Change-Id: I245815c720725a9aaf15a3cbad9a50b3288fc1f9
RTC:165205
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37290
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Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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During MPIPL we need to power down the slave quads before
we get to istep 16 which will power them on. The master quad has
been reset already by the SBE so now we just need to do the slaves
Change-Id: I98dcbcf8a8ef561a06ae44f72de8b357cdd95cfa
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36834
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Reviewed-by: Richard J. Knight <rjknight@us.ibm.com>
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Pre-emptively adding the RC we will use to indicate to HWSV
that we need to trigger a reconfig loop to recover the SBE.
This RC will be used in cases where the SBE on the master proc
has died completely. Since the SBE is dead, HWSV cannot do
a HB dump like they normally would for a HB TI. Nor would any
of our error logs have made their way to the FSP.
Change-Id: Ic831dd81ceac37913b9c7323562e4020aab064dc
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36509
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Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Reviewed-by: Manish K. Chowdhary <manichow@in.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I82c5b42c2167970437dae1323aa4aabed62068c9
RTC:158762
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37514
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Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Create Bootloader to hostboot data manager to control how
the shared data is accessed and modified.
Change-Id: I54cb543ed289810ab6afb07d333313f5662bce0e
RTC: 166848
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35617
Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Created new PVR_t structure that understands how to decode the
PVR for Nimbus DD1 and future versions.
Change-Id: Ie7e6f62d65fb1a3e11b1021f1600e7421b8c30a9
RTC: 160361
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37303
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
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Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Reviewed-by: Matthew A. Ploetz <maploetz@us.ibm.com>
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Change-Id: I839daf3fc44e3459a9c6c147703fd671c5ec79a8
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36971
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Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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This commit adds a global that keeps track of when targeting has
loaded along with functions to get and set this global.
Change-Id: Iddd65018918089163ebc03f042bfdd1bed31e730
RTC:165205
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37595
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The bootloader to hostboot structure is data that is filled
in by the bootloader and used by hostboot code. This is used
for things like getting the securerom code, hwkeyshash, and
hbb header
Change-Id: I04a228b0f1d5a6f6d0b02bf87f3564f6ef95e7a3
RTC: 166848
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35762
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Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: Ie8460ecdf67cd99ab422fe52c4ec936f4c0aa8f1
RTC:165514
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36117
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This commit adds the base support for hostboot to enable/disable the
use of TCEs. It allows for the creation and managment of a TCE table
and also initializes the P9 processors to use this table.
Change-Id: Idb40f9df5a90d8b7e87b2f5b745cbe7e66109df2
RTC:145071
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32562
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Reviewed-by: Marshall J. Wilks <mjwilks@us.ibm.com>
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
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Change-Id: Ief02e10fc85d09b837e20dfb529186e2da4269fd
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35935
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Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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If the element is present, set a flag in the PNOR TOC. Other
code, like BMC code, would then erase these partitions when
the system is reprovisioned.
RTC: 143305
Forwardport: yes
Change-Id: I457895f65d81e0a971bf301f16be2921dc21a24a
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/20576
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Stephen M. Cprek <smcprek@us.ibm.com>
Reviewed-by: Elizabeth K. Liner <eliner@us.ibm.com>
Reviewed-by: Matthew A. Ploetz <maploetz@us.ibm.com>
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Currently, there are two version of the MVPD PG keyword:
- E44D == XBUS0 bad
- E45D and E55D == XBUS0 and 2 bad
Spec indicates that both iox (second nibble) and pbiox
(third nibble) are bad for sforza and monza type modules.
We support generically the following cases:
- 0xE50D --> xbus chiplet good
- 0xE40D --> xbus chiplet good
and rely solely on the pbiox as the Xbus target indicator
(0x0040, 0x0020, 0x0010) for all types of chips.
Change-Id: If7a3c128180321adab083f3e40f2dd0a645318e7
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37007
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I5a7ee986f3dbd7b703284207f522f150f59fca3b
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37242
Reviewed-by: Stephen M. Cprek <smcprek@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Reviewed-by: Marshall J. Wilks <mjwilks@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Add handling of TPM deconfig and SBE Secure Seeprom Lock by
integrating the hardware procedure p9_update_security_ctrl into
Istep 10.3 and retriggering the hardware procedure any time a
TPM fails.
Change-Id: I36f57dc7aef3de6661357736a525fe25a3828c6e
RTC:153891
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36189
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Reviewed-by: Stephen M. Cprek <smcprek@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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- Added mailbox scratch register 7 definition
- Added DRTM functions
- Added set/clear security switch register functions
- Added additional security switch bit definitions
- Added secureboot extended library to host DRTM functions
- Inhibited TPM start command in DRTM flow
- Added new config options for DRTM and DRTM RIT protection
- Added new DRTM attribute to indicate if DRTM is active
- Added new DRTM attribute to hold DRTM payload address
- Added new DRTM attribute to initiate DRTM in lieu of loading payload
- Updated target service init to determine DRTM settings
- Updated host start payload step to initiate DRTM if conditions are met
- Updated host MPIPL service to verify DRTM payload and clean up DRTM HW state
- Updated host gard step to verify DRTM HW state
- Rerouted PCR extensions to PCR 17 in DRTM boot
- Use locality 2 for all PCR extensions in DRTM boot
- Inhibit extension logging (for now) in DRTM boot
- Only extend seperator to PCR 17 in DRTM boot
Change-Id: Id52c36c3a64ca002571396d605caa308d9dc0199
RTC: 157140
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35633
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Reviewed-by: Stephen M. Cprek <smcprek@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Timothy R. Block <block@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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The HBBL also contains the securerom code and hw keys' hash
for verification purposes. So looking for the end of the HBBL
code leaves out those sections
Change-Id: I73a1b5c50e3a5b3f642ca569b90e79dbe4c4ba1e
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35979
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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- support for P-State parameter block
- implements a compact image layout of PGPE similar to CME/SGPE.
- adds PGPE boot progress code as a field in PPMR header.
- implements PGPE boot loader and PGPE boot copier.
- incorporates ability to generate PPMR header in the build flow.
- change logic for calculating CME's first block copy length.
- Turned on generated tables in PGPE Hcode
- Fixed up pointers to generated tables
- add ATTR_PGPE_HCODE_FUNCTION_ENABLE attribute to control PGPE ops
- fix p9_pstate_parameter_build bug with AVS timing attributes
- Make OCC Pstate Parameter block a fixed offset (128KB) in PPMR
- Make Pstate Table from PGPE a fixed offset (144KB) in PPMR to ease debug
- Fix Endianes issues in OCC PPB and input slope calcs
- Added PGPE Hcode Length to PGPE header so that GPPB SRAM location is known.
- Build flag for OCc Immediate IPC response
- Build flag to no use temp boot settings
- Expanding tracing for debug
- Added default values for PBAX attributes as placeholders for MRW in firmware
- Added WOF VFRT structure definions to headers; movement into HOMER NOT
yet supported
- Addressed review comments and rebased
- Rebased with ATTR_PGPE_HCODE_FUNCTION_ENABLE in separate commit for Cronus
Change-Id: I4752debbc7fb3275d4e79804333654511de427ff
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/26115
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: ASHISH A. MORE <ashish.more@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/26116
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: Iaa4e93e5dcb838e16c44666493504258587658bc
RTC:169102
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36259
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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This reverts commit 9b188cdec934275ce65eab3ade91398fdec4ddb9.
Change-Id: I6e61680c204734638b03f628abb1d0e4d4f590e8
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36983
Reviewed-by: STEWART E. SMITH <stewart@linux.vnet.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
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getattr : read an attribute
readpnor : read data from pnor flash
getscom : read a scom register
putscom : write a scom register
errorlog : create and commit an error log
Change-Id: Id401915c998e5b59b0d940a51a4c60a593efe3e7
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35739
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Elizabeth K. Liner <eliner@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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The HB Bootloader now owns the responsibility of selecting the
appropriate side of PNOR to use when loading the HBB image. There
is no longer a HBB pointer in the SBE image itself. This commit
removes the code that dealt with that support. There is also
some cleaning up of a few other related functions.
Change-Id: I35bfccb3590f81867d8222333cb4be66718828fa
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36358
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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- Original code was repeatedly allocating/freeing 256K chunks of
heap memory
- Other tasks in the background fragmented the allocations and
could lead to out of memory conditions on large core number
parts
- Fix is to allocation one large chunk up front and use that for
all operations
Change-Id: Ie6df7eb9ebce526d87480425e842f8d1be8d78d4
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36920
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Fixed the sbe-based scan code to work on non-master processors
Did a little house cleaning of the scan code as well
Change-Id: I13256bc9c7adc6fddecbf05d7ebe4f3c9c4b0b96
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35910
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Make MVPD additions and updates to add support for #W keyword.
Change-Id: Id124bc5bdb5c6336b042ff7f41250626643a608e
RTC:162011
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36637
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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This is the first of two commits, this includes the I2C information
that hostboot is already aware of (EEProm and TPM). There will be
a later commit that pulls in the new information from the MRW.
Change-Id: I33b0cd7784b242de3b68a3e7b07527604d819c23
RTC:161649
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32437
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Reviewed-by: NAGENDRA K. GURRAM <nagendra.g@in.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Also cleanup the spacing on some of the old declarations.
Change-Id: I0c0422effb11729b28b77a7363138663d59009c6
Signed-off-by: William A. Kennington III <wak@google.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36504
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: If7fc837fa5a559de329e74fd59a36ed900ce2da1
Signed-off-by: William A. Kennington III <wak@google.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36503
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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The WOFDATA partition will contain the VFRT data that is used
for the WOF algorithm. The data is system-specific but was
split out from the MRW due to its extreme size.
Change-Id: I73a062038897987d6a989c77d6163db058cb8dc0
RTC: 167303
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35651
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I985c68fce91241acdd2370e00c6871f1ac4d6c37
Signed-off-by: William A. Kennington III <wak@google.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36502
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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There is a shared resource between the XSCOM and LPC logic that
leads to errors at the XSCOM level causing errors to be detected
during LPC operations. This commit adds an external interface
to access block LPC operations while an XSCOM operation is in
flight.
Change-Id: I571094dfb666aa9198fabec5280a0f45c62c90ba
RTC: 167291
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36399
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I515a328e50536d92f0ab80229cd8d939f89412c7
RTC:127358
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35008
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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The CRP0 record has 8 records (L1-L8) that correspond to the 8 ports
(MCA targets) for the chip. One of the fields inside the keyword indicates
if the port is disabled. This field marks the MCA as non-functional, but
the MCA remains present.
Change-Id: I2c7c89c9567ec9f048a426b2204b18e10ccda601
RTC:166354
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34256
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
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