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* VPO updates for constrained mem, hbbl, simicsDean Sanner2016-08-172-1/+9
| | | | | | | | | | Change-Id: I2302776822f9aa599adb3d134514149c4468f32e Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/26577 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-by: Marshall J. Wilks <mjwilks@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Updates for new scratch registers in P9Andrew Geissler2016-08-161-2/+1
| | | | | | | | | | | | | | | P9 moves us from 8 scratch registers to 4. This commit handles this change and also adds the base support for partial cache. Change-Id: Ibe050c663744285dd3e77850649236a669dadbd6 RTC: 150923 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27462 Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Handle 8MB reduced cache modeMarty Gloff2016-08-102-6/+12
| | | | | | | | | | | | Check scom register (0x1001181B) for reduced cache mode and expand the memory footprint appropriately, reduced 8MB or full 10MB. Change-Id: I5920572077cdcee317e7b3b9abe999e6de295459 RTC:152954 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27522 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Replace NAP with STOP instructionBrian Stegmiller2016-08-071-0/+7
| | | | | | | | | Change-Id: I58a382cfc285e37cc8748fe8e23f71c877850263 RTC: 130186 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/816 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Change partition table from 4K to 64KCorey Swenson2016-05-191-4/+4
| | | | | | | | | Change-Id: I5cc08599e81b04b57c936c240b2cd7d07531d90f RTC:148595 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22158 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Enable waking threads on master core with doorbell interruptsBill Hoffa2016-05-171-1/+2
| | | | | | | | | | | | | Change-Id: Iceb33f0b8c802e7448e8b77200623048f7f7ab61 RTC: 141924 CMVC-Coreq: 993299 CMVC-Prereq: 994801 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23591 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Doorbell Interrupt Base Support for Core/Thread WakeupBill Hoffa2016-05-064-7/+105
| | | | | | | | | | | | | | | | | | | | | | | | | This change includes: - Implementation of a generic KernelWorkItem Class - Kernel functionality for doorbell send to specific PIRs - Kernel changes to send core/thread Wakeup doorbells using doorbell_send() + placing KernelWorkItems on a cpu stack obj to be executed during doorbell wakeup - Kernel Interrupt Message handler changes to send wakeup msgs - Interrupt Resource Provider (INTRRP) Changes to handle wakeup msgs and monitor for timeouts - Changes to the IPL flow to invoke proper Core/Thread Wakeup - A basic outline (commented out) for how IPC messages can be implemented in the future Change-Id: I547fb8719bac657def561565ae11ab18cde72096 CMVC-Prereq: 992722 RTC:137564 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22815 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add doorbell support.Patrick Williams2016-04-041-0/+41
| | | | | | | | | | | Change-Id: I4c5ef96c4793f6da26d54d1d61a51f6395e6b34b Backport: master-p8 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/930 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Tested-by: FSP CI Jenkins Reviewed-by: Matthew A. Ploetz <maploetz@us.ibm.com>
* P9 PSIHB Base Interrupt SupportBill Hoffa2016-03-302-14/+17
| | | | | | | | | | | | | | | | | | | This change includes the following: - Kernel Updates to handle hypervisor interrupt vector - Interrupt Resource Provider changes to setup and handle LSI Based interrupts - Kernel updates to handle modified interrupt flow for LSI Based interrupts - Attribute updates for Scom BAR Registers Change-Id: If63f246a0090ab8c81c3fa8ac3ab6871a0af2e31 RTC:137561 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/20692 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Update constants and comments for P9 PIR formatDan Crowell2016-02-291-9/+12
| | | | | | | | | | | | | | | Implemented a set of macros and constants that can be used everywhere to translate a PIR into its component parts and pull out individual pieces of data from a complete PIR. Also added and updated the references to the old ATTR_FABRIC_NODE_ID with ATTR_FABRIC_GROUP_ID. Change-Id: If9735f53940e5849a648729e4bf8ca0cfbb09f6e RTC: 88055 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/706 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* HOSTBOOT: Support fused coresBrian Stegmiller2015-12-112-8/+18
| | | | | | | | | Change-Id: I2ad133be733ee9e41590b3b8bd60bd6abe69d1a9 RTC: 126786 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22054 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* P9 page table changesCorey Swenson2015-12-113-8/+66
| | | | | | | | | | Change-Id: Ic5f234e0ce0747f887a706054f82372c9a96258c RTC:126640 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/19041 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: WILLIAM G. HOFFA <wghoffa@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* libc support for thread-local storagePatrick Williams2015-12-112-2/+10
| | | | | | | | | | RTC: 124148 Change-Id: I055885bc7d7cfc4ebd7cf1a662f677bdf4e28c62 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22313 Tested-by: Jenkins Server Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Reviewed-by: Brian Silver <bsilver@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Prevent out-of-order data access to FSP mailbox memory areaNick Bofferding2015-04-093-10/+30
| | | | | | | | | | | | | | | | | | - Added system call to map FSP mailbox memory with guard permission - Call new mapping in DMA area init - Propagate guard permission down to MMIO map - Apply guard permission in page fault handler - Updated debug tools to support extra bit in MMIO struct Change-Id: I8335ac7d3ef57e46d4c8b6c2b2a42b8a0bf7c4b0 Backport: release-fips830 Backport: release-fips820 CQ: SW295345 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/16307 Tested-by: Jenkins Server Reviewed-by: Brian H. Horton <brianh@linux.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Reduce memory fragementation in large allocationsNick Bofferding2015-03-011-2/+9
| | | | | | | | | | | - Free excess allocation pages in reverse order Change-Id: I4c5f2909275e2d3dc71b0806fbf177a101b47292 CQ: FW633822 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/16066 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Fix spelling mistakes using codespell.Patrick Williams2015-01-155-12/+20
| | | | | | | | | | | | - See https://github.com/lucasdemarchi/codespell Change-Id: I03e102d1ebb9473b6226fa9b6edb684fa0218a2f Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/15031 Tested-by: Jenkins Server Reviewed-by: STEPHEN M. CPREK <smcprek@us.ibm.com> Reviewed-by: Zane Shelley <zshelle@us.ibm.com> Reviewed-by: Brian Silver <bsilver@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Removing SRCword1 as it is reserved by FSP SRCI compPrachi Gupta2014-09-151-3/+5
| | | | | | | | | | | Change-Id: Id9bc30fde8af5ca324513e11a96d36d61c6c9135 CQ: SW273044 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/12909 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: STEPHEN M. CPREK <smcprek@us.ibm.com> Reviewed-by: Brian H. Horton <brianh@linux.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Populate actual PVR value instead of architected versionDean Sanner2014-07-221-1/+5
| | | | | | | Change-Id: I5d19166fe949394fae536f5165ce6138be7f820b Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/12277 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Restrict timebase sync to once per core.Patrick Williams2014-07-171-3/+7
| | | | | | | | | | | | | | | | | | | | | As part of Id3a3bc0b7367e61f2725af17975fe3ba068f69a9, I fixed the deferred work queue to not leak work objects if there are multiple objects. When cores wake up, each thread inserts a work object to synchronize its timebase. Now that they are not leaking, we are running this 8 times, which is causing enough clock drift that we are getting passed the timeout for core wakeups. Modify deferred work queue to allow us to skip performing work if there is already an outstanding deferred work object. This will return us to running the timebase sync just once. Change-Id: Iccffeb9d0578dcd08d41d41ca6af1b82388e7e34 RTC: 111512 Backport: release-fips811 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/12281 Tested-by: Jenkins Server Reviewed-by: Brian Silver <bsilver@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Change copyright prolog for all files to Apache.Patrick Williams2014-05-2139-567/+566
| | | | | | | Change-Id: I5664587b4f889099290ef50d50fa9ce5e580e1eb Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/11167 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Use per-core mutex for XSCOM for P8 errata.Patrick Williams2014-04-031-2/+2
| | | | | | | | | | | | | | | | See HW822317. The HMER register in P8 is not implemented to handle multi-threaded XSCOM properly, so we need to move the XSCOM mutex from per-thread to per-core. Also, there is an issue where the 'done' bit can come on 1 cycle before the error indicators, so need to potentially read the HMER a second time. Change-Id: I495031a6e425fe7d5c6ffef8dda1e7a71caac9f2 CQ: SW250902 Backport: release-fips810 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/9929 Reviewed-by: Michael Baiocchi <baiocchi@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com> Tested-by: Jenkins Server
* Add printk error log UD and collect on task crash.Patrick Williams2014-04-031-1/+3
| | | | | | | | | | | | | | | | - Create a new UserDetails section for error log. - Modify initservice utility for launching tasks (shared by initservice and istepdispatcher) to collect this when a task has crashed. Change-Id: I1273457fcc3879b9e2ca91b636281225a8f79136 CQ: SW254145 Backport: release-fips810 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/9985 Tested-by: Jenkins Server Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com> Reviewed-by: STEPHEN M. CPREK <smcprek@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Use new scratch reg for hb_done and set early in IPLAndrew Geissler2014-03-131-0/+15
| | | | | | | | | | | | | | | | | This is to support using the scratch register for the power off message. I moved to a new scratch register since we were sharing with a SBE scratch reg that was needed early in HB IPL. NOTE! This will have a co-req with an FSP track so we'll need to coordinate. CMVC-Coreq: 917527 Change-Id: I5f81f15126d6ad8d2c9459c5afe730554256c037 RTC: 95818 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/9220 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: MIKE J. JONES <mjjones@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Workaround invalid SBE use of IPI inject registerDean Sanner2014-03-041-0/+6
| | | | | | | | | Change-Id: I40600399daf2ef563b534bd91143a4f45d00ff79 CQ: SW248610 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/9273 Tested-by: Jenkins Server Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Resolve OOM due to Stampeding Herd issue in PageMgr.Patrick Williams2014-03-021-2/+2
| | | | | | | | | | Change-Id: Iccf938f8d2ee2b56747a6e266ced3ec957b6a46e CQ: SW247870 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/9120 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Missing HB interruptsDoug Gilbert2014-02-081-2/+5
| | | | | | | | CQ: SW244546 Change-Id: Ice49cdd7e4acd8168ec2cfc29e1970c5daa49780 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/8666 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Improve robustness of 'free' flag in HeapMgr.Patrick Williams2014-01-151-4/+4
| | | | | | | | | Change-Id: Iea61e36289410540710ced9bb0098c3fadc4e6a4 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/8055 Tested-by: Jenkins Server Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* implement start_payload for multi-drawerDoug Gilbert2014-01-102-1/+27
| | | | | | | | RTC: 71994 Change-Id: I422f349d5588731a5e7cfc504d96e497958d6b95 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/7426 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* IPC deadlockDoug Gilbert2014-01-101-1/+5
| | | | | | | | CQ: SW239987 Change-Id: I2a33e767916cd80ae3b4acc604104963cbc648ac Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/7828 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Force TIs for unhandled exceptionsPatrick Williams2013-12-092-0/+2
| | | | | | | | | | Change-Id: I743687d7072af303e62d638a7ee5ad6f89afbccb RTC: 89403 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/7484 Tested-by: Jenkins Server Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Handle winkle-wakeup times in slave cores.Patrick Williams2013-11-071-1/+1
| | | | | | | | Change-Id: I6978d66ecfdef57da9754e6251d2ac1d3d078210 RTC: 73559 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/6851 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Fixed performance issues in SIMICS IPLStephen Cprek2013-10-311-23/+23
| | | | | | | | Change-Id: Iccce5b641d0e2dc414bacc143a6b3e186f4e49ab CQ: SW224728 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/6960 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Ensure PLIDs are 32bits.Patrick Williams2013-10-282-5/+6
| | | | | | | | | | RTC: 72318 Change-Id: I7ce0c67510ff5389c864a9e750b948a23e3db5b4 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/6681 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Implement termination from fatal error log.Richard J. Knight2013-10-081-2/+2
| | | | | | | | | Change-Id: Ie83f0876887ee0465cd4d430fa4a335f6aa396ec RTC:35268 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/6403 Tested-by: Jenkins Server Reviewed-by: Brian H. Horton <brianh@linux.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Make sprintf-class functions comply with standard.Patrick Williams2013-10-071-23/+26
| | | | | | | | Change-Id: I6a04179bb2c339668450bcbcf608ebef477c5bfe Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/6399 Tested-by: Jenkins Server Reviewed-by: Brian H. Horton <brianh@linux.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Handle interrupts on MPIPLDean Sanner2013-08-211-1/+3
| | | | | | | Change-Id: I315d5c802819bf6f16cd6adbffe77530bd42699a Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/5427 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Basic devtree supportDean Sanner2013-08-091-0/+2
| | | | | | | | | | Simple devtree support for Sapphire in SPless mode Change-Id: I4a70bfc5cd3eb3dbd1b443869c046c789f98cc95 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/3739 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Enhance hb-dump to support full memory extraction.Patrick Williams2013-07-102-1/+5
| | | | | | | | | | Change-Id: I74823572a4935d3c8c4d7999d8c00c0286de1523 RTC: 50233 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/5170 Tested-by: Jenkins Server Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Prevent flood of interrupts early in host boot start-up on MPIPL.Doug Gilbert2013-07-011-0/+2
| | | | | | | | | | | RTC: 72995 CQ: SW181350 Change-Id: Ia1061c4fc28987227a8cb5f02a539de9851863b8 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/4922 Tested-by: Jenkins Server Reviewed-by: Van H. Lee <vanlee@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Secureboot memory layout support.Patrick Williams2013-06-143-13/+26
| | | | | | | | | | | | | | | | * Start kernel in 1/4 cache mode per Secureboot. * Copy Secureboot header for base image for later use. * Blind-purge bottom half of cache. * Add bottom of cache into memory maps for 1/2 cache mode. RTC: 64762 Change-Id: I1b45f30a2d45c9709d4fd486cfe0ca2ce86b051c Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/3773 Reviewed-by: Michael Baiocchi <baiocchi@us.ibm.com> Tested-by: Jenkins Server Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Handle SLB machine check errs by resetting SLB.Patrick Williams2013-06-141-0/+7
| | | | | | | | | | Change-Id: I8a74a88e6eb812406c64976e7842903e1063021a Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/4605 Tested-by: Jenkins Server Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* New mm_block_map syscall.Patrick Williams2013-06-103-34/+37
| | | | | | | | RTC: 71081 Change-Id: Ic5531fbba92cfc7aad7d303f043d6a350483d63d Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/4607 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Tolerate memory UEs during dump extraction.Patrick Williams2013-06-062-23/+67
| | | | | | | | | | Change-Id: I0dc57ec047beb47b557b816162d619a5b2a54108 RTC: 64619 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/4600 Tested-by: Jenkins Server Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Inter-processor communications for multinodeDoug Gilbert2013-05-162-1/+45
| | | | | | | | RTC: 63128 Change-Id: Ica27c7f714bc8b874c9bccb663a32d3cfba37c5a Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/4193 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Race condition in heap coalesce.Patrick Williams2013-05-151-27/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously the heap coalesce function looked at the "free" flag on the next block to determine if two blocks could be merged together. The coalesce function is ran with all cores synchronized so no one should be modifying the heap, but there is still a subtle race condition. A user task could be in the process of freeing a block, marking it "free" but not actually inserting it onto the queues yet. The coalesce will combine this block together but then when the user task resumes it continues to try to insert it onto the queue. This causes both the larger merged block and the smaller block to be on a free queue and memory corruption when both blocks are used. This is resolved by having a new flag indicating that the block is known to be part of the "coalesce" group and using this in addition to the "free" flag. Only blocks which are actually present on the free queues are considered to be part of the "coalesce" group. Change-Id: If33d15d731d32e07e01104244ebc65daf2295878 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/4520 Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Add thread-safety to kernel interrupt handler.Patrick Williams2013-04-181-5/+3
| | | | | | | | | | | | | | | | | | | | The interrupt handling was originally written with the intent that only a single thread would receive interrupts. We purposefully program the Interrupt Presenter hardware to route all interrupts to a single core. IPIs (Inter-processor Interrupts) are not routable by the ICP and end up being delivered to the targeted thread. When we trigger a winkle-wakeup of a thread, that thread gets the IPI interrupt. Since we broadcast the IPI to all threads on a core there is potential for multiple threads to be using the interrupt object at once. Hence, we added a spinlock to protect it. Change-Id: I736de774496b13cc9f344d389b9f249bbabeb036 Tested-by: Jenkins Server Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Allow winkle of all threads for multi-drawer add.Patrick Williams2013-04-082-8/+46
| | | | | | | | | | | RTC: 63124 Change-Id: I1ad1d6bdf6a2848b686b25504fabddddb701d440 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/3813 Tested-by: Jenkins Server Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Michael Baiocchi <baiocchi@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Update Core Scratch Reg 6 with L3 vs Mainstore for FSP to queryMissy Connell2013-03-262-1/+117
| | | | | | | | | RTC:64829 Change-Id: Ic8e7983f6838b79c359c4cee2647b7676493cb1e Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/3564 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Changes required for A bus and 4 dimm supportDean Sanner2013-03-261-6/+8
| | | | | | | | | Change-Id: I1670913709df9acd5cddf19feaccab6462125e5f Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/3655 Tested-by: Jenkins Server Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Support for less than 8 threads per coreDan Crowell2013-02-081-1/+2
| | | | | | | | | | | Modified anywhere that we enable non-master threads to only touch the threads that we are told to update. Change-Id: I5b764e51d85a5c663ac76164e9465831ef0c167c RTC: 48808 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2877 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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