| Commit message (Collapse) | Author | Age | Files | Lines |
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- Added system call to map FSP mailbox memory with guard permission
- Call new mapping in DMA area init
- Propagate guard permission down to MMIO map
- Apply guard permission in page fault handler
- Updated debug tools to support extra bit in MMIO struct
Change-Id: I8335ac7d3ef57e46d4c8b6c2b2a42b8a0bf7c4b0
Backport: release-fips830
Backport: release-fips820
CQ: SW295345
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/16307
Tested-by: Jenkins Server
Reviewed-by: Brian H. Horton <brianh@linux.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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- See https://github.com/lucasdemarchi/codespell
Change-Id: I03e102d1ebb9473b6226fa9b6edb684fa0218a2f
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/15031
Tested-by: Jenkins Server
Reviewed-by: STEPHEN M. CPREK <smcprek@us.ibm.com>
Reviewed-by: Zane Shelley <zshelle@us.ibm.com>
Reviewed-by: Brian Silver <bsilver@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: I5664587b4f889099290ef50d50fa9ce5e580e1eb
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/11167
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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* Start kernel in 1/4 cache mode per Secureboot.
* Copy Secureboot header for base image for later use.
* Blind-purge bottom half of cache.
* Add bottom of cache into memory maps for 1/2 cache mode.
RTC: 64762
Change-Id: I1b45f30a2d45c9709d4fd486cfe0ca2ce86b051c
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/3773
Reviewed-by: Michael Baiocchi <baiocchi@us.ibm.com>
Tested-by: Jenkins Server
Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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RTC: 71081
Change-Id: Ic5531fbba92cfc7aad7d303f043d6a350483d63d
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/4607
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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If fake PNOR isn't being used, we can expand our memory space to
the full 8MB cache. There will be follow up work with RTC: 49137
to support 4MB degraded caches for bring-up.
Change-Id: I1248efa37965f39ebab62aae556349c34aa24b66
RTC: 47356
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2319
Tested-by: Jenkins Server
Reviewed-by: Melissa J. Connell <missyc@us.ibm.com>
Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Add mmLinearMap to create block at a specified phys addr.
Added iv_MaptoPhy in the block to indicate we are physically mapped
block and to not apply the HRMOR.
Change-Id: I75ddb19b82ae9a2035ff873edff8a34a33c74639
RTC:43401
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1846
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Changes to kernel code to support detection and use of HRMOR
offset in memory
Changes to tooling to handle the real memory offset
New interface to retrieve the physical address that
corresponds to a virtual address
To test, run these commands before starting up Hostboot:
system_cmp0.cpu0_0_05_0.write-reg HRMOR 0x8000000
proc_venicechip_cmp0.phys_mem.del-map p8Proc0.l3_cache_ram 0 0
RTC: 46032
Change-Id: I50ab248f941218a3a14a8f0fc12a551b56dc7cf3
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1553
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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RTC:34032
Change-Id: Ib1e29210ffc183f9c3bd475ab8d9779b5a448909
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/932
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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- Changed overall page table behavior to no longer use C bits
in page table entries. Instead, individual blocks mark
pages as dirty based on stores during page faults. Initially
all writable pages are marked read-only until the first store
to it. At that time the block gets an exception and changes
the permission on the page table entry to writable and marks
its own SPTE to dirty.
- Greatly reduced the number of tlbie's and page table accesses.
Accomplished this by:
* Skipping many of the page table manipulations, such as
LRU updates, when the PTE is invalid.
* Converting most of the previously general-case of
"Modifying a PTE" to specific cases such as "Resetting
the Reference Bit" and "Modifying the SW field".
- Fixed the LRU-flush algorithm so that it is O(n) instead of
O(n^2), where n = size of page table.
Change-Id: I2520fa88970fd7f656e6348bf6b34d5db82fd3db
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/892
Tested-by: Jenkins Server
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: Icd2e9ed7de2c0227b25979622d0f37a77595570a
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/609
Tested-by: Jenkins Server
Reviewed-by: MATTHEW S. BARTH <msbarth@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: Ie3f3fb2050428af1fc398b1577dfc090cd7d26cf
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/591
Tested-by: Jenkins Server
Reviewed-by: MIKE J. JONES <mjjones@us.ibm.com>
Reviewed-by: Melissa J. Connell <missyc@us.ibm.com>
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: MATTHEW S. BARTH <msbarth@us.ibm.com>
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Change-Id: I9d9094d5c6689c9127c6948239c7c9aaebacdfde
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/514
Tested-by: Jenkins Server
Reviewed-by: MATTHEW S. BARTH <msbarth@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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MERGED changes.. only need Patrick and Mark to review extintsvctasks.H
Change-Id: Iba5814e1b5913c6181a2be96df9682555fa2ab58
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/458
Tested-by: Jenkins Server
Reviewed-by: Melissa J. Connell <missyc@us.ibm.com>
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Change-Id: Iada5e8b69c7919d2b59febd861450abeb7c45287
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/451
Tested-by: Jenkins Server
Reviewed-by: MATTHEW S. BARTH <msbarth@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: Ic0bb4122164e11f6d13e6850abf8ae9bd32caea2
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/393
Tested-by: Jenkins Server
Reviewed-by: MATTHEW S. BARTH <msbarth@us.ibm.com>
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Add code that applies the permissions requested.
Add merge conflicts
Change-Id: I5911406ba4670714faaf4880399da71692559397
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/353
Tested-by: Jenkins Server
Reviewed-by: Melissa J. Connell <missyc@us.ibm.com>
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Change-Id: Icce8e01f3d1cd2942f2b9ff802993da0441535ee
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/344
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
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Added changes from review comments
Updated new enum for system call
Change-Id: I8a55b5e2f67427e59263eae31913e438ca782006
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/331
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: Melissa J. Connell <missyc@us.ibm.com>
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redundancies and also to have a single place to update the memory
map if needed.
See Task 3507.
Change-Id: I8f2d632983abe6d6798784e975cd93057018594b
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/330
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: Iffdd97a75944abbd52dbc72d3aa1394b771fd371
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/333
Tested-by: Jenkins Server
Reviewed-by: MATTHEW S. BARTH <msbarth@us.ibm.com>
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Change-Id: Id18e604facd517598a18968af3dff927026ad894
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/272
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I205f2409e56032cfc0aaf01d7e26d357f0b86373
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/277
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Tested-by: Jenkins Server
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Change-Id: Icf6fc9e10b1c39e981dddf180607b710c597112b
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/249
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: Ief3476b5306bc231c9d3044b2736fcd195e840b1
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/243
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: Icb089ac7896d12354b48377611d872b782b91652
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/225
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I233c2677909c0c16536133c189ebbd21e4415e22
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/208
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I309bc63bdb27baa21f65de05e12324b9c4ce3407
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/212
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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- Segment Manager
- Base / Device Segments
- Block for Base image.
Change-Id: Ic0c058e5c5b210ec1c48d30f6ed9f9837d74a3c8
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/193
Tested-by: Jenkins Server
Reviewed-by: MATTHEW S. BARTH <msbarth@us.ibm.com>
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Add new delRange method to delete based on page numbers, part of RTC:3195
Plus code review comments from previous commit - http://gfw160.austin.ibm.com:8080/gerrit/188
Change-Id: Ie45365162cf1367c5c0dcc3afc2907a6ddfa53d3
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/188
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Reviewed-by: MATTHEW S. BARTH <msbarth@us.ibm.com>
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1) Do SLBIA prior to creating initial SLB entry.
2) Do proper TLBIEs.
3) Set Ks/Kp in SLB properly.
4) Test data storage exception on code space.
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