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* shift OBUS FIR programming inits for secure bootJoe McGill2018-06-171-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | p9_sbe_scominit: unmask all OBUS EXTFIR bits, use PB CENT FIR 14 to mark update for downstream code (qualify XBUS/OBUS EXTFIR updates to apply to PPE platform only) p9_fab_iovalid: conditionally unmask OBUS EXTFIR based on state of PB CENT FIR 14 (will handle unmasking here when insecure -- Cronus or old SBE images) p9_obus_extfir_setup: new HWP for HB to call, mask OBUS EXTFIR bits for unused busses Change-Id: I07e7da4a7c61c041451ff4ddfeec3c266385d404 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60358 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60363 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* p9_fab_iovalid -- remove code setting ABUS security lockJoe McGill2018-06-171-20/+0
| | | | | | | | | | | | | | | | | | per HW FW interlock, Hostboot will lock down later Change-Id: I70f692e0c81a283c8f1ceec2073e01668b02f0da Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60121 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60686 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* support IO reconfig loop for OBUS DL link training failuresJoe McGill2018-06-151-38/+206
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - p9c DD1.1+ only, DD1.0 not supported - FW to trigger reconfig loop back to step 0 from sys_proc_fab_iovalid if: 1) sys_proc_fab_iovalid rc = FAPI2_RC_SUCCESS -- AND -- 2) new output o_obus_dl_rcs (vector of P9_FAB_IOVALID_DL_NOT_TRAINED_ERR rc objects identifying links which failed on this chip) has entries - attribute changes: ATTR_LINK_TRAIN -- remove platinit tag, attr should init to zero (both even and odd), and reconfig loop will adjust value as we go Change-Id: Ib7a0c6e342f1d98893585d72be1bfddf67acde55 Original-Change-Id: I95eebd2b893db6d2511aae40798c0a4e049835d6 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59022 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60655 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* dd1.1+ DL training procedure updatesDaniel Howe2018-06-151-0/+4
| | | | | | | | | | | | | | | | | | Change-Id: I83a306531f4bd668e323a1bd1c8af17dee7d5e72 Original-Change-Id: I94b879d9eecdea6eadcebd9e50beb1b4d31ae8ca Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55046 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Dev-Ready: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60654 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Disable-CI: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* p9_fab_iovalid -- secure ABUS mailboxes after iovalid is assertedJoe McGill2018-06-151-0/+20
| | | | | | | | | | | | | | | | | | | | Setting ABUS_LOCK in security switch register will return all zero data on future reads to secure mailboxes (even half-link, mbox 0) Change-Id: Id36204f016bc766ccd39d7bdae16123dab73a5d1 Original-Change-Id: I6c661839b8661e073ba0e16ce594843e60355f85 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51817 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60653 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Disable-CI: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* shift XBUS FIR programming inits for secure bootJoe McGill2018-06-151-31/+36
| | | | | | | | | | | | | | | | | | | | | | | | | general approach: - enable runtime FIR settings in SBE code, for all present XBUS regions - remove FIR initialization from HB code which runs prior to SMP build - update HB HWPs to re-mask XBUSes which are present but not functionally used CQ: SW409902 CQ: SW409903 CQ: SW409905 Change-Id: Icb42cceabb2d9c869974a2a6eea0507be0d057e8 Original-Change-Id: I378ed2ca39c0d5be894420bfc3257e41e3e95de5 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50519 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60652 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Disable-CI: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Shorten A-link timers for sim. Add polling for A-link training.Ben Gass2018-06-151-15/+32
| | | | | | | | | | | | | | | | Change-Id: Ic55d4ad2e8e11bb07f2e5f67cf8fe907782611fc Original-Change-Id: Iad63bc098741d328c4ccf90268b3817f4cf67858 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50536 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60651 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Disable-CI: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* IO, FBC updates to enable ABUS for FleetwoodJoe McGill2018-06-151-22/+106
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Attributes: ------------------------------------------------------------------------------- nest_attributes.xml add ATTR_LINK_TRAIN, written by platform on X, O endpoints to specify whether half or full link should be trained add ATTR_PROC_FABRIC_LINK_ACTIVE, written by p9_fbc_eff_config_links adjust enums for ATTR_PROC_FABRIC_[XA]_ATTACHED_CHIP_CNFG, written by p9_fbc_eff_config_links add ATTR_PROC_FABRIC_[XA]_LINKS_CNFG, written by p9_fbc_eff_config_links pervasive_attributes.xml create ATTR_PROC_NPU_REGION_ENABLED to encapsulate accessibility of NPU logic domain, written by p9_chiplet_scominit chip_ec_attributes.xml add EC feature attribute controlling DL training workaround Initfiles: ------------------------------------------------------------------------------- p9.fbc.ab_hp.scom.initfile add logic to permit reset of chg_rate master dials in second phase SMP build adjust link enable expressions to reflect new ATTACHED_CHIP_CNFG enums p9.fbc.cd_hp.scom.initfile p9.fbc.no_hp.scom.initfile consume number of configured X/A links from new attribute, simple addition won't work any longer given new ATTACHED_CHIP_CNFG enums p9.fbc.ioe_dl.scom.initfile support half-link operation, based on ATTR_LINK_TRAIN on X endpoint target p9.fbc.ioe_tl.scom.initifle adjust link enable expressions to reflect new ATTACHED_CHIP_CNFG enums p9.fbc.ioo_dl.scom.initfile support half-link operation, based on ATTR_LINK_TRAIN on O endpoint target qualify OLL enablement based on use as active fabric link adjust PHY training parameters based on current lab learning p9.fbc.ioo_tl.scom.initfile adjust link enable expressions to reflect new ATTACHED_CHIP_CNFG enums support half-link operation, based on ATTACHED_CHIP_CNFG qualify TOD_ENABLE to apply only to O links carrying X traffic p9.npu.scom.initfile clear OPTICAL_IO_CONFIG when not actively using NVLINK, finer-grained updates needed to support mix of O SMP and NVLINK usage HWPs: ------------------------------------------------------------------------------- p9_io_obus_dccal execute only on links actively carrying fabric protocol p9_io_obus_linktrain p9_io_regs encapsulate PHY FIFO reset sequence needed prior to FBC DL training execution p9_chiplet_scominit p9_npu_scominit partial good updates for NPU region p9_fab_iovalid adjust iovalid manipulation/checking, as well as link delay reporting, to support half-link configuration p9_smp_link_layer support half-link configuration via ATTR_PROC_FABRIC_[XA]_ATTACHED_CHIP_CNFG implement OBUS PHY specific workarounds p9_eff_config_links update ATTR_PROC_FABRIC_[XA]_ATTACHED_CHIP_CNFG to support half-link configuration write ATTR_PROC_FABRIC_LINK_ACTIVE on X/O endpoint targets write ATTR_PROC_FABRIC_[XA]_LINKS_CNFG to reflect total number of logically configured links, for initfile consumption Istep wrappers: ------------------------------------------------------------------------------- p9_build_smp_wrap correctly loop over all system targets for second phase SMP build p9_sys_chiplet_scominit_wrap initial release Change-Id: I9110eeabed0d222171039532de690cf7141e3857 Original-Change-Id: Ic1d87df4d3ff0feca7ac2437fa61b6d2fc4a2d68 CQ: HW419022 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43905 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: DANIEL C. HOWE <dchowe@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60650 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Disable-CI: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* L3 update -- p9_fab_iovalidJoe McGill2018-06-151-61/+471
| | | | | | | | | | | | | | | | | | | | add infrastructure to collect TL,DL FFDC in the event of a training failure add HW callouts to TL,DL training failure return codes, others callout code Change-Id: If0029f9312f1bdcd471a231ad4b77b0d8deabac4 Original-Change-Id: I9f5439981bb3972b8e259d7ef2fba2431baaa8fd Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40348 Reviewed-by: Thi N. Tran <thi@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60649 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Disable-CI: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* p9_fab_iovalid -- invoke link validation subroutineJoe McGill2018-06-151-0/+8
| | | | | | | | | | | | | | | | | | call to p9_fab_iovalid_link_validate was missing, invoke to verify link state when HWP is called to raise iovalid Change-Id: Ife69d259b1f56d1bc87e766adf64f53915d73b2d Original-Change-Id: I43872a281c008d52d88c05f662adeb5f51f4e524 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37095 Reviewed-by: CHRISTINA L. GRAVES <clgraves@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60648 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Disable-CI: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* p9_fab_iovalid fix to clear action0/1 bits corresponding w/ link being enabledCHRISTINA L. GRAVES2018-06-151-0/+14
| | | | | | | | | | | | | | | Change-Id: I55c690d59a48a0c9e2e1813afb6e8afc7d9cf8ad Original-Change-Id: Ibc6b1f53bc9d625293e0fc5f2def7f0dd4ef4789 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27830 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60647 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Disable-CI: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* L2 - Fabric updates for multi-chip supportJoe McGill2018-06-151-61/+283
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Refactor p9_build_smp code Add FBC effective config (attribute-only) HWPs Add/call FBC initfiles HWP flow p9_fbc_eff_config p9_fbc_eff_config_links p9_chiplet_scominit p9_smp_link_layer p9_fab_iovalid p9_fbc_eff_config_aggregate p9_build_smp Update engd used in build to e9035 u087 Change-Id: I6b6e1291ac64a9b55169eb0a077801bec41867d9 Original-Change-Id: I9ab9e967847d380596e896a14e481ad8cf247b9a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21643 Tested-by: PPE CI Tested-by: Hostboot CI Tested-by: Jenkins Server Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60646 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Disable-CI: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* L2 HWPs -- p9_smp_link_layer and p9_fab_iovalidJoe McGill2018-06-151-2/+145
| | | | | | | | | | | | | | | | | | | | Tested on n10_e9031_tp030_soa_mc_u008_01 Rebased on e9034 SCOM address header implementation Change-Id: Ib3c2408e890f4151d6951edfcd83d0a9fb79ba7b Original-Change-Id: Iae352ca9392f3e863c9881c90a8a07969befe727 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22942 Tested-by: Jenkins Server Tested-by: Auto Mirror Tested-by: Hostboot CI Tested-by: PPE CI Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: CHRISTINA L. GRAVES <clgraves@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60645 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Disable-CI: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* FBC Level 1 proceduresJoe McGill2018-06-151-0/+59
| | | | | | | | | | | | | | | | | Shells for p9_build_smp, p9_fab_iovalid, p9_smp_link_layer Supporting attribute definitions Change-Id: I0967a4f69fbf362934a34b8a1972487af70223fd Original-Change-Id: I59f7fb0f13ee190cd790ea5771f4a32faaa165d9 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21570 Tested-by: Jenkins Server Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: CHRISTINA L. GRAVES <clgraves@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60644 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Disable-CI: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Remove p9_fab_iovalid.C in order to re-mirror itNick Bofferding2018-06-151-1154/+0
| | | | | | | | Change-Id: I01cacea1d0f60a7176daafa9d729caab71425ec2 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60643 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Disable-CI: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Removes erroneous FAPI ERR printStephen Glancy2018-06-151-2/+0
| | | | | | | | | | | | | | | Change-Id: Ib24e68a846893b57c31e2985a77e7848b82ce289 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59688 Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Devon A. Baughen <devon.baughen1@ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59708 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fixes IPL UE callout codeStephen Glancy2018-06-152-169/+353
| | | | | | | | | | | | | | | | | Change-Id: I313fed687c6a82f404d886bd552ea4205ddef998 CQ:SW427493 RTC:192947 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59393 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Dev-Ready: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59399 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Correct Safe mode freqency to UltraTurbo compare error message.Ben Gass2018-06-151-1/+1
| | | | | | | | | | | | | | Change-Id: I98785881b9ee5ea7d676a7bb25c23d2c5be38e04 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59690 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59710 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* getMBvpdAttr: Updates for DDR3 supportPrachi Gupta2018-06-141-8/+13
| | | | | | | | | | | | | | | | | | | | | | Changed the check from if (rc == false) to if (rc != success). This way we are not relying on plat code to return a specific rc in case VPD rec/kw is not found. This HWP relies on a few VPD rec/kw combinations that will not work and we need to ignore errors in that case. The HWP tries the combinations in the following order: VSPD+VM, VSPD+VD, VINI+VZ. For DDR3, first two combinations do not work. Change-Id: I43966493a1d7e9e2f6d9447dd3fda9c3206de417 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60488 Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Dev-Ready: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60493 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* PM:Remove deprecated attributesPrasad Bg Ranganath2018-06-141-14/+0
| | | | | | | | | | | | | | | | | RTC:173736 Change-Id: I49d8506f97f0fb61c1117fd57fe1fa302ad44b04 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59837 Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59841 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fixes CKE levels during RCD initializationStephen Glancy2018-06-1411-65/+136
| | | | | | | | | | | | | | | | | | Change-Id: Ic00be58a3e972407e944ebdeff9a16c01c1ee3e9 CQ:SW432711 RTC:194935 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59645 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Dev-Ready: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59652 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fix MBS mask FIR for Obus recoveryStephen Glancy2018-06-141-3/+2
| | | | | | | | | | | | | | | | | | | | | Sets the external timeout FIR to be masked off. Change-Id: I17095b43962ad9e8df694b91cc391829a99b500b CQ:SW432572 RTC:194981 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60211 Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: Marc Gollub <gollub@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Dev-Ready: STEPHEN GLANCY <sglancy@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Edgar R. Cordero <ecordero@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60219 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* p9_sbe_common -- mark TP LFIR bit 37 as recoverableJoe McGill2018-06-141-1/+1
| | | | | | | | | | | | | | | | | | | | | TP LFIR 37 is meant to be marked recoverable for Cumulus 60118 unmasked the bit, but the default action register settings are programmed to trigger a checkstop. This adjust the action1 register default to recoverable. Change-Id: I8d07fdac8eb060ba10929133fdbe93621b8b53e7 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60244 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Dev-Ready: Brent Wieman <bwieman@us.ibm.com> Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60262 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Change npu ATSD timeout to disabledRyan Black2018-06-141-4/+5
| | | | | | | | | | | | | | | Change-Id: I5ae0a32265afb2affda38c386942eb12a14eaf66 CQ: SW432772 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60242 Reviewed-by: Kevin F. Reick <reick@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60254 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Update p9n_23 engd with n23_e9108_3_tp105_ec408_soa_sc_u138_01 dataBen Gass2018-06-141-1/+15
| | | | | | | | | | | | | | | Change-Id: Ib586128b6152c2afb300b984c115d0d9fa8e0e15 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59588 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: James N. Klazynski <jklazyns@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59598 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* p9_sbe_scominit -- unmask TP LFIR bit 37 for CumulusJoe McGill2018-06-141-0/+17
| | | | | | | | | | | | | | | | Change-Id: Id216f65d5c240d88c4db62e374c9f3278d623fbb CQ: SW432374 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60118 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60126 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add bad bit setting to p9c training advancedLouis Stermole2018-06-142-27/+77
| | | | | | | | | | | | | | | | | Change-Id: Iee23ed09e2a196d8e3831ce9bf44d65afb44be0d Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59351 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Dev-Ready: Louis Stermole <stermole@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59367 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* support IO reconfig loop for OBUS DL link training failuresJoe McGill2018-06-1410-54/+331
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - p9c DD1.1+ only, DD1.0 not supported - FW to trigger reconfig loop back to step 0 from sys_proc_fab_iovalid if: 1) sys_proc_fab_iovalid rc = FAPI2_RC_SUCCESS -- AND -- 2) new output o_obus_dl_rcs (vector of P9_FAB_IOVALID_DL_NOT_TRAINED_ERR rc objects identifying links which failed on this chip) has entries - attribute changes: ATTR_LINK_TRAIN -- remove platinit tag, attr should init to zero (both even and odd), and reconfig loop will adjust value as we go CMVC-Prereq:1057645 Change-Id: I95eebd2b893db6d2511aae40798c0a4e049835d6 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59022 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59039 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* eRepair: Fixed lanes handling of target typesSumit Kumar2018-06-141-45/+108
| | | | | | | | | | | | | | Change-Id: I4696820e4dc10409739729508fe32ebd59253cee Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59651 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59662 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
* PPB: Bug fix in computing IAC Vdn valuePrasad Bg Ranganath2018-06-083-249/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | - Hardcode the Vdn Ceff value to 1 as the dimension is not supported in the WOF Tables. This avoids the root of the issue noted which was VPD data dependent in the previous algoithm for an unused element. - Update OCC Pstate Parameter Block comments on Iddq units to 5mA -- This is non-functional update to ensure the header comments represent reality and is for documentation only!!! (no pre/co-req) Key_Cronus_Test=PM_REGRESS Change-Id: I3a790160998eda4e384d9bcb9da7198aa45f457c CQ:SW429936 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59241 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Francesco A. Campisano <campisan@us.ibm.com> Dev-Ready: Francesco A. Campisano <campisan@us.ibm.com> UseHW-Fleetwood: Francesco A. Campisano <campisan@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59247 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* SW431549 DMI Read ErepairChris Steffen2018-06-071-1/+1
| | | | | | | | | | | | | | | - Header file was using the wrong target type. Change-Id: If7e022afdfc98fbaf2f035bc3af4cae45c5402b4 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59728 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Gary A. Peterson <garyp@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59899 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* I/O Metadata CleanupChris Steffen2018-06-072-2/+2
| | | | | | | | | | | | | | | | | | - Updated metadata - removed unused files Change-Id: Ie19365f12668a83af0d5e65c9a2a9b321b45ebce Original-Change-Id: Ifdeb030d682769755794b4bee7db03966a5b21ca Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46954 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Gary A. Peterson <garyp@us.ibm.com> Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59948 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* DMI I/O CheckinChris Steffen2018-06-076-0/+418
| | | | | | | | | | | | | | | Change-Id: Ib73ba11ecf5811a313ecfe7d6e0e385b12cc2bee Original-Change-Id: I9b9326ea8bc9d9734e74c170dfebbd9aaf73fb6f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40666 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Gary A. Peterson <garyp@us.ibm.com> Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59947 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Secure Boot: Disable cache of 2010800 Centaur registerNick Bofferding2018-06-051-9/+11
| | | | | | | | | | | | | | Disabling caching of the 2010800 MBI Fault Isolation Register on Centaur since the HW can flip on bits asynchronously in a way that cache code cannot handle Change-Id: I61554e01089043c1417e78bb7aac25f041a1a441 CQ: SW432157 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59977 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
* Add Locking of Abus Sec MailboxesIlya Smirnov2018-06-042-4/+14
| | | | | | | | | | | | | | | | | | | | Add logic to support Abus security mailbox locking to p9_update_security_ctrl. This updated procedure will be called in istep 18 to secure the Abus mailboxes. Change-Id: Ie89df465299856d39dc5fa2bba6f9a9c38da469a RTC: 191005 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59489 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59495 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Secure Boot: Centaur Security: Initial sensitive register listSantosh Balasubramanian2018-06-041-0/+143
| | | | | | | | | | | | | | | | | | | | Provides initial Centaur Security sensitive register list Change-Id: I1619a687658967f5fb2044ea35d9497d08d2c104 RTC: 187288 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57553 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> UseHW-Fleetwood: Nicholas E. Bofferding <bofferdn@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: SANTOSH BALASUBRAMANIAN <sbalasub@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/58196 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: ILYA SMIRNOV <ismirno@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
* Restore ATTR_CEN_SCHMOO_MULTIPLE_SETUP_CALL after shmoos to fix masking errorsLouis Stermole2018-06-021-0/+4
| | | | | | | | | | | | | | | Change-Id: I3b1cbe4955da147ffa148d37c2126a782d06cafc Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59725 Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Dev-Ready: Louis Stermole <stermole@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59729 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* PM: clear Hcode error injection bit upon PM complex resetGreg Still2018-05-313-9/+41
| | | | | | | | | | | | | | | | | | | | | | | | | - Clearomh the bits lets STOPs and PStates be restarted during the reset. Injection has to be done after the subsystem is initialized. - Clear the CSAR bits in p9_pm_corequad_init(init) - Clear SGPE and PGPE error inject bits in OCC Flag2 (p9_pm_stop_gpe_init and p9_pm_pstate_gpe_init respectively Key_Cronus_Test=PM_REGRESS Change-Id: I93bfe8d4b0959a6a305722df1e2c518f3dfc08fc CQ:SW429797 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59078 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: YUE DU <daviddu@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59085 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Changing NXCQFIR(34) RNG control logic error to checkstopJenny Huynh2018-05-311-1/+1
| | | | | | | | | | | | | | | | Change-Id: If17b31669cb8acaa4e1ca93c5c04ebe2ccda50ae CQ:SW430198 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59563 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Kevin F. Reick <reick@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59584 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* STOP: Handle Quad Special Wakeup Done while pm_resetYue Du2018-05-311-0/+15
| | | | | | | | | | | | | | | | | | | Key_Cronus_Test=PM_REGRESS Change-Id: I89c9a3b8a80a58653be60f5e84e42e89b301ce72 CQ: SW416547 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59293 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59301 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add support for TOD osc switch interruptAnkit Dhingra2018-05-312-2/+46
| | | | | | | | | | | | | | | | Change-Id: I088f2131372cd74e837bc0dc8f54be875fd052aa Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57624 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Manish K. Chowdhary <manichow@in.ibm.com> Reviewed-by: James N. Klazynski <jklazyns@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57722 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fix function name of p9c_query_channel_failureMatt Derksen2018-05-311-1/+1
| | | | | | | | | | | | | | | | | Change-Id: Ie93037ad42e9b35945424c1b0f087c64ac853843 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59546 Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Caleb N. Palmer <cnpalmer@us.ibm.com> Reviewed-by: Benjamin J. Weisenbeck <bweisenb@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59577 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* p9_sbe_common -- mark TP LFIR bits 18:20 recoverableJoe McGill2018-05-311-2/+2
| | | | | | | | | | | | | | | | | Change-Id: I641636e54dcc615cdf8f2de6f43d6878275113bf CQ: SW427932 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59591 Reviewed-by: Kevin F. Reick <reick@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59607 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Change MBSFIR[27] to be a conditional channel fail on CumulusLouis Stermole2018-05-312-18/+51
| | | | | | | | | | | | | | | | | | Change-Id: I4bf88defa5485265ae0187eec70e5b260fc7aaae CQ:SW428363 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/58971 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Dev-Ready: Louis Stermole <stermole@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/58977 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Adding p9c 1.3 support.Soma BhanuTej2018-05-3114-440/+616
| | | | | | | | | | | | | | | | Change-Id: I6ec5550871bcdbab64749bd90f2f8bf4354fd2b8 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/58400 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/58569 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* p9c_mss_volt_dimm_count: add a const to the input parameterPrachi Gupta2018-05-302-3/+6
| | | | | | | | | | | | | | | | | | | To keep consistent input paramters across all mss_volt_* hwps, I needed to add a const to the vector of membufs. Change-Id: Ie6da7855ab2a98a919a9d992fd0317774669c8f9 CQ:SW429662 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59477 Reviewed-by: Michael D. Pardeik <pardeik@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59491 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* P9C Memory Throttle Updates (new HWPs and new ISDIMM Power Curve support)Luke Mulkey2018-05-291-0/+30
| | | | | | | | | | | | | | | | | | Change-Id: I5a8800c2491e882f0ff354d173e281c527877d68 Original-Change-Id: Icfbe39161641324bddc5f880948d03f5ee2cce5a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57005 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59474 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Add extra DRAM reset after RCD load on NimbusLouis Stermole2018-05-282-4/+7
| | | | | | | | | | | | | | | Change-Id: Id5d6a6d8e98c93dadbeafda9e061f9b1fbdcd64f CQ:SW430241 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59071 Dev-Ready: Louis Stermole <stermole@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59080 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Change mss_freq algorithm to deconfigure ports to achieve common DIMM freqLouis Stermole2018-05-285-213/+764
| | | | | | | | | | | | | | | | | Change-Id: Ife26f8488a4817f8f36fd1fd583dd5340fe48d4e CQ:SW405528 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/58761 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Dev-Ready: Louis Stermole <stermole@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/58772 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Clear obus fir mask attrs after restoring obus firmasksChristian Geddes2018-05-283-31/+57
| | | | | | | | | | | | | | | | | | | | | | After we have restored the values of the OBUS related fir masks, we need to make sure that the attributes where the values are stored are set back to 0. This will ensure that any future calls to the p9_io_obus_firmask_save_restore HWP with the RESTORE flag set will be no-ops until the HWP has been called with the SAVE flag Change-Id: I3b853ed269cfb3ca9cec1b19f1fc4604dca80589 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59222 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Benjamin J. Weisenbeck <bweisenb@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59256 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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