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* Add unmask errors back to cen_framelockLuke Mulkey2018-04-132-3/+13
| | | | | | | | | | | | | | | | Change-Id: Ia05fadcd6676f2c076bad14002d6afc26953aaf9 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56027 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Dev-Ready: LUCAS W. MULKEY <lwmulkey@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56037 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Abist proc update for SBE changesAbhishek Agarwal2018-04-121-0/+17
| | | | | | | | | | | | | | | | | Change-Id: I28a11ecc5f64498f495f1575c914c5d3120c6f23 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54243 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56380 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Adding Axone MC/MI/MCC/OMIC/OMI scom address translation.Ben Gass2018-04-113-64/+373
| | | | | | | | | | | | | | | | | | | | | P9A will not support NV targets. They were replaced by OBUS_BRICK targets and are not used. Change-Id: I1452b7dd3655665237fc2a7c59e5d6c227dc9123 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55358 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Dev-Ready: Brent Wieman <bwieman@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55370 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Updated pcie_scominit and pcie_config to manage systems not using PEC STACK0.Ricardo Mata2018-04-112-2/+69
| | | | | | | | | | | | | | | | | | | Defect SW417485 used to track these changes. Change-Id: I945ccd7726e2938fa07e8e3b118fc17e97111544 CQ: SW417485 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56909 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56910 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Enhance p9_extract_sbe_rcSoma BhanuTej2018-04-112-20/+73
| | | | | | | | | | | | | | | | | | | | | | -> Return error rc for invalid parameters -> Update OTPROM error detection -> Move L1 & L2 loader section in prog exception -> Add power check for fsp mode -> Extra debug msg when HC is 0 Change-Id: I864cbc19f4f85cad7bb717af957b26b930437eba Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52356 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Anusha Reddy Rangareddygari <anusrang@in.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52363 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Unmask MCA Command Sequence error bitThi Tran2018-04-101-3/+0
| | | | | | | | | | | | | | | | Change-Id: Ib26b15ac6c506cedfc9d74f582b21696b7823d14 CQ: SW413273 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56647 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56732 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* p9_xip_customize -- consume correct byte for AW keyword PLL bucket selectorJoe McGill2018-04-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | initial release consumed byte 0 as the bucket selector, which is reserved for the keyword version update customization HWP to consume byte 1 as the selector Change-Id: Id7177fe7f7334d4c044e2110390f3b11477a3ae6 CQ: SW417993 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54370 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Claus M. Olsen <cmolsen@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54383 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Remove un-used scan proceduresRichard J. Knight2018-04-1024-1925/+0
| | | | | | | | | | | | Change-Id: I6fdd38884facfda3abffce669b99fcd6aa4969e4 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56912 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* p9_sbe_lpc_init: Fix cycle sim delay loopSoma BhanuTej2018-04-101-2/+3
| | | | | | | | | | | | | | | | | | | | Adding additional delay during polling for LPC status Issue encountered in GSD2PIB mode Awan simulations only Change-Id: I220843de8c37fa578ea26ea253345a380666a1d7 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56724 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Reviewed-by: Abhishek Agarwal <abagarw8@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56780 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fix transposed memset arguments in p9_dd_addRichard J. Knight2018-04-101-1/+1
| | | | | | | | | | | | | | | | | | Change-Id: Ia0a0f185879cb090ffe5d5b68a166c76ea9f2b6c RTC:189887 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56279 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Claus M. Olsen <cmolsen@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56283 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* relocate Centaur trace SCOM initsJoe McGill2018-04-102-48/+82
| | | | | | | | | | | | | | | | | | | | | | this commit moves the initialization of several trace related SCOM inits from centaur.mbs.scom.initfile to cen_scominits the affected registers are inaccessible via inband from p9c, so we're just shifting the initialization to a point where FSI will be used to apply the settings instead Change-Id: Ib58caacad8a97ae42b79ff449e368a1c41a1bc39 CQ: HW440754 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55160 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: LUCAS W. MULKEY <lwmulkey@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55177 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
* TSV Updates for CL14 SupportJeremy Neaton2018-04-104-95/+268
| | | | | | | | | | | | | | | | | | | | CQ: SW423561 Change-Id: I5c508eaeb5b54cfa2d6984958a6d5b54ff78ea3e Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56265 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Dev-Ready: LUCAS W. MULKEY <lwmulkey@us.ibm.com> Dev-Ready: JEREMY R. NEATON <jrneaton@us.ibm.com> Reviewed-by: JEREMY R. NEATON <jrneaton@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: BRIANA E. FOXWORTH <befoxwor@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56274 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Turn off PB.IOO.LL0.CONFIG_FAST_ASYNC_CROSS for Nimbus (HW409026)Ben Gass2018-04-102-3/+20
| | | | | | | | | | | | | | | | | | | | | | | Due to HW409026, PB.IOO.LL0.CONFIG_FAST_ASYNC_CROSS should be off for all Nimbus chips. Change-Id: Ib732be7ce3d3e64e3c0b9112a088bb9a8fed14c4 CQ: SW420220 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54789 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: ADRIAN BARRERA <abarrera@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: Jeffrey W. Kellington <jwkellin@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54799 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Temporarily moving attribute to the system targetElizabeth Liner2018-04-092-6/+18
| | | | | | | | | | | | | | | | | | | | | | There were dependency issues between the FSP and hostboot changes. This commit is temporarily moving everything to the system target, so that we can get our changes through CI. We'll go back later and fix the target to the proc Change-Id: Ic2d63d10afe50342290a814a94fd2d07d7102fdf RTC:176434 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56814 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56827 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
* Updating ATTR_PROC_CHIP_MEM_TO_USE to use all bits of group and chip IDElizabeth Liner2018-04-092-10/+12
| | | | | | | | | | | | | | | | | | | | When first created, we assumed the group ID and chip ID's were both 2 bits, but they're actually 3. This is updating the attribute. Change-Id: Iabc112f7202d410bd7bceab53c3ad79a1df17368 RTC:176434 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56039 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56112 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
* Update hreset HWP to always use scoms during HBRTChristian Geddes2018-04-061-3/+18
| | | | | | | | | | | | | | | | | | | | | | | | Previsouly there were checks in p9_sbe_hreset that made sure that we only did getcfam ops on slave chips and did scoms to access the registers on the master chips. This is correct for hostboot during IPL time but during runtime we always want to use scom to access these registers. This is safe because the fabric us up and we can perform xscoms on both chips. Change-Id: I5c48053d90278e1b3f9aacd5a74dda4ddc3620bb RTC: 190058 CQ: SW422692 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56183 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56186 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Use SCOM to access Master Processor's SBE MSG registerChristian Geddes2018-04-051-5/+21
| | | | | | | | | | | | | | | | | | Previously we always used CFAM to acess the sbe_msg_register. However, this will fail if we attempt to read the master via CFAM. The master processor cannot call getCfam on itself. In the case where we need to get this msg reg from the master we must use scom. RTC: 180604 CQ: SW421405 Change-Id: Iaa199361272e30b73114fafb8d3f6887c794464b Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55883 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55893 Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Adds blank files for DMI IOStephen Glancy2018-04-056-0/+144
| | | | | | | | | | Change-Id: I198706a0ad4308c5c9237304b4647a95c5ea6ba1 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56646 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Update to ifCompiler to produce *.bitsModified Care for PLL filter ringsClaus Michael Olsen2018-04-057-159/+386
| | | | | | | | | | | | | | | | | | | Key_Cronus_Test=XIP_REGRESS Change-Id: Ifd23d6bb3a4cead763487d80678f5a0817d81c5c Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54733 Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54907 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Update to fix ekb masterSoma BhanuTej2018-04-051-1/+1
| | | | | | | | | | | | | | original gerrit: https://ralgit01.raleigh.ibm.com/gerrit1/55871 Change-Id: I0d7163435c641d6f8c89e9982f80ecc8e19f1bec Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56617 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Tested-by: Thi N. Tran <thi@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56621 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Moves count_dimm to be in the memory generic folderStephen Glancy2018-04-0525-100/+37
| | | | | | | | | | | | | | | Change-Id: I6ff967f0f7d8f337f3e9b2011ba62e5554843f95 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55871 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55949 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Code restruct: ring_applyClaus Michael Olsen2018-04-058-251/+112
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Consolidating the three <ppe>_image_ring_generation functions into a single shared, and renamed, ring_section_generation function, - Moving several data centric functions into common_ringId API, - Use of sizeof(<type or var>) instead of hardcoded assumptions about structure or data type sizes, - Renaming of variables which makes sense in the context of the scope of this commit, such as: - ringBuffer renamed to ringSection - ringBufSize renamed to ringSectionSize and type changed to uint32_t - Removes the backward compatibility to TORV3/V4 and now only works with latest TOR version, i.e. 6 at this point. About the Hw_ImageBuild_Prereq: - 51511 must have fully propagated into all repos and drivers used in FSP CI tests before this commit (43175) can be merged. 43175 removes the TORV3/V4 backwards compatibility to support TOR ring sections that have TOR level DD coordination. Key_Cronus_Test=XIP_REGRESS Change-Id: I0af25fa623c1c523eb0297e475066497787f3d15 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43175 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52211 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Solution for proc_tod_setup during MPIPL.manichow2018-04-051-1/+16
| | | | | | | | | | | | | | | | | | | | | | Because of error inject before triggering MPIPL, bits of many configuration registers are not in correct state and they should be cleared before next configuration is done. Change-Id: I52477d490650725b27bf7755b4e0770969d9b67a CQ: SW416857 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56242 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: James N. Klazynski <jklazyns@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56244 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Pass SBE Security Backdoor Bit to HB BootloaderIlya Smirnov2018-04-041-2/+4
| | | | | | | | | | | | | | | | | | | | | | | Add a "SBE security backdoor" bit to reflect the state of the SBE security backdoor; the bit is passed to the hostboot bootloader from SBE. The new bit is the inverse of the ATTR_SECURITY_MODE attribute. Also bump the version of SBE/bootloader to reflect the change. Change-Id: Idf3009447c51c66306c043daf7f8189b8cbf2f36 RTC:188961 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56309 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56319 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* move xlink psave configuration to SBEJoe McGill2018-04-031-19/+0
| | | | | | | | | | | | | | | | | | | | | | | | 55058 added inits to prime the PPE for xlink psave the register touched is in the blacklist, so it can't be touched on slave chips via FSI in the ioe tl SCOM initifle -- this was triggering HW CI failures this commit simply shifts the register setup into the SBE, where it can be performed securely Change-Id: I57504ccfe4c5f7e71397d11c7468da42ec09f059 CQ: SW421691 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56252 Reviewed-by: DANIEL C. HOWE <dchowe@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56257 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Update settings to allow xlink psaveDaniel Howe2018-04-031-1/+20
| | | | | | | | | | | | | | Change-Id: I274b763348fbc906a92846415c000ba7d86d9e13 CQ: SW421691 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55042 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55058 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* PGPE: Error Handling SupportRahul Batra2018-04-032-29/+40
| | | | | | | | | | | | | | | | | | | | | | Key_Cronus_Test=PM_REGRESS Change-Id: I00aca629108aeaca88db34eec8e408f3cd48ff7f CQ: SW414842 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48635 Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: YUE DU <daviddu@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51525 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Includes NVDIMM in workaround for self-time refreshTsung Yeung2018-04-031-7/+25
| | | | | | | | | | | | | | | | | Change-Id: I02b7be92d91aacd78188de6dc7b2c428701fa794 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56333 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56339 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* PM: Generated Vratio/Vindex tablesRahul Batra2018-04-033-10/+63
| | | | | | | | | | | | | | | | | | | | Key_Cronus_Test=PM_REGRESS Change-Id: I9313dbe90771a549e14c8e90f2c2ca410616293a CQ: SW421682 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55059 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55069 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* configure Cumulus MC inband logic to pass host/occ bit under BARJoe McGill2018-04-032-3/+5
| | | | | | | | | | | | | | | | | | | | | | | In p9 mode, MCMODE0 bit 25 controls the extent of the inband BAR match: - bit 25 = 0b0 -- BAR match down to RA bit 38 - bit 25 = 0b1 -- BAR match down to RA bit 37, bit 38 passed to Centaur indicating host or OCC access In p8, we used the host/OCC bit to indicate the requestor. Current OCC code is continuing this behavior, so we need to set MCMODE0 bit 25 to allow this. Change-Id: I740549d61b9485e66d8a201ce9b80c241c9f2a85 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56044 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Adam S. Hale <adam.samuel.hale@ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56046 Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* create shells for IO OBUS pre, post training HWPsJoe McGill2018-03-306-0/+337
| | | | | | | | | | | | | | | | currently empty Change-Id: I324720af79af6a4a3a23dedcbc4bad804829a84d Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51799 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Christopher W. Steffen <cwsteffen@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56330 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* I/O Metadata CleanupChris Steffen2018-03-306-466/+0
| | | | | | | | | | | | | | | | | | | - Updated metadata - removed unused files Change-Id: Ic9029aadd46d4739f32ee3ecdd4f3e3afcc787b7 Original-Change-Id: Ifdeb030d682769755794b4bee7db03966a5b21ca Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46954 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Gary A. Peterson <garyp@us.ibm.com> Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56329 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* update HWP level metadata for nest, common filesJoe McGill2018-03-301-4/+5
| | | | | | | | | | | | | | | | | | Change-Id: I912881f947792c36ba7851dac8d65a6fc3c96e85 Original-Change-Id: I451695b8ae1d8f7d5ed6d512631992dea98b5ee8 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46967 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56328 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Initial Abus CommitChris Steffen2018-03-306-0/+466
| | | | | | | | | | | | | | | | | Change-Id: Idfeea4c9929f8093f4088bed84264d0ae4fd71ce Original-Change-Id: I696eea52aae38b8e75bd57a18ad64e32e9447dd1 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40727 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Reviewed-by: Gary A. Peterson <garyp@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56327 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* L2 - Fabric updates for multi-chip supportJoe McGill2018-03-302-0/+95
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Refactor p9_build_smp code Add FBC effective config (attribute-only) HWPs Add/call FBC initfiles HWP flow p9_fbc_eff_config p9_fbc_eff_config_links p9_chiplet_scominit p9_smp_link_layer p9_fab_iovalid p9_fbc_eff_config_aggregate p9_build_smp Update engd used in build to e9035 u087 Change-Id: Ieea1b19c3368d09da2992a6942c61b4c61b41bc8 Original-Change-Id: I9ab9e967847d380596e896a14e481ad8cf247b9a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21643 Tested-by: PPE CI Tested-by: Hostboot CI Tested-by: Jenkins Server Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56326 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Add empty p9c delayRegs.H for hostbootLouis Stermole2018-03-281-0/+24
| | | | | | | | | | Change-Id: Ie6cd4da2eb7dcae3ec4490d357c5ae963cc4d174 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56261 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Do not apply HW414958 to AxoneThi Tran2018-03-262-4/+37
| | | | | | | | | | | | | | | | | Change-Id: I6fcbc5f49fdce481c9525220bc69ad9c4e1ecf1b Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55945 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56016 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Mask off bit 26 of TP_LFIR on FSP machinesSoma BhanuTej2018-03-261-1/+8
| | | | | | | | | | | | | | | | | Change-Id: Ided77a0645e4f657b326ba5ec63f7c35ab6b2029 CQ: SW421112 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55906 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55908 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* HW438727 Disable clockgate to allow correct ODL error reportingJenny Huynh2018-03-231-0/+25
| | | | | | | | | | | | | | | | | | | | | | Additional change to scan init obus fir mask to all 1's to avoid any false reporting early in the IPL. Change-Id: I1501a050af5f723d968e5bfbb965d1ae3b567a97 CQ:HW438727 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54417 Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: DANIEL C. HOWE <dchowe@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54425 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Remove CDD1.1 security IMC; Apply indirect branch serialization to HV=0 onlyNick Klazynski2018-03-231-17/+0
| | | | | | | | | | | | | | | | | | Change-Id: I685b5608eb0fbfba755a50b0b0f27fc4d77a2d78 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55040 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55776 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Adds STR entry and exit functions to support NVDIMMTsung Yeung2018-03-238-43/+438
| | | | | | | | | | | | | | | | | Change-Id: Ia4385d885c4a4dd23378ec488a93209f547cb20b CQ:SW420342 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55226 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55986 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* PPB: Update occ min frequency with real driven valuePrasad Bg Ranganath2018-03-231-1/+12
| | | | | | | | | | | | | | | | CQ:SW417213 Change-Id: I89f273036d84d656c9253fe9950ece3b0315b968 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53715 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: RAHUL BATRA <rbatra@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53743 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* p9_sbe_lpc_init: Fix timeout setupJoachim Fenkes2018-03-232-0/+110
| | | | | | | | | | | | | | | | | | | | | Factor LPC register access out into its own utility function, with added timeout for the ADU access and proper FFDC if the ADU times out. CQ: SW418354 Change-Id: Ief05ccb022eeb1ec45d2f49f386fb58231966058 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54637 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54642 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* ATTR_CEN_VPD_DRAM_ADDRESS_MIRRORING: Remove writable tagPrachi Gupta2018-03-211-1/+0
| | | | | | | | | | | | | | | | | | VPD attributes are read from VPD, but it doesn't make sense for them to be writable. This fixes compiler issues on hostboot side as well. Change-Id: Ic707ea7e61b5d76fc85ff875d93b502adc645726 CQ: SW415651 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56128 Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: LUCAS W. MULKEY <lwmulkey@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56135 Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Adds secure mode boot for memory buffer chipsStephen Glancy2018-03-213-1/+227
| | | | | | | | | | | | | | | | Change-Id: I7d0ce9a9b51324ac89a05aeb6b68447fa200227b Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55639 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Dev-Ready: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55657 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Adds dynamic voltage blank files for HBStephen Glancy2018-03-194-0/+96
| | | | | | | | | | Change-Id: I9b2c4bd3092f7a44995df38db43c2049fccf481a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55963 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Revert "Adds self time refresh entry and exit helper functions"Daniel M. Crowell2018-03-165-264/+3
| | | | | | | | | | | | | This reverts commit 1d2a738923414693d7c567479c5f85f436b1c416. The original ekb commit was never merged... sigh... Change-Id: Icb43272a14e7c60842f1cd854d06cb1b852b374a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55961 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fix MFG P9 ZZ: BC70E540 (MCFIR[8]) command list timeoutThi Tran2018-03-161-1/+7
| | | | | | | | | | | | | | | | Change-Id: I14fdaaee2c5d8d877288f0c8bb68ecdb7f8bc359 CQ: SW421234 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55930 Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55938 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Include WOF power mode explicitly inside tablesMatt Derksen2018-03-161-2/+21
| | | | | | | | | | | | | | | | | | | | New header for mode inclusion. Needed to distinguish which table to use. Change-Id: I037e95288ccb5a963bd24e53484c8731c52d9790 RTC:187340 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54535 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54544 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* STOP: Fix Wakeup terminate prematurely with mixed stop2 and stop4Yue Du2018-03-161-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | This bug only impact when one core engages the error path As one core detects xstop or fail to startclocks, while we intend to bypass the error core and move on with the good remaining core, whose wakeup will be lost due to the bug Key_Cronus_Test=PM_REGRESS Change-Id: I27012164095b99429d8c46dca5b1c8b3da62e135 CQ: SW420556 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54833 Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Dev-Ready: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54850 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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