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* p9_block_wakeup_intr Level 2 - fix PPE compilation issueGreg Still2016-06-013-4/+11
| | | | | | | | | | | | | | | | - Moved ATTR_CHIP_UNIT_POS from core to perv - Add p9_hcd_common.H to allow for Hostboot CI Change-Id: I541f11e7312556a9a2f94226b90fd3b04ce83177 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24401 Tested-by: Hostboot CI Tested-by: Jenkins Server Tested-by: PPE CI Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24402 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Remove eq_dpll buckets from p9_ringId.HPrasad Bg Ranganath2016-06-011-47/+32
| | | | | | | | | | | | Change-Id: Iedb8b22bff56cf75a081758eda482e95213e544b Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24857 Tested-by: Jenkins Server Reviewed-by: GIRISANKAR PAULRAJ <gpaulraj@in.ibm.com> Reviewed-by: Claus M. Olsen <cmolsen@us.ibm.com> Reviewed-by: Martin Peschke <mpeschke@de.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25173 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* New Attribute for PIBMEM RepairSunil.Kumar2016-06-011-0/+29
| | | | | | | | | | | | | | Change-Id: Ifdce0e7a538356c1f0f3bdcd382dd8147167db43 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25225 Tested-by: Jenkins Server Tested-by: PPE CI Tested-by: Hostboot CI Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25228 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Level 2 HWP for p9_sbe_nest_startclocks,p9_sbe_startclock_chipletsAnusha Reddy Rangareddygari2016-06-015-27/+344
| | | | | | | | | | | | | | Change-Id: Ife07787240042354d7072f5c4674b14318cb0a71 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25116 Tested-by: Jenkins Server Tested-by: PPE CI Tested-by: Hostboot CI Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Reviewed-by: Sunil Kumar <skumar8j@in.ibm.com> Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25151 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* move production code from tools/imageProcs to chips/p9/utils/imageProcsMartin Peschke2016-06-011-0/+969
| | | | | | | | | | | | Change-Id: I516c770ec7fd6d1fb2f8f7933a2579038c13ce6d Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24786 Tested-by: Jenkins Server Reviewed-by: Claus M. Olsen <cmolsen@us.ibm.com> Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Reviewed-by: Martin Peschke <mpeschke@de.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25172 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Level 2 HWP for p9_sbe_chiplet_resetAnusha Reddy Rangareddygari2016-06-011-0/+16
| | | | | | | | | | | | | | Change-Id: Ibf4d7f4e08b925160652f029f673d9392c5cbaef Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24962 Tested-by: Hostboot CI Tested-by: Jenkins Server Tested-by: PPE CI Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Reviewed-by: Sunil Kumar <skumar8j@in.ibm.com> Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24965 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Level 2 HWP for p9_set_fsi_gp_shadowAnusha Reddy Rangareddygari2016-06-013-44/+182
| | | | | | | | | | | | | | Change-Id: Icb0bd70104ce8659a8e22aaca21864caf69846ff Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24796 Tested-by: Jenkins Server Tested-by: PPE CI Tested-by: Hostboot CI Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Reviewed-by: Sunil Kumar <skumar8j@in.ibm.com> Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24799 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Scominit Reset and Delay UpdateChris Steffen2016-05-242-5/+16
| | | | | | | | | | | | | Change-Id: I599b4c0aefb7035f3f043b5ed9eb8c40c8f776ca Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24743 Tested-by: Jenkins Server Tested-by: Hostboot CI Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Reviewed-by: Gary A. Peterson <garyp@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24744 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* HW Image: no .overrides sectionMartin Peschke2016-05-241-4/+2
| | | | | | | | | | | | | | | | | Removing .overrides from HW image since that is going to be a separate PNOR section. Change-Id: Id5fd18390e757be20ae35e484f47a953368f288b Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24832 Tested-by: PPE CI Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Tested-by: Jenkins Server Tested-by: Hostboot CI Reviewed-by: Claus M. Olsen <cmolsen@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24836 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* p9_scomoverride_chiplets -- remove workaround for HW354978Joe McGill2016-05-241-30/+0
| | | | | | | | | | | | | Change-Id: Ic4f78ede47dee9c419e66eedd37f6074050e13dd Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24483 Tested-by: Jenkins Server Tested-by: Hostboot CI Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24484 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* L2 - Fabric updates for multi-chip supportJoe McGill2016-05-245-0/+192
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Refactor p9_build_smp code Add FBC effective config (attribute-only) HWPs Add/call FBC initfiles HWP flow p9_fbc_eff_config p9_fbc_eff_config_links p9_chiplet_scominit p9_smp_link_layer p9_fab_iovalid p9_fbc_eff_config_aggregate p9_build_smp Update engd used in build to e9035 u087 Change-Id: I56ef8ba9b86f75b498de694e7665b841d12e0cea Original-Change-Id: I9ab9e967847d380596e896a14e481ad8cf247b9a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21643 Tested-by: PPE CI Tested-by: Hostboot CI Tested-by: Jenkins Server Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24880 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* p9_pm_occ_control Fix OCC memory boot launchingGreg Still2016-05-241-1/+32
| | | | | | | | | | | | | | | | | | | | - Build and push launcher instructions into OCC SRAM - Set SRAM Boot Vector 3 (FFFF_FFFC) to branch to launcher - Per OCC team, offset is HOMER+0x40 Change-Id: I2abbfea8de7b18d6010ee336031d0867cf9f0e99 RTC: 150818 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23561 Tested-by: Jenkins Server Tested-by: PPE CI Tested-by: Hostboot CI Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Sangeetha T S <sangeet2@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23563 Tested-by: FSP CI Jenkins Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Remove curly brackets for VECTOR_TO_1D_ARRAY macrosMatt Derksen2016-05-201-9/+4
| | | | | | | | | | | | | | Change-Id: Id6245684d53156ecb276824ca86fae03486f547e RTC:133837 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24754 Tested-by: Jenkins Server Tested-by: Hostboot CI Reviewed-by: Brian R. Silver <bsilver@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24756 Tested-by: FSP CI Jenkins
* Add eff_config functionality needed for RIT, fix cas_latency bug & attr filesAndre Marin2016-05-201-73/+73
| | | | | | | | | | | | | | Change-Id: If16f403c0ba7376e32b4a0eaa8958381d62b6e39 Original-Change-Id: I508ea4b156ff26ff7c652e28510a535b90030434 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23796 Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Tested-by: Jenkins Server Reviewed-by: Brian R. Silver <bsilver@us.ibm.com> Tested-by: Hostboot CI Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24843 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fix throttle procedure & MSS attribute clean upAndre Marin2016-05-201-15/+49
| | | | | | | | | | | | | | | Change-Id: I6ff864421bdb98b99170d1ed9ac30a833078b75c Original-Change-Id: I7b545b65aaf9cdfea08ab2c5142898f5c971a74b Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23486 Tested-by: Jenkins Server Tested-by: Hostboot CI Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Brian R. Silver <bsilver@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24842 Tested-by: FSP CI Jenkins
* Modify spd decoder API to hold its own SPD data, fix dependiciesAndre Marin2016-05-201-9/+21
| | | | | | | | | | | | | | Change-Id: I35f3c5ea70c8bea367ce2c260cd0ef0d8349f9c4 Original-Change-Id: Ida15c44455c0599deea3b455945ea78cf0ba0a5c Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23355 Reviewed-by: Brian R. Silver <bsilver@us.ibm.com> Tested-by: Jenkins Server Tested-by: Hostboot CI Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24841 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Modify freq & dep. files. Add cas latency & unit testsAndre Marin2016-05-201-0/+258
| | | | | | | | | | | | | | | | | Change-Id: I077032ed270548336de4d610a2b0902657b6808a Original-Change-Id: I205bf48e54fb3c8f19f973f58f8ec1d4c7345a23 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22632 Tested-by: PPE CI Tested-by: Jenkins Server Reviewed-by: Brian R. Silver <bsilver@us.ibm.com> Tested-by: Hostboot CI Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24840 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* ADU: Support PMISC NHTM control operationsThi Tran2016-05-203-17/+43
| | | | | | | | | | | | | Change-Id: Ife477914e9343ff70e7088c51fbd3a3ecde09167 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24682 Tested-by: Jenkins Server Tested-by: PPE CI Reviewed-by: CHRISTINA L. GRAVES <clgraves@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24838 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* p9_mem_startclocks -- skip clock start in sync_modeJoe McGill2016-05-191-15/+21
| | | | | | | | | | | | | With ATTR_MC_SYNC_MODE=1, MEM clocks are started in proc_sbe_nest_startclocks Change-Id: I003ed7a099035ba994c3a6c889c358bea7772ed5 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24511 Tested-by: Jenkins Server Tested-by: Hostboot CI Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24512 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* L2 - Fabric updates for multi-chip supportJoe McGill2016-05-195-0/+100
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Refactor p9_build_smp code Add FBC effective config (attribute-only) HWPs Add/call FBC initfiles HWP flow p9_fbc_eff_config p9_fbc_eff_config_links p9_chiplet_scominit p9_smp_link_layer p9_fab_iovalid p9_fbc_eff_config_aggregate p9_build_smp Update engd used in build to e9035 u087 Change-Id: I1b430ed553c8321d82057d67d13f3458750f790e Original-Change-Id: I9ab9e967847d380596e896a14e481ad8cf247b9a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21643 Tested-by: PPE CI Tested-by: Hostboot CI Tested-by: Jenkins Server Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24820 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add eff_config functionality needed for RIT, fix cas_latency bug & attr filesAndre Marin2016-05-1922-2371/+3850
| | | | | | | | | | | | | Change-Id: I508ea4b156ff26ff7c652e28510a535b90030434 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23796 Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Tested-by: Jenkins Server Reviewed-by: Brian R. Silver <bsilver@us.ibm.com> Tested-by: Hostboot CI Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23799 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fix MSS attribute file for cas latency type. Added dependencies.Andre Marin2016-05-191-20/+24
| | | | | | | | | | | | | | Change-Id: I3d8538d51ec86e315d87a5ee5ebf7f4fc60e18a7 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24814 Tested-by: Jenkins Server Dev-Ready: Brent Wieman <bwieman@us.ibm.com> Tested-by: Hostboot CI Reviewed-by: Brian R. Silver <bsilver@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24815 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fix HB build failure and incorrect HWP level lableThi Tran2016-05-193-2/+3
| | | | | | | | | | | | | Change-Id: If18698bff52f58edc82735d77c874702a7b0ba9e Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24809 Tested-by: Jenkins Server Tested-by: Hostboot CI Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24811 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Level 2 HWP for p9_sbe_tp_chiplet_init3Anusha Reddy Rangareddygari2016-05-191-0/+8
| | | | | | | | | | | | | | Change-Id: Ic5e6400f55cf200c89b9af2cf78074416609734b Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24763 Tested-by: PPE CI Tested-by: Jenkins Server Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Reviewed-by: Sunil Kumar <skumar8j@in.ibm.com> Tested-by: Hostboot CI Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24766 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Level 2 HWP for p9_setup_sbe_configAnusha Reddy Rangareddygari2016-05-191-1/+8
| | | | | | | | | | | | | | Change-Id: I906fcea684ead022a71d822d90b8380a20797838 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24768 Tested-by: Jenkins Server Tested-by: Hostboot CI Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: ARAVIND T. NAIR <aravindnair@in.ibm.com> Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24769 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Changes related to packaging of memory vpd on Nimbuswhs2016-05-191-0/+14
| | | | | | | | | | | | | | | | | | Create a HWP to process MR and MT keyword to map to memory vpd keyword. Change specialization from MCS to MCA. Change-Id: I426e4c7600e2158737c82e3c2380518c392ada5b RTC: 144519 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23775 Tested-by: Jenkins Server Reviewed-by: Brian R. Silver <bsilver@us.ibm.com> Tested-by: PPE CI Tested-by: Hostboot CI Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23798 Tested-by: FSP CI Jenkins
* Fix assert() in variable_bufferRichard J. Knight2016-05-181-2/+2
| | | | | | | | | | | | | | | | | -Updated code to use fapi2::Assert instead of assert() Change-Id: I5184f1f41c7b0568fac8d98e6b38d4de1b76269f RTC:128525 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24261 Tested-by: Jenkins Server Reviewed-by: Matt K. Light <mklight@us.ibm.com> Tested-by: PPE CI Tested-by: Hostboot CI Reviewed-by: Brian R. Silver <bsilver@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24264 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* modify target to use chip unit pos instead of fapi posSteven Janssen2016-05-181-7/+7
| | | | | | | | | | | | | | Change-Id: Ie63e72496533555b8c051a965a83662f5290d2d2 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24664 Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins Server Tested-by: Hostboot CI Reviewed-by: Steven B. Janssen <janssens@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24667 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* P9 Xbus System Model FixesChris Steffen2016-05-186-28/+165
| | | | | | | | | | | | | | | | | | | | | Various Fixes to run on the system model - Updated the initfiles to latest model - Fixed Reset in scominit file - Fixed 64-bit get/set scom error - Added Longer hw linktraining delays - Added more Debug Statements in the Dccal Procedure - Updated wrappers to be common by passing in the target group Change-Id: I695b4fc4c4abca259e37b89f631ce65b6212245d Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24465 Tested-by: Jenkins Server Tested-by: Hostboot CI Reviewed-by: Gary A. Peterson <garyp@us.ibm.com> Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24471 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* p9_pm_corequad_init: Level 2 - Fapi 1.0 to Fapi 2.0 transliterationSangeetha T S2016-05-181-1/+36
| | | | | | | | | | | | | | Change-Id: I779ac5c24decb6121ce8a4e7a46ea657d0cbf3d7 RTC: 148006 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22233 Tested-by: Jenkins Server Tested-by: PPE CI Tested-by: Hostboot CI Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22235 Tested-by: FSP CI Jenkins
* Add option to make c_str_storage not thread_localcrgeddes2016-05-182-2/+13
| | | | | | | | | | | | | | | | | Hostboot is having issue with thread-local again, putting this in until it is resolved Change-Id: Ia1c6f447dd9d83700075874bf69034a756f01a4d RTC:153924 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24514 Tested-by: Jenkins Server Tested-by: Hostboot CI Reviewed-by: Brian R. Silver <bsilver@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24595 Tested-by: FSP CI Jenkins
* Update rank.C to initialize l_ranks to 0 for ranks() functioncrgeddes2016-05-181-1/+1
| | | | | | | | | | | | | Change-Id: I1da19e964d51296ca111619dc462fc7065c71713 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24474 Reviewed-by: Brian R. Silver <bsilver@us.ibm.com> Tested-by: Jenkins Server Tested-by: Hostboot CI Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24476 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Changing error messages to save SBE spaceCHRISTINA L. GRAVES2016-05-181-33/+2
| | | | | | | | | | | | | | Change-Id: I1d654bdcb0d131e668da6af52115ab5b2ba7b786 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23992 Tested-by: Jenkins Server Tested-by: PPE CI Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: RAJA DAS <rajadas2@in.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Tested-by: Thi N. Tran <thi@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24715 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* initCompiler: update all initfile procedures with latest initCompilerPrachi Gupta2016-05-181-6/+3
| | | | | | | | | | | | | Change-Id: I2f810f7a0324941fdab58343996294f80ea441d8 Original-Change-Id: Ic5980d684b354a4e4f205b5cb6d0d08dc01ed3ea Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22569 Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server Tested-by: Hostboot CI Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24714 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* L2 - Fabric updates for multi-chip supportJoe McGill2016-05-1812-2092/+823
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Refactor p9_build_smp code Add FBC effective config (attribute-only) HWPs Add/call FBC initfiles HWP flow p9_fbc_eff_config p9_fbc_eff_config_links p9_chiplet_scominit p9_smp_link_layer p9_fab_iovalid p9_fbc_eff_config_aggregate p9_build_smp Update engd used in build to e9035 u087 Change-Id: Iebe7b1fe2b82f99666fb32ba2c5b9a2fd7f6f72e Original-Change-Id: I9ab9e967847d380596e896a14e481ad8cf247b9a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21643 Tested-by: PPE CI Tested-by: Hostboot CI Tested-by: Jenkins Server Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24713 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Per Sachin's request for SBE code I changed FAPI_INF traces to FAPI_DBGCHRISTINA L. GRAVES2016-05-181-2/+2
| | | | | | | | | | | | | | Change-Id: I0077040e00d1a845d1f129d65aac7a5ebdab67c9 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23215 Reviewed-by: Thi N. Tran <thi@us.ibm.com> Tested-by: Jenkins Server Tested-by: PPE CI Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24712 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fix for run_ipl for JoshCHRISTINA L. GRAVES2016-05-181-10/+0
| | | | | | | | | | | | | Change-Id: I653e12aa5d006900d612c197b49b5299fc7b8628 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22393 Tested-by: Jenkins Server Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: JOSHUA L. HANNAN <jlhannan@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24711 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Change CL DMA read ttype value to 6 instead of 3CHRISTINA L. GRAVES2016-05-181-1/+1
| | | | | | | | | | | | | Change-Id: I743072094583c52451ebb7c3dda556379a6369f4 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22255 Tested-by: Jenkins Server Tested-by: PPE CI Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24710 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Remove chiplet null check in p9_build_smp_fbc_nohp.CThi Tran2016-05-181-22/+25
| | | | | | | | | | | | Change-Id: I76e2c67b9bf5a04562e7adbcc7f7ba408baec888 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21856 Tested-by: Jenkins Server Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24709 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* L2 - p9_build_smp HWPsThi Tran2016-05-1810-164/+3638
| | | | | | | | | | | | | | | | Change-Id: I603cc314d907653d22606329d881e9cc908468be Original-Change-Id: Ic3b000e1c9844499c478e29f2d370d037a8fc262 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22704 Tested-by: Jenkins Server Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Auto Mirror Tested-by: PPE CI Tested-by: Hostboot CI Reviewed-by: CHRISTINA L. GRAVES <clgraves@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24708 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fix all incorrect copyright prologsStephen Cprek2016-05-182-2/+2
| | | | | | | | | | | | | Change-Id: If1170d2545e673d735a07bf3bcff0cc5bbfd3363 Original-Change-Id: I293e79b5a37bf4180f6dd19d259fac3434327fb3 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22759 Tested-by: Jenkins Server Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: PRACHI GUPTA <pragupta@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24707 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fix for data not being written correctly and for an error Dean sawCHRISTINA L. GRAVES2016-05-181-28/+21
| | | | | | | | | | | | Change-Id: I5a4a2cf34d3d6d773b983783d2cc68c2e9dd7d65 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22433 Tested-by: Jenkins Server Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24706 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* p9_adu_access and p9_adu_setup L2 proceduresCHRISTINA L. GRAVES2016-05-184-0/+1011
| | | | | | | | | | | | Change-Id: Id374670d8f75dc74f37967f6c95ef773796e3f1e Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21092 Tested-by: Jenkins Server Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: STEPHEN M. CPREK <smcprek@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24705 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* L2 - Fabric updates for multi-chip supportJoe McGill2016-05-183-0/+111
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Refactor p9_build_smp code Add FBC effective config (attribute-only) HWPs Add/call FBC initfiles HWP flow p9_fbc_eff_config p9_fbc_eff_config_links p9_chiplet_scominit p9_smp_link_layer p9_fab_iovalid p9_fbc_eff_config_aggregate p9_build_smp Update engd used in build to e9035 u087 Change-Id: I8306289996c972f93431f40bf2aae3a79b387ebf Original-Change-Id: I9ab9e967847d380596e896a14e481ad8cf247b9a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21643 Tested-by: PPE CI Tested-by: Hostboot CI Tested-by: Jenkins Server Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24686 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* io removing unused filesChris Steffen2016-05-181-306/+0
| | | | | | | | | | | | | Change-Id: I3af4b18905d79408869d29e31a6807b04605ea39 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24507 Tested-by: Jenkins Server Tested-by: Hostboot CI Reviewed-by: Gary A. Peterson <garyp@us.ibm.com> Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24508 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Define attributes for synchronous modeDan Crowell2016-05-182-11/+17
| | | | | | | | | | | Changed ATTR_MC_SYNC_MODE to be writeable instead of platInit ATTR_REQUIRED_SYNCH_MODE holds the rules on what mode to use Change-Id: Ibb8b01635db885490e4c4d287e0316bb2e9abffc Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24548 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* L2 - Fabric updates for multi-chip supportJoe McGill2016-05-171-0/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Refactor p9_build_smp code Add FBC effective config (attribute-only) HWPs Add/call FBC initfiles HWP flow p9_fbc_eff_config p9_fbc_eff_config_links p9_chiplet_scominit p9_smp_link_layer p9_fab_iovalid p9_fbc_eff_config_aggregate p9_build_smp Update engd used in build to e9035 u087 Change-Id: I79103b9c996d0ebc3029c6b4141d081a0a8f9685 Original-Change-Id: I9ab9e967847d380596e896a14e481ad8cf247b9a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21643 Tested-by: PPE CI Tested-by: Hostboot CI Tested-by: Jenkins Server Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24660 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* L2 - Fabric updates for multi-chip supportJoe McGill2016-05-171-0/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Refactor p9_build_smp code Add FBC effective config (attribute-only) HWPs Add/call FBC initfiles HWP flow p9_fbc_eff_config p9_fbc_eff_config_links p9_chiplet_scominit p9_smp_link_layer p9_fab_iovalid p9_fbc_eff_config_aggregate p9_build_smp Update engd used in build to e9035 u087 Change-Id: Ic86efa92cef691a032aef9a3a9b3756ab3025bf6 Original-Change-Id: I9ab9e967847d380596e896a14e481ad8cf247b9a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21643 Tested-by: PPE CI Tested-by: Hostboot CI Tested-by: Jenkins Server Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24655 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* L2 HWPs - p9_mss_setup_barsThi Tran2016-05-161-0/+86
| | | | | | | | | | | | | | | Change-Id: I54180802817bdc3b0222f12d178a54b58ded30c7 Original-Change-Id: I9d874a9d90ad1cf0fc9ee7c9366a3610b09b9073 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21671 Tested-by: Jenkins Server Tested-by: Auto Mirror Tested-by: Hostboot CI Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: JOSHUA L. HANNAN <jlhannan@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24598 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* splitting up functionality to bring p9_pm_get_poundv_attr accessible to cronusSteven Janssen2016-05-163-0/+307
| | | | | | | | | | | | | | Change-Id: I70b1ba297035b40c2d000d0281d148e55caf0083 Original-Change-Id: Iac60adb51f18677e6bdf07c0204393928c0a90d3 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24391 Tested-by: Jenkins Server Tested-by: Hostboot CI Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24603 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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