| Commit message (Collapse) | Author | Age | Files | Lines |
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Key_Cronus_Test=PM_REGRESS
Change-Id: I5a262518f2d4ecfb496f114e16f054a892285a9f
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55898
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55899
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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- use the present value of ATTR_EXT_VRM_STEPSIZE (used by PGPE for Pstate
movement) to step the the boot voltage setup during istep 8. This attribute
defaults to 50mV.
- Done only for rails attached via AVSBus
Key_Cronus_Test=PM_REGRESS
Change-Id: I63feb361323246c8b92f1e96dc41f8fc19bd0912
CQ: SW420343
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55386
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
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Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55395
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I86d7174ef0ddf78cc7d1fbd55be0de45b2fb1ff0
Original-Change-Id: I4d4704098f92004f5a6a141e16b80a2b2dd2a3ff
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54925
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
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Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55632
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
CI-Ready: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: If884719fcc42a6023e9d9f35390db22f49b0e3ee
Original-Change-Id: I9ee4a8c97705ea5aa984c2c0137ed012d50eb658
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54711
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
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Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55631
CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I5f3b926fcfbad707b2fe9d4e71be065092f89fab
Original-Change-Id: I0960ec588156f3df3f863b6c5fa41bbed95e089e
RTC: 183048
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53139
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
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Dev-Ready: Soma Bhanutej <soma.bhanu@in.ibm.com>
Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com>
Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: NAGENDRA K. GURRAM <nagendra.g@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55630
CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Set HW426891 attribute for Axone.
Change-Id: Ie6d7e23a586651c37c0e93b26a1212ef1bb66ddf
Original-Change-Id: I2c023f3f7cd4060d5acd9bc7ce39bd58b5c56c05
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54069
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Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com>
Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55629
CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Also initial mk files for p9n 2.3, but p9c 1.2 will be first.
Change-Id: I0d095f0ff61ec4dd20cc9a1059a225f701daaf29
Original-Change-Id: Ia73aba37be5bcf64b1b2cfe5b1ed153b189c7777
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53909
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
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Reviewed-by: James N. Klazynski <jklazyns@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55628
CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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CQ: SW416424
cmvc-prereq: 1046058
cmvc-prereq: 1043606
cmvc-prereq: 1045920
cmvc-prereq: 1046552
cmvc-prereq: 1045908
Change-Id: Ib82abea5a299e91b33b86db8a1f11ce5783e3bcb
Original-Change-Id: I3752f5b5868d7cc8ed3ffdf69a13025989a47eaa
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54270
Dev-Ready: Jenny Huynh <jhuynh@us.ibm.com>
Dev-Ready: James N. Klazynski <jklazyns@us.ibm.com>
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Reviewed-by: Benjamin Gass <bgass@us.ibm.com>
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55627
CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I4c9d7f70d91dd93b9b67a3710be2bea780b073ee
Original-Change-Id: Iaf1a83505ed9bdd9e79bfc46157856263c392736
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53783
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: LENNARD G. STREAT <lstreat@us.ibm.com>
Reviewed-by: SHELTON LEUNG <sleung@us.ibm.com>
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Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55626
CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I608013452451036f1e101f0756240c668bd3516d
Original-Change-Id: I376860a1530ce8ba467d18ea97c0da4e6672e53f
CQ: HW436858
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54056
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Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55625
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Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Modified the checks to disable WOF by default for Nimbus DD2.0
since most parts have invalid module vpd.
Also changed the severity that is used to log errors getting a
WOF table to make them visible logs. Without this change we
won't know why the lookup failed in many cases.
Change-Id: I11de0a3589f78a29d0b1198b6662bfe09ee8d6c4
Original-Change-Id: Ic8fd9b4bdc23311897363552f0c88fa2b1b0247b
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53274
Reviewed-by: Francesco A. Campisano <campisan@us.ibm.com>
Dev-Ready: Francesco A. Campisano <campisan@us.ibm.com>
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Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55624
CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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The original patch: https://ralgit01.raleigh.ibm.com/gerrit1/#/c/45266/
was merged prematurely.
It was reverted in: https://ralgit01.raleigh.ibm.com/gerrit1/#/c/50703/
pre-commit-actions updated to call code-beautifier twice. Some generated
code for initfiles changes between first and second passes.
Change-Id: I5e36105a5cb91f57935e5600679aaa2f61afed4e
Original-Change-Id: I25bdc2ceaf9636a2f6559775bc8cb9616848c9d7
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50741
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Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Richard J. Knight <rjknight@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55623
CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I8c19d720b0f9fbbcedc3e6b4a65d7ea196857213
Original-Change-Id: I1fbc2c79330520d6033adfafe85a89fc71ed3fb0
CQ: HW437820
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53911
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Reviewed-by: Kevin F. Reick <reick@us.ibm.com>
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55622
CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I2f296610b428e2eb8553220208a1603644c36eec
Original-Change-Id: Id1dca730debe012d706fb9eb2fa236c7fb92fab8
CQ: HW437173
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53649
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Reviewed-by: RYAN BLACK <rblack@us.ibm.com>
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55621
CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: Icb9db94ec4b12e9566df47ed8764b870be0909de
Original-Change-Id: I565fe99adc16d8b2c56d6ca8365c77ae5bad0aef
CQ: HW414700
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50287
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Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55620
CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: Ib6387e1b467ab9307bf4635cfb189082c1da9813
Original-Change-Id: I8a87781a9b78eef0a504d6c1eb2dfdfeb53e7ff7
CQ: HW435226
CQ: HW435395
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52929
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Reviewed-by: Kevin F. Reick <reick@us.ibm.com>
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55619
CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I909fd22a26be6e2ff5b63f63b3f6dc0237bce778
Original-Change-Id: Ic2cf3510350aa00c0641cc910824000bf58d8276
RTC: 177741
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52512
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Reviewed-by: RAJA DAS <rajadas2@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
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CQ: SW414265
Change-Id: Ia72d65228ed03cbc8c831cd58f7464fd5f546023
Original-Change-Id: I1518e78d87e1a9a115cec26cda75c3708ae4c421
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52350
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Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com>
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/wiki/W9f19463eb4a5_44ca_ad0c_a35ccf4e7d1e/page/IMCs%20by%20Project
Change-Id: Ibc156b20736cbb7622303da447fd368eb74194c4
Original-Change-Id: Ib6b7ec4daf84bf9125bc68a4a4f287175a385b07
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52206
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Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: Ie16e1531bdb7df4ea9fc3deb59fc8bf48ce1b0bc
Original-Change-Id: Ief523bd33a34a6a96f61664f6ab3545d9dc15d98
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Change-Id: I129f743082c43cf2f90197e5df924e83312f2367
Original-Change-Id: I0d0aebc925c963a32e2cf2266e833df84a799235
CQ: HW409194
CQ: HW407065
CQ: HW419541
CQ: HW430944
CQ: HW417829
CQ: HW422533
CQ: HW414249
CQ: HW432749
CQ: HW414146
CQ: HW433125
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51677
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Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
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Change-Id: I95638d9cccff2c5b66bd02c006d6b1f5e09464dd
Original-Change-Id: I5435bef91381ade76a1439a842fa90b86e17aab3
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51599
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Key_Cronus_Test=PM_REGRESS
Change-Id: Ic2b8bdc7186e59536549c4cbb1f910f1bcf9d189
Original-Change-Id: If2916c99b37c4ce56ad1cf6f6957d67497fac5ab
CQ: SW412668
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51394
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Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: Ib85e09727d418a5730377040be4b86352c90913f
Original-Change-Id: Iee18d460dc99de59eb0b1f8891dad1e8698e3208
CQ:HW430944
CQ:HW432070
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51370
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Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
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Change-Id: If9e3251b6115af47f32b1b26ce93253f569f1074
Original-Change-Id: I6c64841173f036c4898c199ef1615046a3974dcc
CQ: HW422471
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48525
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- IMC6 changed to implement special nop
- IMC7 serializes bcctr for NDD2.2/CDD1.1
- mttrig2 moved to mttrig0
- mttrig2 now causes an L1 flush on NDD2.2/CDD1.1
- Force private L1D
- branch hint bits always honored
- enable new TM mode for NDD2.2
Change-Id: I625888ae8f1bf5dffba7d2b41ded8025b8622987
Original-Change-Id: I3b724f6d742b9ba321ea1abbfa6bbc7d5482b8ed
CQ: HW430733
CQ: SW410726
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50872
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Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55609
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Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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centaur.mbs.scan.initfile
Remove static application of read data delay disables
Centaur will now flush to read data delay enabled
cen_initf
Add block to re-rotate tcn_mbs_func and:
- fix existing spy parity errors
- apply read data delay disables,
executed only when attached chip is Cumulus DD1.0
Change-Id: Id5d0f8755fed09dc841dc7481d0fe142bbe8bbb7
Original-Change-Id: I10279decbbf27df911a94ce27d11b4d2e30b6e5f
RTC: 138785
CQ: HW419021
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50720
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Change-Id: I7a363d37c9003778a21896d0ade2b52a6a7fe162
Original-Change-Id: I1c93a9b505e6656ea9bda20a7fac363e037a3d73
CQ: HW430546
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50832
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chip_ec_attributes.xml
add ATTR_CHIP_EC_FEATURE_HW423589_OPTION1, defines set of chips which need
MCD disable for HW423589 (applied to Nimbus EC20 and 22+)
p9.cxa.scom.initfile
p9.int.scom.initfile
p9.l2.scan.initfile
p9.l3.scan.initfile
p9.mmu.scom.initfile
p9.ncu.scan.initfile
p9.npu.scom.initfile
p9.nx.scom.initfile
p9.trace.scan.initfile
p9.vas.scom.initfile
p9_pcie_config.C
set unit scope disable dials
p9_sbe_scominit.C
p9_pm_pba_init.C
set PBA unit scope disable dial
p9_pm_set_homer_bar.C
change PBA0 default command scope from GROUP to NODAL
p9.fbc.ab_hp.scom.initfile
disable group master setup
p9_setup_bars.C
p9_setup_bars_defs.H
skip MCD setup for HW423589_OPTION1
Change-Id: I98ece25970e868fda8af06f350438cf4a76180b9
Original-Change-Id: I402701bdd3266e19dbbe8c717b8a54942e3c9ee2
CQ: HW423589
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48961
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Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
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Nimbus DD2.0 disable will go into op910 only (for Boston Coral)
but not into master
Change-Id: If4a85e478e27e32af203bfa57f8eaa0fe467b9ea
Original-Change-Id: I28376316be3e6700af97df83a02c48e46d715dec
CQ: HW415945
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Reviewed-by: Thi N. Tran <thi@us.ibm.com>
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This reverts commit 41352b2d444e98639eedc06b1eb0d8da89d4adb3.
Change-Id: I9d90ccb7eb84f65000e57851dadab900ce0c3b37
Original-Change-Id: Ic3f2099eff3f5c942ef8fb6916e8ee78ca1a9e82
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Adding CTEPERLPATH to ENV-setup
Jenkins failure CQ SW40996
Change-Id: I5a9d025d2e201d2eedc98d46732ff1aca52a17e8
Original-Change-Id: I02a9c5f31fb0545e8f8c8cd99b528a467ae52cf8
CQ: SW409966
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45266
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Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55603
CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Turning on the 64B store prediction inside the L2. This is a
performance fix.
Change-Id: If6f1da065f7ee74dfb7298eec28be3e23b6c9626
Original-Change-Id: I2e91747e2cf420ffa50efeb73b8876e54c89b8d6
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50531
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55602
CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I0a83730298db3cb3a8898f4165748a29516946e7
Original-Change-Id: Ibf7f3276279e99e82841d2a209230ce38081c419
CQ: HW426816
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50480
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55601
CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: Ie3afb752063e4b802707f37ad495a9c3ecdac99e
Original-Change-Id: I209bf1735b7107303bbd9009d7c99201809ba8bf
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50315
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Kevin F. Reick <reick@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55600
CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Performance wants a way to turn memory early data on & off
using just scoms. Adding one attribute to control all the needed
scoms and defaulting everything so that early data is off.
For the L3 disable cp_me by default using scom
Changing the scom cp_me dial to disable cp_me for all systems
after Nimbus DD2.0. This is expected to be the correct setup
for most systems.
We didn't disable the cp_me at the scan, because the scom can
only disable cp_me if ON or allow the scan setting if set OFF. Some
systems might want cp_me enabled by only changing a scom. So the default
is to set cp_me on at the scan and off a the scom. This way only the
scom has to be turned off to enable cp_me.
Also update three scoms in the memory controler that are needed for
early data.
Change-Id: Id27ac44631cb0d29a30e295014a11ac43034954a
Original-Change-Id: Ib2106ec4b7d26cb084601f2d6eee68833b36d30b
CQ: HW426419
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49261
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55599
CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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chip_ec_attributes.xml
nest_attributes.xml
p9_sbe_attributes.xml
add ATTR_CHIP_EC_FEATURE_EXTENDED_ADDRESSING_MODE, defines
set of chips which physically support the feature
add ATTR_CHIP_EC_FEATURE_HW423589_OPTION2, defines set of chips
which need extended address workaround for MCD issue (applied only
to Nimbus EC 21)
add ATTR_MAX_INTERLEAVE_GROUP_SIZE, to restrict maximum size of
memory groups formed. Written by p9_mss_eff_grouping. For
HW423589_OPTION2, this will default to 512GB
add ATTR_FABRIC_ADDR_EXTENSION_[GROUP|CHIP]_ID, to hold
extended address configuration. Written by p9_sbe_fabricinit (SBE)
and p9_mss_eff_grouping (HB). For HW423589_OPTION2, this will
default to 0b0000_111, consuming all chip ID bits for extended
addressing.
p9_fbc_utils.C
p9_fbc_utils.H
extend p9_fbc_utils_get_chip_base_address to support address
extension, now outputs set of ranges in each msel based on
ATTR_FABRIC_ADDR_EXTENSION[GROUP|CHIP]_ID
maintain original function for PPE platform which requires
knowledge of non-aliased base addresses only, for code size
p9_mss_eff_grouping.C
p9_mss_eff_grouping_errors.xml
set ATTR_FABRIC_ADDR_EXTENSION[GROUP|CHIP]_ID for HB platform
restrict size of groups formed for HW423589_OPTION2
p9_sbe_fabricinit.C
set ATTR_FABRIC_ADDR_EXTENSION[GROUP|CHIP]_ID for SBE platform
configure FBC/NMMU extended addressing registers
p9_setup_bars.C
p9_setup_bars_defs.H
p9_setup_bars_errors.xml
add general purpose support for extended address mode
for HW423589_OPTION2, configure static MCD setup
p9_hcode_image_defines.H
p9_hcode_image_build.C
customize SGPE image with address extension configuration to apply
p9.cxa.scom.initfile
p9.int.scom.initfile
p9.l2.scom.initfile
p9.l3.scom.initfile
p9.ncu.scom.initfile
p9.nx.scom.initfile
p9.trace.scan.initfile
p9.vas.scom.initfile
p9_hcd_cache_scominit.C
p9_hcd_cache_scominit.c
p9_pcie_config.C
set unit address extension configuration on supported chips
p9_rng_init_phase2.C
p9_sbe_scominit.C
p9c_set_inband_addr.C
p9_sbe_load_bootloader.C
p9_sbe_mcs_setup.C
adapt to alterations in p9_fbc_utils_get_chip_base_address
Change-Id: I6731cc5ec940cd19441faf6367be0908fbae7cbe
Original-Change-Id: I614d566c073f1169f04f647057e6e85889f1c237
CQ: HW423589
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48576
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55598
CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I159b42e843e4692d821bebfa2d042362b9e651da
Original-Change-Id: Id4c1686cb111a14bef856fc91053228ff2e490d4
CQ:HW426891
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49578
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Kevin F. Reick <reick@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55597
CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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p9_sbe_chiplet_reset
remove deassertion of OBUS clk async reset, shift to
p9_sbe_startclock_chiplets
p9_sbe_startclock_chiplets
conditionally remove workaround (assert iovalid, clock, deassert iovalid)
instituted to flush DL glmux select pipeline, these will be set via scan
for supported chips
deassert OBUS clk async reset
p9_chiplet_scominit
remove assertion of NV iovalid from HB
p9.npu.scan.initfile
alter flush state of NVDL glsmux select pipe latches to 0b10
p9.obus.scan.initfile
alter flush state of IOO PHY logic to enable lane clocks
clear RX_LANE_ANA_PDWN
clear RX_CLKDIST_PDWN
set RX_IREF_PDWN_B
Change-Id: I3ae74efba822aa4fa5dba2cca9d4f25fb21415ba
Original-Change-Id: Ib9d4bf18a181ed1cf55eaf92e1486c494757d657
CQ: HW404391
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50027
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55596
CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: Ib4741fe9e14002052b77a9fccf5ee0cd57a1625a
Original-Change-Id: I55d2926b1cd2de7fcda4a475837e1ff54b2cc229
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49537
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55595
CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I38c7dec4722578723905a351603adae72ec6fcd1
Original-Change-Id: I23eeb099239e61073659a1e4633e388f8db0a319
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49535
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Reviewed-by: LUKE MURRAY <murrayl@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55594
CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I3c576b7213cb90f58444b3e1b2e7179682d38b73
Original-Change-Id: Ib7f554f6249db510e6c13cb871ab110a5ea4570b
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49559
Reviewed-by: Ann C. Wu <annchen@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55593
CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I7b90137248388c8e54bffc63a168f590c5b38d71
Original-Change-Id: I42a3601917ab4d4b32b32e03d33ffa1f8c0da25f
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49608
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Dev-Ready: Kahn C. Evans <kahnevan@us.ibm.com>
Reviewed-by: Richard J. Knight <rjknight@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55592
CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I2681f2b574d8fd4f8e6d6cf0827a58f67a789560
Original-Change-Id: Id71511d75e526e567fd8ba6b56551adfe2806fa4
CQ: SW407851
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49390
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55591
CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I899d4b9bcf8da2eafedd39f6370a84594b471640
Original-Change-Id: I85813e422b4bdc9f01d1f891bece26b7fd6fdbf5
CQ: HW425038
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49241
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55590
CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Per Ron Kalla's request, NDD2.1 should not use risklevel
Change-Id: I0bfbd1619e0b64061234680eac642aef4937d212
Original-Change-Id: I2354c2523d760ac16f7c4c2429003ef07e58225d
CQ: HW403465
CQ: SW406970
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49148
Dev-Ready: James N. Klazynski <jklazyns@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: James N. Klazynski <jklazyns@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55589
CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Attributes:
-------------------------------------------------------------------------------
nest_attributes.xml
add ATTR_LINK_TRAIN, written by platform on X, O endpoints to specify
whether half or full link should be trained
add ATTR_PROC_FABRIC_LINK_ACTIVE, written by p9_fbc_eff_config_links
adjust enums for ATTR_PROC_FABRIC_[XA]_ATTACHED_CHIP_CNFG, written
by p9_fbc_eff_config_links
add ATTR_PROC_FABRIC_[XA]_LINKS_CNFG, written by p9_fbc_eff_config_links
pervasive_attributes.xml
create ATTR_PROC_NPU_REGION_ENABLED to encapsulate accessibility of
NPU logic domain, written by p9_chiplet_scominit
chip_ec_attributes.xml
add EC feature attribute controlling DL training workaround
Initfiles:
-------------------------------------------------------------------------------
p9.fbc.ab_hp.scom.initfile
add logic to permit reset of chg_rate master dials in second phase SMP build
adjust link enable expressions to reflect new ATTACHED_CHIP_CNFG enums
p9.fbc.cd_hp.scom.initfile
p9.fbc.no_hp.scom.initfile
consume number of configured X/A links from new attribute, simple addition
won't work any longer given new ATTACHED_CHIP_CNFG enums
p9.fbc.ioe_dl.scom.initfile
support half-link operation, based on ATTR_LINK_TRAIN on X endpoint target
p9.fbc.ioe_tl.scom.initifle
adjust link enable expressions to reflect new ATTACHED_CHIP_CNFG enums
p9.fbc.ioo_dl.scom.initfile
support half-link operation, based on ATTR_LINK_TRAIN on O endpoint target
qualify OLL enablement based on use as active fabric link
adjust PHY training parameters based on current lab learning
p9.fbc.ioo_tl.scom.initfile
adjust link enable expressions to reflect new ATTACHED_CHIP_CNFG enums
support half-link operation, based on ATTACHED_CHIP_CNFG
qualify TOD_ENABLE to apply only to O links carrying X traffic
p9.npu.scom.initfile
clear OPTICAL_IO_CONFIG when not actively using NVLINK, finer-grained
updates needed to support mix of O SMP and NVLINK usage
HWPs:
-------------------------------------------------------------------------------
p9_io_obus_dccal
execute only on links actively carrying fabric protocol
p9_io_obus_linktrain
p9_io_regs
encapsulate PHY FIFO reset sequence needed prior to FBC DL training execution
p9_chiplet_scominit
p9_npu_scominit
partial good updates for NPU region
p9_fab_iovalid
adjust iovalid manipulation/checking, as well as link delay reporting, to
support half-link configuration
p9_smp_link_layer
support half-link configuration via ATTR_PROC_FABRIC_[XA]_ATTACHED_CHIP_CNFG
implement OBUS PHY specific workarounds
p9_eff_config_links
update ATTR_PROC_FABRIC_[XA]_ATTACHED_CHIP_CNFG to support half-link
configuration
write ATTR_PROC_FABRIC_LINK_ACTIVE on X/O endpoint targets
write ATTR_PROC_FABRIC_[XA]_LINKS_CNFG to reflect total number of logically
configured links, for initfile consumption
Istep wrappers:
-------------------------------------------------------------------------------
p9_build_smp_wrap
correctly loop over all system targets for second phase SMP build
p9_sys_chiplet_scominit_wrap
initial release
Change-Id: I6254051becffe41322f07039cde99bff3eb8f950
Original-Change-Id: Ic1d87df4d3ff0feca7ac2437fa61b6d2fc4a2d68
CQ: HW419022
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43905
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: DANIEL C. HOWE <dchowe@us.ibm.com>
Reviewed-by: Matt K. Light <mklight@us.ibm.com>
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55588
CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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dis_tracker_merge does not matter since dis_tracker is now
enabled everywhere, so I removed it.
Change-Id: Ib59b11257ac5e4f76473a7493374d3a15868bfd6
Original-Change-Id: I9eb2871eec16f167c9f7514dcb84e057e0196f90
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49003
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Dev-Ready: James N. Klazynski <jklazyns@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55587
CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I12ccebb87e39871e84f2bf416bfd57e0cc56fb78
Original-Change-Id: I954651af59c18401a9bd5f389f86b8faf799edbd
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48817
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55586
CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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* IOF0 pll initf for Axone
* Clock mux settings
Change-Id: Ib4f97a2a73acf454684cbe5d4a62c27a799ac681
Original-Change-Id: I1c6350bca42fc11e8e2a93f4134ea5db76daf79e
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48278
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55585
CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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