summaryrefslogtreecommitdiffstats
path: root/src/import/chips/p9/procedures/xml/error_info/p9_fab_iovalid_errors.xml
Commit message (Collapse)AuthorAgeFilesLines
* support IO reconfig loop for OBUS DL link training failuresJoe McGill2018-06-141-3/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - p9c DD1.1+ only, DD1.0 not supported - FW to trigger reconfig loop back to step 0 from sys_proc_fab_iovalid if: 1) sys_proc_fab_iovalid rc = FAPI2_RC_SUCCESS -- AND -- 2) new output o_obus_dl_rcs (vector of P9_FAB_IOVALID_DL_NOT_TRAINED_ERR rc objects identifying links which failed on this chip) has entries - attribute changes: ATTR_LINK_TRAIN -- remove platinit tag, attr should init to zero (both even and odd), and reconfig loop will adjust value as we go CMVC-Prereq:1057645 Change-Id: I95eebd2b893db6d2511aae40798c0a4e049835d6 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59022 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59039 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* IO, FBC updates to enable ABUS for FleetwoodJoe McGill2017-11-101-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Attributes: ------------------------------------------------------------------------------- nest_attributes.xml add ATTR_LINK_TRAIN, written by platform on X, O endpoints to specify whether half or full link should be trained add ATTR_PROC_FABRIC_LINK_ACTIVE, written by p9_fbc_eff_config_links adjust enums for ATTR_PROC_FABRIC_[XA]_ATTACHED_CHIP_CNFG, written by p9_fbc_eff_config_links add ATTR_PROC_FABRIC_[XA]_LINKS_CNFG, written by p9_fbc_eff_config_links pervasive_attributes.xml create ATTR_PROC_NPU_REGION_ENABLED to encapsulate accessibility of NPU logic domain, written by p9_chiplet_scominit chip_ec_attributes.xml add EC feature attribute controlling DL training workaround Initfiles: ------------------------------------------------------------------------------- p9.fbc.ab_hp.scom.initfile add logic to permit reset of chg_rate master dials in second phase SMP build adjust link enable expressions to reflect new ATTACHED_CHIP_CNFG enums p9.fbc.cd_hp.scom.initfile p9.fbc.no_hp.scom.initfile consume number of configured X/A links from new attribute, simple addition won't work any longer given new ATTACHED_CHIP_CNFG enums p9.fbc.ioe_dl.scom.initfile support half-link operation, based on ATTR_LINK_TRAIN on X endpoint target p9.fbc.ioe_tl.scom.initifle adjust link enable expressions to reflect new ATTACHED_CHIP_CNFG enums p9.fbc.ioo_dl.scom.initfile support half-link operation, based on ATTR_LINK_TRAIN on O endpoint target qualify OLL enablement based on use as active fabric link adjust PHY training parameters based on current lab learning p9.fbc.ioo_tl.scom.initfile adjust link enable expressions to reflect new ATTACHED_CHIP_CNFG enums support half-link operation, based on ATTACHED_CHIP_CNFG qualify TOD_ENABLE to apply only to O links carrying X traffic p9.npu.scom.initfile clear OPTICAL_IO_CONFIG when not actively using NVLINK, finer-grained updates needed to support mix of O SMP and NVLINK usage HWPs: ------------------------------------------------------------------------------- p9_io_obus_dccal execute only on links actively carrying fabric protocol p9_io_obus_linktrain p9_io_regs encapsulate PHY FIFO reset sequence needed prior to FBC DL training execution p9_chiplet_scominit p9_npu_scominit partial good updates for NPU region p9_fab_iovalid adjust iovalid manipulation/checking, as well as link delay reporting, to support half-link configuration p9_smp_link_layer support half-link configuration via ATTR_PROC_FABRIC_[XA]_ATTACHED_CHIP_CNFG implement OBUS PHY specific workarounds p9_eff_config_links update ATTR_PROC_FABRIC_[XA]_ATTACHED_CHIP_CNFG to support half-link configuration write ATTR_PROC_FABRIC_LINK_ACTIVE on X/O endpoint targets write ATTR_PROC_FABRIC_[XA]_LINKS_CNFG to reflect total number of logically configured links, for initfile consumption Istep wrappers: ------------------------------------------------------------------------------- p9_build_smp_wrap correctly loop over all system targets for second phase SMP build p9_sys_chiplet_scominit_wrap initial release Change-Id: Ic1d87df4d3ff0feca7ac2437fa61b6d2fc4a2d68 CQ: HW419022 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43905 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: DANIEL C. HOWE <dchowe@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46997 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* L3 update -- p9_fab_iovalidJoe McGill2017-06-111-6/+114
| | | | | | | | | | | | | | | | | | | | add infrastructure to collect TL,DL FFDC in the event of a training failure add HW callouts to TL,DL training failure return codes, others callout code Change-Id: I9f5439981bb3972b8e259d7ef2fba2431baaa8fd Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40348 Reviewed-by: Thi N. Tran <thi@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40353 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Update prologs of mirrored files to apache licenseStephen Cprek2016-08-051-8/+14
| | | | | | | | Change-Id: I25a782f6f8af801beb35f541f6076c482b78bf8e Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27920 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Matthew A. Ploetz <maploetz@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* L2 - Fabric updates for multi-chip supportJoe McGill2016-05-131-6/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Refactor p9_build_smp code Add FBC effective config (attribute-only) HWPs Add/call FBC initfiles HWP flow p9_fbc_eff_config p9_fbc_eff_config_links p9_chiplet_scominit p9_smp_link_layer p9_fab_iovalid p9_fbc_eff_config_aggregate p9_build_smp Update engd used in build to e9035 u087 Change-Id: Iff8f22941a01bd6783fd5e817bcb6bc730b846f5 Original-Change-Id: I9ab9e967847d380596e896a14e481ad8cf247b9a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21643 Tested-by: PPE CI Tested-by: Hostboot CI Tested-by: Jenkins Server Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24464 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* L2 HWPs -- p9_smp_link_layer and p9_fab_iovalidJoe McGill2016-04-211-0/+34
Tested on n10_e9031_tp030_soa_mc_u008_01 Rebased on e9034 SCOM address header implementation Change-Id: Id4e3d0432b3198f61622f26a5730be87a7fc4771 Original-Change-Id: Iae352ca9392f3e863c9881c90a8a07969befe727 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22942 Tested-by: Jenkins Server Tested-by: Auto Mirror Tested-by: Hostboot CI Tested-by: PPE CI Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: CHRISTINA L. GRAVES <clgraves@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23224 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
OpenPOWER on IntegriCloud