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path: root/src/import/chips/p9/procedures/hwp
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* p9_pm_pfet_init Level 2Amit Kumar2016-02-192-14/+441
* Fix all incorrect copyright prologsStephen Cprek2016-02-1925-25/+25
* Level 2 p9_pm_set_homer_barAmit Kumar2016-02-192-138/+81
* Add p9_mss_scrub level 1Brian Silver2016-02-193-0/+117
* Change L1 headers to include defines to avoid duplicate inclusionBrian Silver2016-02-1913-24/+373
* p9_update_ec_eq_state.H Level 1Greg Still2016-02-193-0/+148
* p9_pm_pfet_init Level 1Greg Still2016-02-193-0/+192
* Add p9_mss_scominitBrian Silver2016-02-193-0/+115
* p9_pm_set_homer_bar for L1Amit Kumar2016-02-193-0/+326
* JET: Level 1, p9_pm_pba_bar_configSangeetha T S2016-02-193-0/+177
* Change Memory L1 proceduresBrian Silver2016-02-1929-0/+1055
* p9_sbe_check_master_stop15 Level 1Greg Still2016-02-193-0/+139
* Update Copyright in p9_hcode_image_build.mk to comply w/ HB Jenkinscrgeddes2016-02-191-1/+1
* PM: Level 1 p9_hcode_img_buildPrem Shanker Jha2016-02-193-0/+178
* Fix all incorrect copyright prologsStephen Cprek2016-02-193-3/+3
* Shift HWP content to align with desired EKB layoutJoe McGill2016-02-193-0/+230
* Fix all incorrect copyright prologsStephen Cprek2016-02-193-3/+3
* JET: Level 1, p9_pm_pba_initBilicon Patil2016-02-193-0/+378
* Fix all incorrect copyright prologsStephen Cprek2016-02-191-1/+1
* JET: Level 2, Make p9_pm_occ_control FAPI2.0 compilantSangeetha T S2016-02-191-4/+11
* Shift HWP content to align with desired EKB layoutJoe McGill2016-02-191-0/+62
* Fix all incorrect copyright prologsStephen Cprek2016-02-192-2/+1
* p9_block_wakeup_intr Level 1Bilicon Patil2016-02-193-0/+224
* PM: Added make file for special wakeup HWP and fixed prolog.Prem Shanker Jha2016-02-191-0/+20
* Fix all incorrect copyright prologsStephen Cprek2016-02-192-2/+2
* PM: Level 1, p9_cpu_special_wakeup.Prem Shanker Jha2016-02-192-0/+131
* Fix all incorrect copyright prologsStephen Cprek2016-02-1915-15/+15
* HWP for p9_start_cbsAnusha Reddy Rangareddygari2016-02-191-1/+1
* p9_exit_cache_contained procedure (Level 2)Thi Tran2016-02-192-14/+33
* Updates for p9_revert_sbe_mcs_setup, p9_sbe_mcs_setup (Level 2)Joe McGill2016-02-195-58/+429
* p9_chiplet_scominit Level 1Michael Dye2016-02-193-0/+134
* p9_htm_setup procedure (Level 1)Thi Tran2016-02-196-0/+1439
* p9_setup_bars L1 deliveryJoe McGill2016-02-193-0/+162
* p9_psi_scominit procedure (Level 1)Thi Tran2016-02-193-0/+158
* p9_mss_setup_bars procedure (Level 1)Thi Tran2016-02-193-0/+334
* PCIE Level 1 proceduresJoe McGill2016-02-197-76/+162
* FBC Level 1 proceduresJoe McGill2016-02-199-0/+491
* Level 1 HWP for p9_chiplet_enable_ridiAnusha Reddy Rangareddygari2016-02-193-0/+117
* Level 1 HWP for p9_switch_cfsimAnusha Reddy Rangareddygari2016-02-193-0/+117
* Level 1 HWP p9_check_slave_sbe_seeprom_completeAnusha Reddy Rangareddygari2016-02-193-0/+120
* Level 1 HWP for p9_mem_startclocksAnusha Reddy Rangareddygari2016-02-193-0/+117
* Level 1 HWP for p9_switch_rec_attnAnusha Reddy Rangareddygari2016-02-193-0/+117
* Level 1 HWP for p9_mem_pll_setupAnusha Reddy Rangareddygari2016-02-193-0/+117
* Level 1 HWP for p9_mem_pll_initfAnusha Reddy Rangareddygari2016-02-193-0/+121
* Level 1 HWP for p9_mem_skewadjustAnusha Reddy Rangareddygari2016-02-193-0/+117
* Level 1 HWP p9_extract_sbe_rcAnusha Reddy Rangareddygari2016-02-193-0/+117
* p9_throttle_sync procedure (Level 1)Thi Tran2016-02-193-0/+193
* p9_attr_update Level 1Michael Dye2016-02-193-0/+135
* p9_mss_eff_grouping procedure (Level 1)Thi Tran2016-02-193-0/+2670
* p9_npu_scominit Level 1Michael Dye2016-02-193-0/+150
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