| Commit message (Collapse) | Author | Age | Files | Lines |
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Change-Id: I064ce4afc6541eae09c5bafb18997cf49aef1891
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/74938
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/74945
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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Resolve warnings when compiling with gcc 4.8. Compiling HB with GCC 7.3.
Change-Id: Id180af6b174d34009c451a23fc3ec1803fa0130a
RTC: 202716
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/73418
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/73429
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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Commit initializes CME image header field pointing to unsecure HOMER
with address of CPMR region of regular HOMER. This is done only if SMF
is disabled on a machine. This reduces some complexity in CME hcode.
Key_Cronus_Test=PM_REGRESS
Change-Id: If621311a61ac9ff9cc3f76c2c2bc3104a3e32619
CQ: SW458466
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71890
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71907
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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Key_Cronus_Test=PM_REGRESS
CQ:SW458304
Change-Id: Ia854423e663919a192a8fd271f2656d7d7469406
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70365
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70906
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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- Don't clear CACCR[15] (clock sync enable); allow it to be fully managed
by STOP entry/exit in CME Hcode.
Key_Cronus_Test=PM_REGRESS
Change-Id: I92cc74043b8aefd7351ff765083de703675b8a39
CQ: SW453649
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71990
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: RAHUL BATRA <rbatra@us.ibm.com>
Dev-Ready: Michael S. Floyd <mfloyd@us.ibm.com>
Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71991
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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If HWP fails to scom core or cache clock status register, it
appropriately initiatlizes the data structs and attributes to
correctly reflect the hardware state as known at the point of
failure.
Key_Cronus_Test=PM_REGRESS
Change-Id: I585277fcc475f074a5db45b5aa1f1517e0ca2531
CQ: SW455632
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70790
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
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Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70812
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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On an SMF enabled system, if HV engages self save, core must
must transition from HV to UV privilege to accomplish this.
So, before attempting self save, core must execute SC2
instruction with HV privilege inorder to be a UV. Commit is a
partial implementaiton of this solution. It populates a
buffer with SC2 instruction which hostboot will copy to an
unsecure memory.
- Updated attribute tags for MRW Hiding
- Removed writing of ATTR_UNSECURE_HOMER_SIZE in deference
to attribute default checking
Key_Cronus_Test=PM_REGRESS
Change-Id: Idb5e219e2a5f9b2274602aedc420f390f34f2609
RTC: 202400
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69655
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Dev-Ready: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69662
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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This file was deprecated awhile ago, replaced by
p9_check_idle_stop_done.
Change-Id: I62c4e59954ca088fc3193c962a3d417f2270ac8e
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70196
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Key_Cronus_Test=PM_REGRESS
RTC:203531
Change-Id: I900cb1d9a200e24845c349fa651ef40d3eb378a2
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70332
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: RAHUL BATRA <rbatra@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70450
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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- engages new layout if SMF keyword is found in self restore image.
- engages old layout if SMF keyword is not found in self restore
image.
- updates CPMR header indicating, URMOR bug workaround, STOP API
version and self restore version.
Key_Cronus_Test=PM_REGRESS
Change-Id: I293cc2a1d15736e85c6565896ecfa4b00a8feb24
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69512
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69513
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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2nd commit in the series of 3 commits for Workload Optimized
Voltage(WOV)
Commit 1. Adds WOV attributes
Commit 2(Hostboot). WOV HW procedures changes and global parm updates
Commit 3(Hcode). PGPE Hcode changes for WOV(undervolting only) feature
Key_Cronus_Test=PM_REGRESS
HW-Image-Prereq: Iaad4fb8cdff7840ec971f866757492f6e9b2cb87
CMVC-Prereq: 1073981
Change-Id: I07f716f5d12809b8c6efdf76bf545e467cf839d8
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69464
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69481
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: Id648c9301d411446ec37c886f3295e50b66f38cd
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69735
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69742
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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Commit fixes some issues with code found during integration test
- replacement of addi with xor instruction during self save API.
- fixing instruction generation for MFMSR during self save
- data struct updates in STOP API
- error RC updates for hcode image build
- HOMER parser updates.
- removed self save support for URMOR and HRMOR
- code changes for compilation with OPAL
- populating CME Image header with unsecure HOMER address.
Key_Cronus_Test=PM_REGRESS
Change-Id: I7cedcc466267c4245255d8d75c01ed695e316720
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66580
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: RAHUL BATRA <rbatra@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66587
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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4th commit in series of 4 commits which combined moves SGPE/PGPE
SRAM regions, and also allows to do so easily in future.
Commit 1(Hcode): Adds fields to OCC Complex Shared SRAM for storing SGPE
and PGPE region addresses/size, image header and debug header.
Commit 2(Hostboot): Moves around SGPE/PGPE regions, and adds fields
to QPMR/PPMR for storing SGPE/PGPE region info
Commit 3(Hcode): Populates the newly added SGPE/PGPE region info
fields in QPMR/PPMR
Commit 4(Hostboot): Adds check for QPMR and PPMR fields in the Hostboot Code
Key_Cronus_Test=PM_REGRESS
HW-Image-Coreq: yes
HW-Image-Prereq: Id9493ba0843c26975e1b72e558501df7140fa10c
Change-Id: Ifa4a4acf9a202da7a0357747d57d5f26613bc3cd
CQ: SW447651
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67223
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67364
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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HWP reads a quad and core level registers to determine clock
status for cache and core respectively. If this SCOM fails, HWP
returns a generic non success RC but it doesn't initialize the
attributes appropriately. As a result, caller doesn't get an
idea on extent of availability of core and cache for operation
like SCOM or Scan. Commit addresses it by handling the RC and
initializing the attribute appropraitely.
Key_Cronus_Test=PM_REGRESS
Change-Id: Ib5e46ad11e2cf817f72a4fec20815dbca354ac51
CQ: SW449148
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68033
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68038
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Commit fixes the handling of CME LFIR mask. In istep 21.1, HB does
a PM complex reset. During this operation, CME LFIR mask is saved
in an attribute and all errors are masked. When HBRT takes over,
it starts by doing a complex reset once again. This back to back
reset without an init in between causes CME LFIR Mask to get lost.
Commit addresses the issue by simply avoiding the saving of FIR
mask during the first reset initiated by HBRT.
Key_Cronus_Test=PM_REGRESS
Change-Id: I55c289b76fc5b3416bca792fc9e1fbf8dba2309e
CQ: SW448193
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67835
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67841
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Making the CME FIR path follow the same logic as the other PM
FIRs with regards to doing save/restore of the masks.
Also added an enumeration for the attribute that controls things
to make the code easier to read.
Change-Id: I2f9eabec4cb036ec9f79da07143f18fe18ee5747
CQ: SW448193
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67668
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
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Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67787
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
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Commit conditionnally creates a new self restore region
memory layout. It also adds support for self save of SPR.
HWP detects the version of self restore code loaded and
based on that it retains legacy self restore layout or
the new layout.
Key_Cronus_Test=PM_REGRESS
Change-Id: I0a9723870e63b1dd70c8163cc6a13c35d9cb78ca
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66218
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Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66221
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Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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Change-Id: I436a4bc50773c3980c8eb6a77bef6e3a0cd2e6ae
CQ:SW449479
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67899
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Reviewed-by: RAHUL BATRA <rbatra@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67903
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This reverts commit 52b76be222254e59959db984606c09dae854270b.
Accidental merge before ekb was complete.
Change-Id: I59412ecad661596322aaba5cb5cf83190727d64f
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67455
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Gerrit intent:
- Applicable for P9 merge (co-req NOT required)
- Co-req not req'd for any tests
Includes the following changes:
- Accommodates initCompiler's needs for additional ring Id APIs to
retrieve IS's key ring identifiers, ringId and ringClass, and to
align with our enumerated chipId
- Elimination of redundancy in and reorg of IS's ring Id lists:
RingProperties, GenRingIdList (gone) and ChipletData.
- GenRingIdList has been removed.
- Expand RingProperties to also include scanScomAddr and ringClass.
- Member of ring and chiplet properties structs have been renamed in
consistent camel style (no longer using "iv_" anywhere).
- Note that with "infrastructure (IS)" we here mean the core infrastructure
codes that directly interact with and affect the image.
Key_Cronus_Test=XIP_REGRESS
Change-Id: I7e92af04edd10c0994718e476f6e7b77c5d124d6
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/59087
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Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Commit addresses some parsing issues in following data section
- XIRs of CMEs, SGPE, PGPE
- CPMM and QPPM section
- Fixed the address issue
Change-Id: I8fd7fa1cf76f465bcc40f87824f17b6a8c03bbc6
CQ: SW444956
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/65482
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Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/65815
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Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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Key_Cronus_Test=PM_REGRESS
Change-Id: I71aac7f826b0daa594de5f4db7a45ccd693f964f
CQ:SW444760
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66511
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- Updated the same HCODE changes in update_ec_eq HWP
Key_Cronus_Test=PM_REGRESS
Change-Id: I22f8b746f118ceeafac1b0c36b4b57cc59bbec3c
CQ: SW443614
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66113
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Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
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Key_Cronus_Test=PM_REGRESS
Change-Id: I1242909d0bc93bc9889adcd45f758225c92d4061
CQ: SW444953
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66465
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This helps to narrow down the source of potentially bad VPD
contents since the data could be unique per EQ.
Change-Id: I84b496166968b296f6a6a880a437ab5c2ce5c130
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/55174
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Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/56224
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Change-Id: Iaabd787166422b68179901b7785ab3e8a54d35b8
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/65875
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Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
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HW-Image-Coreq: yes
HW-Image-Prereq: Ia9ae0d284398af375f1562efff152a6a12a6eb9a
Change-Id: I1f7ca865640dfc0a08aef783fd3595d2f249a672
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/58843
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There are scenarios where pm_reset can be called without a valid
HOMER image. This change prevents the code from trying to access
the invalid memory.
Change-Id: Ifb13c98d668e83ba111d246e501cb281687f33a9
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66016
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commit checks obus chiplet configuration to determine if it is
configured in SMP mode. If so, it uses OBUS position to
populate bit position meant for Abus in UAV.
CQ: SW444776
Change-Id: I5629fef6227596b111f858a3de21ae0318b1e3cd
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Key_Cronus_Test=PM_REGRESS
Change-Id: Ie600b0f86d60b8e9f83388b4e1c2b48918352c16
CQ:SW444459
CMVC-Prereq: 1067130
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/65662
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Commit fixes an incorrect usage of proc target with register
C_CPPM_CPMMR. It now uses core target.
Change-Id: Ib975a189462cb547db9be03eea7cac8625e30f0f
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/65560
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- Enabled EX check. even if it's EQ is functional
- one more check of clock power off which is
required for mpipl case.
- had one bug during l2/l3 stop clock which fixes status bit update.
Actually clock was stopped but the status bit was not set
in EQ_CLOCK_STAT register.
Key_Cronus_Test=PM_REGRESS
Change-Id: I7e8dbea00235ade5a692198dde7c2e6758809b9f
CQ:SW443537
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Key_Cronus_Test=PM_REGRESS
Change-Id: Ia284c5e4127eae4616d0f6d5ede1a794f4dc7712
CQ:SW442778
CMVC-Prereq: 1065287
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Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64736
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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This reverts commit a38eb773aaffacb489a0b5997ec02b6e1e41f6aa.
Change-Id: If501d1bb665efcbed4898e79706bc742845f4b27
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64673
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Change-Id: Ica3f2180de29856e680057273a11dd4bbab64392
CQ:SW436490
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Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64056
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Commit is an actual implementation of HWP which initializes
runtime wakeup mode of an SMF enabled core.
Change-Id: Id7ba7cace4178805131683e33bc660eede6ff935
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64184
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/65455
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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Commit initializes CPMMR[59] with 1 if SMF is not enabled otherwise
with 0. This bit is read by CME in STOP 4/5 exit path. Based on the
bit value, sets the runtime wakeup mode for core in thread scratch
register.
Change-Id: If339c62e2e2bb504b5bf8e6b5e864d6ca6b4dc75
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64119
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64234
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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Commit increases max eq scom restore entries supported from 63
to 255. It updates a field in QPMR header which is read by STOP API
and SGPE Hcode. This enables a flexible way to change SCOM
restore entries.
Key_Cronus_Test=PM_REGRESS
HW-Image-Prereq: Ie13a5110384e4161615167b238aecd4e2e0b9902
Change-Id: I036691f2fa152b1f0597e133b37b1795837d6e45
CQ: SW435708
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/62222
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/62242
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Commit implements a parser for parsing user data sections added
by PRDF in an error log committed in case of PM Malfunction
alert.
Key_Cronus_Test=PM_REGRESS
Change-Id: Ie8e5ba36fd62eef7821efbb744e6ecd5e098a3b5
CQ: SW440369
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/57969
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/58191
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I10729ec856bcd3167c1cdb53acc14f918a5f90ab
CQ:SW439095
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/63271
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: YUE DU <daviddu@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/63275
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Commit updates STOP recovery HWP to be able to support error log
parsing. STOP recovery HWP incorporates an idea of section id for
various sub-sections of STOP recovery summary section. In case of
PM Malfunction, p9_pm_callout adds those sub-section to an error
log in form of user data sub-section.
Key_Cronus_Test=PM_REGRESS
Change-Id: I3210921fd64d27b58c6ee6319da6d9090e61f5e0
CQ: SW438713
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/57967
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/57979
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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- Auto Spl wkup fix in malf path (leave hyp marked bad cores alone)
- Move Malf Handling (OCC FLG2 [29]) enable from sgpe init to later in PM Init
- Enable PM callout tracing (debug only)
- FAPI_ASSERT_NOEXIT UE to Recoverable fix (avoid unwanted err logs)
- OCC Spl wkup fix (fix bad target usage)
- Fix ffdc reg address not being added to ffdc region
Change-Id: I1771e178c12bcc6a9ab03ac48c7ad01cafa68ca7
CQ: SW438835
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/63324
Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/63331
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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- As the PBA is recovered through PM complex resets and bad data is dealt
with in the OCC complex, moving these to the same settings as was implemented
in P8.
- Found in cable pull testing where unexpected checkstops occured.
- Added setting of full default mask in the init phase for building the real
mask. This is necessary for the case that the init phase is run before the
reset phase.
Change-Id: I9891ae333a5cb2024aa88f031d8c496091e57bed
CQ: SW438231
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/62744
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/62759
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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Change-Id: I6a0244878de5e8cc63e18453afcdd15bc3d8a835
CQ:SW438614
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/62750
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/62835
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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Change-Id: I66943612e85c59590d7cdf4270c9f4a27f7481eb
CQ:SW435482
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/61718
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/61722
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Disable-CI: Christian R. Geddes <crgeddes@us.ibm.com>
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- Skip deassert special wakeup in PM Init when in PM Malf path
- Attribute changes to default HB to disable MALF and PM FFDC enablement on IPL
- Attribute to track Malf Flow across PM Reset and Init
- Do not fail PM reset in Malf Flow, if auto special wakeup could not be set
Change-Id: I5c730c818bbf886b8db7fc497cfb62c7a6c9c7f0
CQ: SW437841
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/62528
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/62543
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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CQ: SW437571
Change-Id: I9101adc63225a97aeddf445519fa660d961c3d9c
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/61463
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/61472
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Reseting the engines potentially causes another to send the PM Malf
Alert to PHYP. Disable in PM Reset and let SGPE re-enable in PM Init.
Added a similar safe check and disable in MPIPL path for pm_suspend
Change-Id: If9fd572d156a8f280b0fd204175e5ccf0969b249
CQ: SW436905
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/62135
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/62154
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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p9_mss_eff_grouping.C:
- determines whether secure mem is requested, reserves smf space
- always reserve smf at end of range because of end-of-range bit
- set addr15 when reporting smf base address
- mask off group_id(0) via chip address extension if smf is enabled
- updated to set value of attr_smf_enabled
- enhanced error reporting with smf config/supported values
- made values reported to attr_mss_mcs_group_32 more clear
p9_mss_setup_bars.C:
- set MCFGPA/MCFGPMA registers with SMF data
- fixed scom registers for MCFGPA/MCFGPMA hole setup
- added note to leave MCFIR_invalid_smf masked for HW451708/HW451711
- added assert to check for HOLE1 and SMF enable overlaps
p9_query_mssinfo.C:
- updated to print out SMF reservations
- print out HTM/OCC/SMF reservations regardless of mirroring enable
p9_fbc_utils.C:
- prevent group_id(0)=1 from affecting mappable memory ranges
p9_sbe_fabricinit.C:
- mask off group_id(0) via chip address extension if smf is enabled
p9_setup_sbe_config.C, p9_sbe_attr_setup.C:
- use scratch_reg6 bit(16) to pass smf_config value
initfiles:
- removed setup to use other addr bits as secure bit; core only uses addr15
- added setup for ncu addr15 value in hcode
- always set addr15 config bit in bridge unit if smf is supported
- set addr15 bit across all mcs if smf is enabled
- added in settings to enable smf in nmmu unit
- hardcode group_id(0) bit in chipext mask for bridge unit if smf is supported
attributes:
- ATTR_SMF_ENABLE is a system level attribute
- changed SMF_ENABLE->SMF_CONFIG; smf_enabled will be (config && supported)
CQ:HW451708
CQ:HW451711
Change-Id: I6cf85600354baa322e959c922f596ecc5c68a458
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57322
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Dev-Ready: Brent Wieman <bwieman@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57348
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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