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* Add slbv, slbe extraction to p9_ram_core procedureJenny Huynh2019-08-261-2/+4
| | | | | | | | | | | | | | | Change-Id: I6efe5d4f8fbb9f893a2371acd108d9d1d3002ecd Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/82496 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Matt K Light <mklight@us.ibm.com> Reviewed-by: Thi N Tran <thi@us.ibm.com> Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/82504 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R Geddes <crgeddes@us.ibm.com>
* p9_spr_name_map -- change mnemonic for SPR 511 to SMFCTRLJoe McGill2018-05-191-2/+2
| | | | | | | | | | | | | | | | Change-Id: Ib279b63e91db8d648e8d57585f804460c8aca7ec Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55265 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: James N. Klazynski <jklazyns@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55375 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* L3 Update - p9_ram_core HWPsThi Tran2017-08-071-2/+2
| | | | | | | | | | | | | | | | | | Change-Id: I8ac3796714ed1e8a02017cd6321bebcf2270ad54 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43454 Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Yang Fan Liu <shliuyf@cn.ibm.com> Reviewed-by: James N. Klazynski <jklazyns@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43456 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* p9_spr_name_map.H -- update clocks-off spy definition for LPIDRJoe McGill2017-07-111-1/+1
| | | | | | | | | | | | | | | | | | use Tx_LPIDR instead of Tx_LPIDR_MASTER to determine architected state with clocks-off Change-Id: I28afbc88bc561c10e9e08f5862261d823834bf75 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42779 Reviewed-by: James N. Klazynski <jklazyns@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Yang Fan Liu <shliuyf@cn.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42783 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
* Fix DEC/HDEC bit length.LiuYangFan2017-05-311-3/+3
| | | | | | | | | | | | | | | Change-Id: I6a2c3a52f8210c28846fd66c7c0a20b094750834 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40889 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40890 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Update p9_clkoff_getreg/p9_ram_core proceduresLiuYangFan2016-12-051-5/+5
| | | | | | | | | | | | | | | | | | | | 1.update p9_clkoff_getreg FPSCR FEX/VX bit calc 2.fix p9_clkoff_getreg using ptid/vtid for getspy 3.update p9_clkoff_getreg special cases DSCR/PIR 4.fix p9_spr_name_map for some SPR share type 5.fix p9_ram_core put FPSCR issue Change-Id: I54c13977898ac60c20fbf7a1ee3c15787466c776 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32604 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32690 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add get XFVC in p9_clkoff_getreg and fix some issues in ramming procedureLiuYangFan2016-11-151-1/+2
| | | | | | | | | | | | | | Change-Id: I433c003fd30c6414b6d8dd569683ba21c310ff65 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32286 Reviewed-by: Peng Fei Gou <shgoupf@cn.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32288 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fix SPRC spy nameLiuYangFan2016-11-061-1/+1
| | | | | | | | | | | | | | Change-Id: I360d6d34a73545cfca62b7b804ec0abe7b347073 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32178 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: James N. Klazynski <jklazyns@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32180 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fix PIR read/write flag in SPR map.LiuYangFan2016-08-241-1/+1
| | | | | | | | | | | | | | Change-Id: Ia3dc18cfc479a5aa9eb7729b16b0c9f00df35ed9 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28581 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Peng Fei Gou <shgoupf@cn.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28582 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fix special case registers to be per-thread. Remove RMOR.Nick Klazynski2016-08-241-5/+4
| | | | | | | | | | | | | | Change-Id: Id21a45187354671e26e1aafba288e7a62e2ac619 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28492 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Yang Fan Liu <shliuyf@cn.ibm.com> Dev-Ready: Brent Wieman <bwieman@us.ibm.com> Reviewed-by: Brent Wieman <bwieman@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28495 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fix spr map compile issue on X86/AIX.LiuYangFan2016-08-191-0/+2
| | | | | | | | | | | | | | Change-Id: I5b6837d88e48a8f421057eb00c6d8b6ccf7b1a78 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25145 Tested-by: Jenkins Server Reviewed-by: RAJESWARAN THILLAIGOVINDAN <rajeswgo@in.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28494 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Yang Fan Liu <shliuyf@cn.ibm.com> Reviewed-by: Stephen M. Cprek <smcprek@us.ibm.com>
* Update prologs of mirrored files to apache licenseStephen Cprek2016-08-051-8/+14
| | | | | | | | Change-Id: I25a782f6f8af801beb35f541f6076c482b78bf8e Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27920 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Matthew A. Ploetz <maploetz@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Update RAM procedures.LiuYangFan2016-08-011-155/+206
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Changes included: p9_ram_core: 1. Add special case support for get/put NIA/MSR/CR/FPSCR 2. Add thread stop state check in setup 3. Add error handling when ram_setup/get_reg/put_reg p9_ram_get_all_reg/p9_ram_put_all_reg: Add get/put all registers function for test p9_ram_spr_test: New file to test SPR, verify with SPY read, for Cronus use p9_ram_after_checkstop: New file to test ram after checkstop p9_ram_addr_error_test: New file to test ram after bad address access p9_ram_wrap: Update to support the new tests Change-Id: Ia4da55eae26e9f3a667446bc984b358c064fdd8a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22746 Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server Reviewed-by: Thi N. Tran <thi@us.ibm.com> Tested-by: PPE CI Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27696 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* L2 RAM procedures.LiuYangFan2016-08-011-0/+249
Changes included: 1. p9_ram_core: the class for base ramming operations (would reside in SBE) 2. p9_spr_name_map: the functions to map SPR name to SPR number (for Cronus use) 3. p9_ram_opcode: the procedure to implement ram an opcode 4. p9_ram_getspr: the procedure to implement get SPR value 5. p9_ram_putspr: the procedure to implement put SPR value 6. p9_ram_getreg: the procedure to implement get GPR/FPR/VSR value 7. p9_ram_putreg: the procedure to implement put GPR/FPR/VSR value 8. p9_ram_wrap: the eCMD wrapper to test the procedures Change-Id: I34192e0527a61a48b9c1e69036a3411a1e3d9f6d Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21933 Tested-by: Jenkins Server Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27571 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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