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path: root/src/import/chips/p9/procedures/hwp/nest
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* Set TRAIN_TIME to 0 for simulation.Ben Gass2018-05-172-2/+2
* update HWP level metadata for nest, common filesJoe McGill2018-05-031-2/+3
* Initfile updates for FBC DD2dchowe2018-05-031-1/+2
* Build p9n 10 and 20 by default.Ben Gass2018-05-031-1/+1
* L2 - Fabric updates for multi-chip supportJoe McGill2018-05-031-0/+88
* Removing p9_sys_chiplet_scominit.C to fix mirror issueDan Crowell2018-05-031-130/+0
* Revert changes to EFF_FBC_GRP_CHIP_IDS modespashabk-in2018-04-231-6/+4
* Consume PROC_MEM_TO_USE for alt memory configspashabk-in2018-04-212-22/+21
* Discovered a bug in how the IOVALIDs are set up for PEC2.Ricardo Mata2018-04-161-0/+1
* FIR updates to match XML changes in 56335Joe McGill2018-04-161-4/+4
* Updated pcie_scominit and pcie_config to manage systems not using PEC STACK0.Ricardo Mata2018-04-112-2/+69
* Solution for proc_tod_setup during MPIPL.manichow2018-04-051-1/+16
* Pass SBE Security Backdoor Bit to HB BootloaderIlya Smirnov2018-04-041-2/+4
* configure Cumulus MC inband logic to pass host/occ bit under BARJoe McGill2018-04-031-3/+3
* update HWP level metadata for nest, common filesJoe McGill2018-03-301-4/+5
* L2 - Fabric updates for multi-chip supportJoe McGill2018-03-302-0/+95
* Do not apply HW414958 to AxoneThi Tran2018-03-261-1/+9
* Fix MFG P9 ZZ: BC70E540 (MCFIR[8]) command list timeoutThi Tran2018-03-161-1/+7
* dd1.1+ DL training procedure updatesDaniel Howe2018-03-162-2/+6
* enforce strict 512 GB per socket limit on Witherspoon memory map (part2)Joe McGill2018-03-072-3/+6
* p9_tod_move_tod_to_tb -- correct TOD state checksJoe McGill2018-02-241-11/+18
* enforce strict 512 GB per socket limit on Witherspoon memory mapJoe McGill2018-02-162-4/+13
* Fix HWSV duplicate enum build errorsThi Tran2018-02-073-30/+41
* p9_build_smp -- use ADU chipops to switch fabric configuration part #2Joe McGill2018-02-044-318/+144
* Cumulus MSS FIR updatesJoe McGill2018-02-031-0/+13
* Reconcile epsilon w/ latest FBC latency documentDaniel Howe2018-01-291-8/+8
* shift XBUS FIR programming inits for secure bootJoe McGill2018-01-265-91/+281
* p9_setup_bars -- precisely configure MCD available group vectorJoe McGill2018-01-261-2/+7
* Extend xbus oc expiration timers and updated epsilon for fleetwoodDaniel Howe2018-01-241-5/+5
* p9_xbus_fir_utils.H -- create header for definition of XBUS related FIR settingsJoe McGill2018-01-241-0/+97
* RNG DD2 Hostboot: Sim data showed needed parm update so ST fail at 50% entropyChristopher D Hanudel2018-01-241-20/+24
* p9_pcie_config -- MCD disable updatesJoe McGill2018-01-241-5/+10
* Changes for TOD support in MPIPL.manichow2018-01-181-32/+90
* fix ADU setup for MCD disabled operationJoe McGill2018-01-161-2/+2
* p9_build_smp -- use ADU chipops to switch fabric configuration part #1Thi Tran2018-01-154-21/+124
* p9_fab_iovalid -- secure ABUS mailboxes after iovalid is assertedJoe McGill2018-01-131-0/+20
* Shorten A-link timers for sim. Add polling for A-link training.Ben Gass2018-01-131-16/+33
* Mirror (new) p9_putmemproc HWP filesThi Tran2018-01-083-0/+362
* checkstop on MCD UE when extended addressing mode is enabledJoe McGill2017-12-221-0/+26
* MCD disable workaround for HW423589 (option1)Joe McGill2017-12-223-10/+35
* p9_mss_eff_grouping -- fix multi-group mirrored mapping bug introduced by 49290Joe McGill2017-12-141-1/+16
* update pb data x on token ring init procedureDaniel Howe2017-12-141-18/+48
* p9_mss_eff_grouping -- fix mirrored memory mapping bug introduced by 49290Joe McGill2017-12-122-4/+9
* Chip address extension workaround for HW423589 (option2), part2Joe McGill2017-12-103-266/+706
* Chip address extension workaround for HW423589 (option2), part1Joe McGill2017-12-107-30/+213
* Add option to Mask off SBE bits on TP_LOCAL_FIRChristian Geddes2017-12-102-3/+33
* remove NV iovalid assertion from FW and add scan inits to resolve glsmux xstateJoe McGill2017-11-281-88/+0
* Added CI throttling support, HW init updates, and fixed a bug with tce arb.Ricardo Mata2017-11-212-3/+30
* update owner comments in ADU, PBA, TOD HWPsJoe McGill2017-11-165-6/+6
* PBA Level 3 code, changed owner to Josh, and added commentsCHRISTINA L. GRAVES2017-11-161-2/+2
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