summaryrefslogtreecommitdiffstats
path: root/src/import/chips/p9/procedures/hwp/memory
Commit message (Expand)AuthorAgeFilesLines
* Add initial L2 mss_freq_system procedure.Andre Marin2016-06-101-1/+37
* Change code owner/backup names to latest team membersBrian Silver2016-06-0914-14/+14
* Add MC periodicsBrian Silver2016-06-091-0/+285
* Update p9_mss_attr_update to L2Brian Silver2016-06-031-1/+1
* Fix mss_volt wrapper and volt FFDCAndre Marin2016-06-031-5/+10
* Add memdiags implementation for superfast operationsBrian Silver2016-06-0317-199/+2563
* Add MC periodicsBrian Silver2016-06-031-0/+483
* Add MC periodicsBrian Silver2016-06-017-287/+20
* Translate logical mca regisers in mcs chiplet as mca target typeBen Gass2016-06-013-55/+5
* Remove curly brackets for VECTOR_TO_1D_ARRAY macrosMatt Derksen2016-05-201-9/+4
* Add eff_config functionality needed for RIT, fix cas_latency bug & attr filesAndre Marin2016-05-201-73/+73
* Fix throttle procedure & MSS attribute clean upAndre Marin2016-05-201-15/+49
* Modify spd decoder API to hold its own SPD data, fix dependiciesAndre Marin2016-05-201-9/+21
* Modify freq & dep. files. Add cas latency & unit testsAndre Marin2016-05-201-0/+258
* Add eff_config functionality needed for RIT, fix cas_latency bug & attr filesAndre Marin2016-05-1918-1948/+3758
* Fix MSS attribute file for cas latency type. Added dependencies.Andre Marin2016-05-191-20/+24
* Add option to make c_str_storage not thread_localcrgeddes2016-05-182-2/+13
* Update rank.C to initialize l_ranks to 0 for ranks() functioncrgeddes2016-05-181-1/+1
* Add mss throttle files L1Andre Marin2016-05-132-15/+17
* Change init cal error checking as apb fir register changedBrian Silver2016-05-122-44/+6
* Change MCA initfile to encorporate VBU initsBrian Silver2016-05-121-2/+2
* Fix throttle procedure & MSS attribute clean upAndre Marin2016-05-1210-7511/+1808
* Add get_pair_from_rankBrian Silver2016-05-122-17/+136
* Modify mss_volt. Add eff_config/attr_settersJacob Harvey2016-05-112-0/+112
* Fix throttle procedure & MSS attribute clean upAndre Marin2016-05-112-20/+23
* Modify spd decoder API to hold its own SPD data, fix dependiciesAndre Marin2016-05-112-14/+13
* Modify freq & dep. files. Add cas latency & unit testsAndre Marin2016-05-113-0/+915
* Fix p9_mss_scrub (sim only) for 4 port configsBrian Silver2016-05-061-22/+18
* p9_mss_draminit_mc -- run with no_inversion in simJoe McGill2016-05-041-1/+4
* Update PDA_ENABLE_OVERRIDE programming for DDRPHY_PC_CONFIG0Joe McGill2016-05-041-1/+2
* Change PHY PC, RC and DP16 register blocks to functional APIBrian Silver2016-05-048-615/+625
* Change PHY APB register block to functional APIBrian Silver2016-05-043-219/+222
* Modify mss_volt. Add eff_config/attr_settersJacob Harvey2016-05-043-16/+90
* Fix CCS program port assignment for western MCBrian Silver2016-05-041-2/+2
* Add 8Gb DRAM supportBrian Silver2016-05-032-15/+22
* Change c_str to remove prototype template mechanismBrian Silver2016-05-033-169/+29
* Add L2 p9_mss_scrubBrian Silver2016-04-258-2251/+208
* Modify spd decoder API to hold its own SPD data, fix dependiciesAndre Marin2016-04-225-1387/+1118
* Modify freq & dep. files. Add cas latency & unit testsAndre Marin2016-04-227-446/+398
* Update attribute accessor description processingBrian Silver2016-04-221-3588/+1950
* Change include paths in memory/lib, testsBrian Silver2016-04-221-1950/+3588
* Add relative position functionsBrian Silver2016-04-227-44/+104
* updates for memory integrationJoe McGill2016-04-222-3/+32
* Add count_dimmBrian Silver2016-04-211-0/+56
* Change include paths in memory/lib, testsBrian Silver2016-04-2134-109/+119
* Add relative position functionsBrian Silver2016-04-212-28/+29
* Change attribute accessor description processingBrian Silver2016-04-211-3588/+1950
* Change mss_attribute_accessors.H processing to checkin after generationBrian Silver2016-04-211-0/+37465
* Change PHY WC register block to functional APIBrian Silver2016-04-211-283/+316
* Change draminit_mc to run ECC mode not compare modeBrian Silver2016-04-211-6/+2
OpenPOWER on IntegriCloud