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path: root/src/import/chips/p9/procedures/hwp/memory/lib
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* L3 support for ddr_phy_reset, termination_controlJacob Harvey2017-07-1936-248/+298
* Clean up memdiags ffdc namingJacob Harvey2017-07-174-19/+19
* HW414700 checkstop on UEs and disable core ECC counterLuke C. Murray2017-07-141-0/+11
* L3 mss_memdiagsJacob Harvey2017-07-1227-114/+257
* mc_pll_bucket attributeAnusha Reddy Rangareddygari2017-07-111-0/+20
* dcc skew adjust procedure updateAnusha Reddy Rangareddygari2017-07-111-0/+42
* Add in RCD attributes for DD2 debugJacob Harvey2017-07-113-5/+375
* Fixes parallel CAC shmoo bugStephen Glancy2017-07-062-2/+2
* Set HB to ignore draminit_training failsJacob Harvey2017-06-301-0/+1
* Adds workaround for training timeoutStephen Glancy2017-06-281-1/+2
* Turn off A17 if not neededJacob Harvey2017-06-255-13/+132
* Fix draminit_training wrapper and functionJacob Harvey2017-06-252-27/+60
* Fixes DD2 training bugStephen Glancy2017-06-233-28/+131
* Update continue_cmd API to not change conditions w/default paramsAndre Marin2017-06-223-9/+15
* Fix CSID: 2 slave ranks, termination in RCBCXJacob Harvey2017-06-222-37/+131
* add support for OBUS PLL bucketsJoe McGill2017-06-221-4/+4
* Adds empty workaround draminit files for HBStephen Glancy2017-06-212-0/+48
* Remove logErrors in plug_rulesJacob Harvey2017-06-201-46/+16
* Fixed DLL workarounds to always runStephen Glancy2017-06-202-37/+2
* Fix mss::c_str error in utils_to_throttleJacob Harvey2017-06-202-11/+7
* Fixes RCW timing in draminitStephen Glancy2017-06-202-6/+29
* Fixes bug where WR VREF would never be runStephen Glancy2017-06-192-4/+5
* Fix memory plug rules and error handlingJacob Harvey2017-06-192-106/+201
* Modify DRAM_LPASR to be set based on MRW REFRESH_RATE_REQUEST attrAndre Marin2017-06-151-3/+22
* Add init of blue waterfall range to phy_scominitLouis Stermole2017-06-153-0/+61
* Adds DCD workarounds for bad hardwareStephen Glancy2017-06-153-6/+98
* Fix tREFI calculation to use MRW REFRESH REQUEST RATE as opposed to TEMP RANGEAndre Marin2017-06-145-36/+55
* Disable mem clk stop when in STR for DD2.* onlyAndre Marin2017-06-142-1/+28
* Double POR timings (tMOD, tMRD, and tZQ) for more margin per labAndre Marin2017-06-142-9/+17
* Fixes DQS align workaround formattingStephen Glancy2017-06-133-3/+2
* Cleaning up error handling for mss_freq L3Jacob Harvey2017-06-117-296/+349
* L3 RAS for draminit_training, eff_config, libJacob Harvey2017-06-1110-117/+138
* Increased minimum polling time for memory cal stepsLouis Stermole2017-06-111-2/+6
* Clear out bogus EVENT_N in scominitAndre Marin2017-06-111-0/+1
* Adds DD2 dcd functionalityStephen Glancy2017-06-115-409/+821
* Add CE Fix and unit testsMatthew Hickman2017-06-071-51/+50
* Added register reset functionality for DD2Stephen Glancy2017-06-079-63/+446
* Add PHY DP16 DRIFT_LIMITS regs and DD2_BLUE_WATERFALL_EXT field APILouis Stermole2017-06-072-0/+193
* Turn off PHY refresh for RD_CNTR - RD_VREFJacob Harvey2017-06-074-14/+82
* Fixed CSID value for DD2Stephen Glancy2017-06-071-1/+5
* Change power controll settings for PD/STRJacob Harvey2017-06-051-4/+5
* Update behavioral description of ATTR_SECURITY_MODE attributeNick Bofferding2017-05-311-3/+8
* Adds DCD empty files for DD2 codeStephen Glancy2017-05-312-0/+48
* Updated RD_VREF for DD2Stephen Glancy2017-05-253-24/+84
* Remove ZQCAL redundant CCS inst, move to draminit_trainingAndre Marin2017-05-2515-183/+361
* Updated memory DD1 vs DD2 attributeStephen Glancy2017-05-241-3/+3
* Change cas latency to be per MCAJacob Harvey2017-05-246-116/+113
* Clear DLL CNTL ERROR and FIR bits for workaroundJacob Harvey2017-05-243-2/+49
* p9_cen_ref_clk_enable -- p9 initial versionPeng Fei GOU2017-05-221-21/+0
* Fix seg fault on DQS alignment workaround faultJacob Harvey2017-05-221-2/+1
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