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path: root/src/import/chips/p9/procedures/hwp/memory/lib/workarounds
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* Adds read wr_vref function to support P9 NVDIMM post restoreTsung Yeung2018-02-182-80/+15
* Add empty MSS freq_workarounds.C/H for hostbootLouis Stermole2018-02-082-0/+48
* Added workaround for broadcast mode UE noise windowMatthew Hickman2018-02-072-2/+57
* Adds ccs workaround to support SRE/SRXTsung Yeung2018-01-241-0/+56
* Updates training advanced and adds custom WR CTRStephen Glancy2018-01-131-3/+3
* Fixes WR LVL terminationsStephen Glancy2018-01-132-5/+272
* Updates WR VREF for characterization resultsStephen Glancy2018-01-132-14/+884
* Adds PDA supportStephen Glancy2017-12-222-0/+179
* Adds in blank files for CCS workaroundsStephen Glancy2017-12-222-0/+48
* Add Vreg==1 trigger to DLL workaroundLouis Stermole2017-11-272-15/+120
* Updates dramint training structureStephen Glancy2017-11-1012-23/+23
* Set blue waterfall range to 1-4 for all freqsJacob Harvey2017-11-021-0/+18
* Fixes broadcast mode memdiags crashStephen Glancy2017-11-011-0/+1
* Update HPW Level for MSS API libraryAndre Marin2017-11-0113-24/+24
* Updates error paths for PRD FIR checkingStephen Glancy2017-10-021-3/+15
* Increment red_waterfall for low vdn fixJacob Harvey2017-09-262-0/+146
* Adds in workaround for self-time refreshStephen Glancy2017-09-182-0/+192
* Adds MCA workaround blank files for HBStephen Glancy2017-09-072-0/+48
* L3 draminit and mss_libJacob Harvey2017-07-262-2/+2
* Remove reset_dll from scominit, enable delay line tap pointsAndre Marin2017-07-251-50/+0
* L3 support for ddr_phy_reset, termination_controlJacob Harvey2017-07-192-2/+2
* Fixes DD2 training bugStephen Glancy2017-06-232-0/+95
* Adds empty workaround draminit files for HBStephen Glancy2017-06-212-0/+48
* Adds DCD workarounds for bad hardwareStephen Glancy2017-06-152-2/+61
* Fixes DQS align workaround formattingStephen Glancy2017-06-132-2/+1
* Adds DD2 dcd functionalityStephen Glancy2017-06-112-393/+6
* Turn off PHY refresh for RD_CNTR - RD_VREFJacob Harvey2017-06-072-4/+62
* Updated RD_VREF for DD2Stephen Glancy2017-05-251-7/+7
* Remove ZQCAL redundant CCS inst, move to draminit_trainingAndre Marin2017-05-254-8/+8
* Clear DLL CNTL ERROR and FIR bits for workaroundJacob Harvey2017-05-242-2/+48
* Fix seg fault on DQS alignment workaround faultJacob Harvey2017-05-221-2/+1
* Adds DCD calibration control attributesStephen Glancy2017-05-221-0/+7
* Add DLL workaround and unit testsAndre Marin2017-05-122-0/+557
* Added DQS alignment workaroundStephen Glancy2017-05-122-12/+544
* Add PHY sequencer refresh settings after draminitAndre Marin2017-05-123-1/+135
* Add empty DQS alignment workaroundsAndre Marin2017-05-052-0/+48
* Change RD_CTR workaround val and update attr nameJacob Harvey2017-05-031-2/+2
* Add empty dll workaround files for HB CI to mirrorAndre Marin2017-04-272-0/+48
* Added read ctr bad delay workaroundStephen Glancy2017-04-272-0/+385
* Fixed blue waterfall workaround bugsStephen Glancy2017-04-021-3/+3
* Updates DCD to pass on a/b failureStephen Glancy2017-03-311-6/+8
* Move find API to share among memory controllersAndre Marin2017-03-221-1/+1
* Fixes underflow error in DCD calStephen Glancy2017-03-222-16/+19
* Move scom API to share among controllersAndre Marin2017-03-184-4/+4
* Fix add rtt_wr eff_dimm unit tests and header file fixAndre Marin2017-03-161-1/+1
* Updates code to run PHY DCD calibrationStephen Glancy2017-03-162-2/+526
* Add pos API to be shared among controllers, move generic files to utilsAndre Marin2017-03-152-2/+2
* Change accesses to IS_SIM to use mss accessorJacob Harvey2017-03-101-3/+3
* Added DCD calibration empty filesStephen Glancy2017-03-062-0/+74
* Updates to run HW VREF cal by defaultStephen Glancy2017-03-012-0/+128
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