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path: root/src/import/chips/p9/initfiles
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* Axone int updatesAdam Hale2019-08-262-0/+225
* Remove unneeded init filesChristian Geddes2017-10-194-1653/+0
* chicken switch not properly set for htm timeout issueShelton Leung2017-08-311-0/+38
* enable MC timeout detectionShelton Leung2017-08-311-0/+56
* Adds DDR4 hybrid NV-RDIMM supportStephen Glancy2017-08-291-15/+15
* DD2 slow mss scrub fix (resurgence of HW397255)Shelton Leung2017-08-211-0/+12
* fix typo effecting 2666 DRAM timingsShelton Leung2017-07-271-2/+2
* rdtag_dly +1 for 2666 for better memory cornersShelton Leung2017-07-261-7/+11
* dis spec ops dcbf HW414958Shelton Leung2017-07-241-0/+9
* disable clearing mdi on remote cp_m for performanceShelton Leung2017-06-191-0/+6
* new async settings to replace workaround for HW413361Shelton Leung2017-06-191-40/+34
* reinstate tag fifo workaround for DD2 due to read array issue, likely temporaryShelton Leung2017-06-191-1/+4
* adjusted mem 2400 nest 1600 workaround and make dd1 onlyShelton Leung2017-06-072-16/+7
* future proof EC feature attributes, add missing P9N DD2 initsJoe McGill2017-06-071-9/+9
* P9 Cumulus InitCompiler supports - Part 2Thi Tran2017-05-244-0/+0
* additional dd2 nimbus initsShelton Leung2017-05-221-0/+30
* temp fix for boston mem 2400 nest 1600 issue HW411339Shelton Leung2017-05-222-4/+30
* dd2 initsShelton Leung2017-05-112-12/+230
* performance settings for best dd1 bw and latency, some risk level 100Shelton Leung2017-05-051-8/+170
* 2n settings in mca keyed off attributesShelton Leung2017-03-291-20/+16
* disable noise window for DD1 HW406577Shelton Leung2017-03-271-3/+9
* Read ODT formulas based on CL and CWLShelton Leung2017-03-231-22/+6
* tuned down odt wr delay valuesShelton Leung2017-03-081-2/+2
* enable prefetch drop for better MC fairnessShelton Leung2017-03-021-4/+18
* Updates to initcompiler to support DD2 and cumulusRichard J. Knight2017-02-282-1/+3
* mc epsilon formula fixShelton Leung2017-02-211-18/+42
* Fifo mode inits now dictated by attributeShelton Leung2017-02-141-0/+10
* amo cache disabled for dd1 for HW401780Shelton Leung2017-02-101-1/+5
* p9.mcs.scom.initfile -- apply workaround for HW400075 in RL=0 onlyJoe McGill2017-02-071-3/+3
* workaround for hw400932 atag corruptin in prespShelton Leung2017-01-301-0/+18
* dd1 workaround for hw400075 coherency errorShelton Leung2017-01-301-0/+6
* Adding chip_ec_feature attributes for dd2 buildBen Gass2017-01-243-11/+11
* added refresh monitoring inits, fixes refresh overrun issueShelton Leung2017-01-241-0/+10
* rdtag_dly formulas based on PHY delaysShelton Leung2017-01-241-22/+17
* fixed code referrencing 2667 to 2666Shelton Leung2017-01-131-25/+25
* fixed how odt scoms interpret odt attributesShelton Leung2017-01-131-33/+96
* update to write data delay formulaShelton Leung2017-01-131-9/+3
* Set safe refresh to same as normal refreshShelton Leung2017-01-041-0/+8
* new temporary rdtag_dly valuesShelton Leung2017-01-031-30/+21
* scan inits for lab workaround for DI bug HW392781Shelton Leung2016-12-051-0/+36
* mca initfile - remove unnecessary dependence on on TRP and TRCDShelton Leung2016-10-301-51/+51
* Add RCD parity, clear parity FIR before trainingBrian Silver2016-10-171-23/+25
* Change MCA initfile to not divide by 0 if there are no DIMMBrian Silver2016-10-101-2/+10
* MCA initfile added support for CL != TRP != TRCD, ODT, CIDShelton Leung2016-10-071-0/+155
* p9.mc.scan.initfile -- adjust HWPERF0 prefetch limit fieldJoe McGill2016-09-251-8/+8
* changed scan target to TARGET_TYPE_PROC_CHIP and put MC23 instances as well.Shelton Leung2016-08-241-10/+35
* added 2nd round of mc initsShelton Leung2016-08-183-34/+58
* Removed prefetch limit from scom init since we have it in scan init now.Shelton Leung2016-08-121-5/+0
* MCA,MCBIST,MCS (all files in one, no 2 part thing anymore)Shelton Leung2016-07-052-48/+160
* Change MCA initfile to encorporate VBU initsBrian Silver2016-07-011-7/+408
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