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* Fix mcbist control register; was config registerBrian Silver2016-04-011-1/+1
| | | | | | | | | | | | | Change-Id: I99d6ee215a682201305cb14f029567332f15c405 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21766 Tested-by: Jenkins Server Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: CRAIG C. HAMILTON <cchamilt@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22773 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Change WC to follow the new register block patternBrian Silver2016-04-014-190/+445
| | | | | | | | | | | | | | | Change-Id: I9f1d24893a0a1e1b8a35880c5d2f9df639b8301f Original-Change-Id: I20f22cb5ea50c7f8e0d53bb39ef452f892187d2a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/20851 Tested-by: Jenkins Server Tested-by: Auto Mirror Tested-by: Hostboot CI Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: CRAIG C. HAMILTON <cchamilt@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22772 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Change read control API to match desired design, add design docBrian Silver2016-04-012-11/+32
| | | | | | | | | | | | Change-Id: I008392a4b24461906735546b9af37a89c5600600 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/24657 Tested-by: Jenkins Server Reviewed-by: Craig C. Hamilton <cchamilt@us.ibm.com> Reviewed-by: Andre A. Marin <aamarin@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22771 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Change WRCLK_PR so that we don't trash the sim initsBrian Silver2016-04-011-2/+4
| | | | | | | | | | | | Change-Id: I9b2701710e78cf4d77f9b2dbfc89254eadca3520 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/24624 Tested-by: Jenkins Server Reviewed-by: Andre A. Marin <aamarin@us.ibm.com> Reviewed-by: Craig C. Hamilton <cchamilt@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22770 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Change RC_CONFIG2 for sim settings (BL8)Brian Silver2016-04-011-22/+23
| | | | | | | | | | | | Change-Id: Iab23944adfdafa61697be391c73963fac816a473 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/24515 Tested-by: Jenkins Server Reviewed-by: Andre A. Marin <aamarin@us.ibm.com> Reviewed-by: Craig C. Hamilton <cchamilt@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22769 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add mcbist L2 functionBrian Silver2016-04-019-84/+1557
| | | | | | | | | | | | | Change-Id: Ie902a404323fe781aca99af2c20ca6ba564a06da Original-Change-Id: I8b98c188d6a642eb49d89deffcbd697d9cf7afdc Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/23895 Tested-by: Jenkins Server Reviewed-by: Craig C. Hamilton <cchamilt@us.ibm.com> Reviewed-by: Andre A. Marin <aamarin@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22768 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fixed doxygen errors and typosJacob Harvey2016-04-0131-529/+526
| | | | | | | | | | | | | Change-Id: I86313e4af81003744f0ab6c507d019a39c4a4992 Original-Change-Id: I94120c654c32b5c3513740ce8aae4b4cc632fc41 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/24281 Tested-by: Jenkins Server Reviewed-by: Andre A. Marin <aamarin@us.ibm.com> Reviewed-by: Brian Silver <bsilver@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22767 Tested-by: FSP CI Jenkins Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Added mss_spd_ut, edited mss_utils_ut, fixed ecmd_facade & return_codeAndre Marin2016-04-011-13/+15
| | | | | | | | | | | | | Change-Id: Id9748b670471bcd313bb3626178f58082daed338 Original-Change-Id: I43af67f8bdce058e7af322b51b34336726e3a442 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/23904 Reviewed-by: Brian Silver <bsilver@us.ibm.com> Tested-by: Jenkins Server Reviewed-by: Craig C. Hamilton <cchamilt@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22766 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add dump_regs for PHY registersBrian Silver2016-04-015-198/+1390
| | | | | | | | | | | | | Change-Id: I3b276feb391c79866376be1a1d9ef7222795eb8a Original-Change-Id: I6357acba5d0563c8ef29291da264559f588a5b13 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/23810 Tested-by: Jenkins Server Reviewed-by: Andre A. Marin <aamarin@us.ibm.com> Reviewed-by: Craig C. Hamilton <cchamilt@us.ibm.com> Reviewed-by: Brian Silver <bsilver@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22765 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add dump_regs for MCBrian Silver2016-04-012-0/+364
| | | | | | | | | | | | | Change-Id: I2d94838f70fc962cde6ab461c1276bb1bd8e6f48 Original-Change-Id: Ifed6fb999c6f037a1e01281b0acd8f3d8a9dffc2 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/23812 Tested-by: Jenkins Server Reviewed-by: Andre A. Marin <aamarin@us.ibm.com> Reviewed-by: Craig C. Hamilton <cchamilt@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22764 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Change polling to include probes, add granular training controlsBrian Silver2016-04-015-31/+83
| | | | | | | | | | | | | Change-Id: Ic08df810970b2448e67f9aab5b7f934cb518f2bc Original-Change-Id: I0c8c44e4f9627f96f8f66195ff71bb0b6113ce47 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/23523 Tested-by: Jenkins Server Reviewed-by: Craig C. Hamilton <cchamilt@us.ibm.com> Reviewed-by: Andre A. Marin <aamarin@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22763 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add PHY RC class, update setup cal for 2D wc/rcBrian Silver2016-04-013-68/+604
| | | | | | | | | | | | | Change-Id: Ib88a26b34176d461622259409aaef9d0ca86244d Original-Change-Id: I18cfd506cdde8730f88e892af7cd97d93fb74434 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/23561 Tested-by: Jenkins Server Reviewed-by: Craig C. Hamilton <cchamilt@us.ibm.com> Reviewed-by: Andre A. Marin <aamarin@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22762 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Changes related to model 31, attr changes for sim latenciesBrian Silver2016-04-012-4/+45
| | | | | | | | | | | | | | | | | Fix bug in ODT write config, using read config values Turn off WL RTT Swap Change VBU attribute file to include all sim cal steps Change-Id: I63d2d47309bc41c761cabb5047e1fef8dcdea2fb Original-Change-Id: I75aa17dcc46cecd120cdcd1847ea7e28b82c4dc8 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/23418 Tested-by: Jenkins Server Reviewed-by: Craig C. Hamilton <cchamilt@us.ibm.com> Reviewed-by: Andre A. Marin <aamarin@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22761 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Added mss::get/putScomBrian Silver2016-04-0111-80/+194
| | | | | | | | | | | | | | Change-Id: I1bb2ae73d4c90c771a285b292b04b566e302fafc Original-Change-Id: Ib6571e6e9e374c6d8995235e2553bce149b0113b Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22988 Tested-by: Jenkins Server Reviewed-by: Craig C. Hamilton <cchamilt@us.ibm.com> Reviewed-by: Christian Geddes <crgeddes@us.ibm.com> Reviewed-by: Brian Silver <bsilver@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22760 Tested-by: FSP CI Jenkins Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Initial commit of memory subsystemBrian Silver2016-04-0142-0/+13042
| | | | | | | | | | | | Change-Id: Ia6375304adaa7e04dfa642e144341d7a5776673a Original-Change-Id: I6b63d2c4eec5d77585c91d905a464962a6153a0a Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22978 Tested-by: Jenkins Server Reviewed-by: Craig C. Hamilton <cchamilt@us.ibm.com> Reviewed-by: Brian Silver <bsilver@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22759 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* PRD: bad links generated for error log plugin codeZane Shelley2016-04-011-1/+1
| | | | | | | Change-Id: Ic5e8a855fb09f11c58358bd2d839efed492481ba Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22810 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* PCIE phase1/phase2 initialization procedure.Gou Peng Fei2016-04-011-6/+259
| | | | | | | | | | | | | | | | | | | | Changes included: 1) p9_pcie_scominit for phase1. 2) p9_pcie_config for phase2. 3) Add attribute values for phase1. Change-Id: I0e08ba85041d9fef6105878bb9af0579f0cb95fe Original-Change-Id: Id9afc0edaa716b0fdc22ac9035ad4b8ebfecb38f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/20885 Tested-by: Jenkins Server Tested-by: Hostboot CI Tested-by: PPE CI Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22601 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add cstdint.H as part of C++11 supportDan Crowell2016-04-011-0/+71
| | | | | | | | | | The ctdint.h file includes sized integer variable types inside the std:: namespace. Change-Id: I764f89331c163cd08fa5cfc2c388f64237c6eeed Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22751 Tested-by: Jenkins Server Reviewed-by: A. P. Williams III <iawillia@us.ibm.com>
* PCIE Level 1 proceduresJoe McGill2016-04-011-0/+500
| | | | | | | | | | | | | | | | Shells for p9_pcie_scominit, p9_pcie_config, p9_pcie_hotplug_control Supporting attribute definitions Change-Id: I7fada8c46e9c09b877a8779f8b2c56bb9d377dfd Original-Change-Id: Ifdfee9a0aee08624fdc279355a5f46e0049417e7 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21599 Tested-by: Jenkins Server Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: CHRISTINA L. GRAVES <clgraves@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22600 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* PRD: Modified makefiles to remove all P8 referencesZane Shelley2016-04-0110-62/+235
| | | | | | | | | | | | | Change-Id: I5e33802d2a5e0a01aae0be638cce0bce8afba0fe RTC: 140081 Depends-on: Ic2ce697a99ed25204da374bf5616bae56cdf4450 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21866 Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Tested-by: Zane C. Shelley <zshelle@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22615 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* PRD: Removed remaining P8 codeZane Shelley2016-04-0113-27/+53
| | | | | | | | | | | | | | Change-Id: Ic2ce697a99ed25204da374bf5616bae56cdf4450 RTC: 140081 Depends-on: I1a0346a88b4748a3e2027dd2c16e39e5a6ee9b32 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21865 Tested-by: Jenkins Server Reviewed-by: Benjamin J. Weisenbeck <bweisenb@us.ibm.com> Reviewed-by: Caleb N. Palmer <cnpalmer@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22562 Tested-by: FSP CI Jenkins
* PRD: Partially flattened framework directoriesZane Shelley2016-04-019-63/+98
| | | | | | | | | | | | | | | | | | The Hostboot and FSP specific framework directories have been flattened. Held of doing the same for the common framework directory since there is so much code in there. Change-Id: I1a0346a88b4748a3e2027dd2c16e39e5a6ee9b32 RTC: 140081 Depends-on: I21c01ef76e25ba3580e44703fa691160f7be10a2 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21864 Tested-by: Jenkins Server Reviewed-by: Benjamin J. Weisenbeck <bweisenb@us.ibm.com> Reviewed-by: Caleb N. Palmer <cnpalmer@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22561 Tested-by: FSP CI Jenkins
* Handle non-platInit temporary attributesDan Crowell2016-03-311-2/+9
| | | | | | | | | | | | | | A fapi attribute that is not platInit must be associated with a volatile-zeroed persistency, rather than volatile. Change-Id: Id5d3193e07158bc42c98f1bd2c8e9fdb2ee6b1b5 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22713 Tested-by: Jenkins Server Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: FSP CI Jenkins Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Make SBE attributes writeableDan Crowell2016-03-311-0/+10
| | | | | | | | | | | | | | | Need to make all of the attributes that are consumed by the SBE code writeable until that code is rewritten to use attribute redirection. Change-Id: I4f7bd5205458d7d1ee5c3b41807d9363ca202c67 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22690 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* ifCompiler -- initfile HWP generation code to match specificationJoe McGill2016-03-311-108/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | when=L: permit fall through/no update when no rows evaluate to true add read-modify-write path to support ispys with bit field specifications support espys (integer data specification to putspy API) of arbitrary size support ispys of arbitrary size (64 bits per row maximum) add test initfiles for all targets expected to be supported in image build need eCMD update to test OBUS/MC initfiles add test procedure/wrapper for regression using Cronus platform when=S: emit error if no clocks-on content is found in spydef general: update ENGD reference to use e9034 u055 model Change-Id: I522d4fa559f84a8c4d960b8a686def5af92ad3ef Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21741 Tested-by: PPE CI Tested-by: Jenkins Server Tested-by: Hostboot CI Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21763 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* L2 HWPs - Fix TODOs in p9_mss_eff_grouping HWPThi Tran2016-03-311-20/+0
| | | | | | | | | | | | | | | | Change-Id: I8f2d39500e25b2a76a6fa955da82503182fb086e Original-Change-Id: I58e4a18b8652dd02134d326fea0e22327afc31e4 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21946 Tested-by: Jenkins Server Tested-by: Auto Mirror Tested-by: Hostboot CI Tested-by: PPE CI Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: JOSHUA L. HANNAN <jlhannan@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22126 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Update xbus initfile procedures with latest initCompiler changesPrachi Gupta2016-03-312-1375/+2406
| | | | | | | | | | | Change-Id: Ibf752a3768636155d003d44f8073755b117cf9b2 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21857 Tested-by: Jenkins Server Reviewed-by: Christopher W. Steffen <cwsteffen@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22125 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add I/O Xbus InitfilesChris Steffen2016-03-316-0/+13337
| | | | | | | | | | | | | | Change-Id: Ida70047be0da6c10868d29be2ffbf014c3488176 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/20879 Dev-Ready: Gary A. Peterson <garyp@us.ibm.com> Tested-by: Jenkins Server Reviewed-by: Sumit Kumar <sumit_kumar@in.ibm.com> Reviewed-by: Gary A. Peterson <garyp@us.ibm.com> Reviewed-by: Christopher W. Steffen <cwsteffen@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22124 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Support 2nd PROC+update DIMMs on Nimbus model, support FAPI_POS attributecrgeddes2016-03-315-484/+7307
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add second PROC to NIMBUS Model & Update DIMM Targets - We finally have functionality that requires multiple procs to test. This xml was mostly copied from the ZZ simics model. Previous to this commit we were adding 32 DIMMs per proc, this commit changes that to 16 per PROC. Support FAPI_POS attributes - Update attribute definition to non-zero default - Added FAPI_POS enum to provide default - Updated system.xml files with new FAPI_POS - Updated system.xml files with ORDINAL_IDs - Updated system.xml files with PERVASIVE_PARENT - Updated system.xml files with phys/affinity paths based on chiplet - Tweaked DIMM layout to match FSP MRW - Updated attribute generator to arrayify enumerators - Updated common MRW parser to add FAPI_POS to relevant targets - Added FAPI_NAME to proc1 targets - Fixed FAPI_NAME for dimms in XML files and attribute parser RTC: 149247 Change-Id: I49367e6e03e6b8ad9df9ea0b1de9960e84324722 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22611 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Enable startDeadmanLoop in host_activate_master.Ccrgeddes2016-03-313-25/+5
| | | | | | | | | | | | | Change-Id: I04c7d38860f042e392026f81f9f3772212dfe14f Depends-on:Ib0db5ac2b9b5d5f5c2967ff97794493d867fb04b Depends-on:Ic8bac9940b00eae01c175f51dd1872b2bb128b95 RTC:133832 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21901 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* L2 - p9_mss_eff_grouping HWP (p9_opt_memmap)Thi Tran2016-03-311-14/+37
| | | | | | | | | | | | | | | | Change-Id: Ic12a3ddf6adea70d3d91fda6f36c0c24300fd0bd Original-Change-Id: I22451d19831283c5204e43597d27cc5b87c68b0d Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/23859 Tested-by: Jenkins Server Tested-by: Auto Mirror Tested-by: PPE CI Tested-by: Hostboot CI Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: CHRISTINA L. GRAVES <clgraves@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22123 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Trustedboot attribute configuration bit for TPM Required.Chris Engel2016-03-312-0/+16
| | | | | | | | | | | | Change-Id: Icf1f3a97d18468ff0014cb71d579fd62752afb0d RTC: 125289 ForwardPort: cherry picked from commit 32dff4ca9db6d8b088ed6ec63f147d2aaded3e69 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22563 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22691 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: Christopher J. Engel <cjengel@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* More attribute updates for HWP compilesDan Crowell2016-03-311-1/+1
| | | | | | | | | Change-Id: I7d2c0a7d363dd2579c1744a53f549b5fc797f786 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22694 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: Matt Derksen <v2cibmd@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Merge additional attributes from p9_pcie_attributes.xmlMatt Derksen2016-03-302-65/+1066
| | | | | | | | | | | | These attributes are needed for p9_pcie_scominit.C called in istep8. Change-Id: I7412734d87371c0b8484f34aa58fc47234296c0b RTC:146576 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22664 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* P9 PSIHB Base Interrupt SupportBill Hoffa2016-03-3020-976/+1166
| | | | | | | | | | | | | | | | | | | This change includes the following: - Kernel Updates to handle hypervisor interrupt vector - Interrupt Resource Provider changes to setup and handle LSI Based interrupts - Kernel updates to handle modified interrupt flow for LSI Based interrupts - Attribute updates for Scom BAR Registers Change-Id: If63f246a0090ab8c81c3fa8ac3ab6871a0af2e31 RTC:137561 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/20692 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Method to support initial temporary defaults for attributesMarty Gloff2016-03-307-30/+930
| | | | | | | | | | | | | | | Supply temporary HB defaults and attribute definitions. Create temporary HB attribute definitions from new FAPI ones. Add attributes to a target based on FAPI targetType. Change-Id: I41d5fe0ef1d51d25975ec18a50bd125837f77995 RTC:131375 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/1016 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Elizabeth K. Liner <eliner@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* BMC istep controlDean Sanner2016-03-3013-445/+386
| | | | | | | | | | Change-Id: Ic334bfa82a47f9b754afc39a7d3f884a92f578c0 RTC: 118753 ForwardPort: yes Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/1350 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Added fapi2::toString supportMatt Derksen2016-03-305-10/+591
| | | | | | | | | | | | | Added new FAPI_NAME attribute. Change-Id: Ib467aa5ac203e9900f3cb6d65f13d7988c363348 RTC: 144504 Depends-on: I9faa3bea86d1b43bca0a7eaca3869b45cc0b0d54 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/20747 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* PCIE phase1/phase2 initialization procedure.Gou Peng Fei2016-03-301-0/+29
| | | | | | | | | | | | | | | | | | | | Changes included: 1) p9_pcie_scominit for phase1. 2) p9_pcie_config for phase2. 3) Add attribute values for phase1. Change-Id: I092b44525da98d0b9d3cdf8a119e171beed6b161 Original-Change-Id: Id9afc0edaa716b0fdc22ac9035ad4b8ebfecb38f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/20885 Tested-by: Jenkins Server Tested-by: Hostboot CI Tested-by: PPE CI Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22627 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Update Simics debug framework for new Xscom layoutDean Sanner2016-03-291-14/+9
| | | | | | | | | Change-Id: I1badb7cf2778acdbf19b875b23d6030f888126c8 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22490 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Support runtime target translation for PhypNick Bofferding2016-03-2918-382/+2689
| | | | | | | | | | | | | | | | | | | | | | - Added ordinal IDs to system XML files - Added new HBRT_HYP_ID attribute to proc, membuf, core targets - Removed duplicate target type extensions - Customize HBRT_HYP_ID attributes in istep 21 based on payload type - Updated runtime translation interfaces for simple, efficient lookup - Added templated memoizer to speed up simple input/output functions - Generate ordinal IDs in common attribute parser - Added various test cases RTC: 146153 CMVC-Coreq: 989094 Change-Id: Ic60996f3b7c3197191f8939f362c578b54475df4 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22254 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Enable call_host_ipl_complete in istep 16crgeddes2016-03-292-62/+92
| | | | | | | | | | | | | | | Right now two hwps are being called in this substep, they are proc_switch_cfsim and p9_switch_rec_attn. One will be called for centaurs in the future but it is not complete yet Change-Id: Iecfc2231284ca6238ea801240ecf8d7df0f4c150 RTC: 133832 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22463 Tested-by: Jenkins Server Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Enable hcode_image_build HWPs in istep 15.1crgeddes2016-03-291-56/+18
| | | | | | | | | | | | | | | Note that this requires a back build of b0323b_1614.910 or greater to get the new hw image Change-Id: Ic7b1f2b9c9baa4416d8c2c264be2878b30c610de RTC: 133832 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22479 Tested-by: Jenkins Server Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com> Tested-by: FSP CI Jenkins Reviewed-by: Matt Derksen <v2cibmd@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Reviewed-by: Matthew A. Ploetz <maploetz@us.ibm.com>
* Enable set_pba_homer_bar HWP in istep15crgeddes2016-03-291-10/+10
| | | | | | | | | | | Change-Id: Id4a3d0f262bd82a39bb440d22ef42920b7f3d970 RTC: 147693 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22363 Tested-by: Jenkins Server Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Tested-by: FSP CI Jenkins Reviewed-by: Matthew A. Ploetz <maploetz@us.ibm.com>
* Bootloader needs to dcbz the cache before using itMarty Gloff2016-03-291-1/+2
| | | | | | | | | | | | | | | | | Include ending address of Booloader load in BootloaderConfigData_t structure and set it in p9_sbe_load_bootloader HWP. Change-Id: Ibd21ca1829d46845309e8d2c411da5e40724c1ec Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22416 Reviewed-by: Thi N. Tran <thi@us.ibm.com> Tested-by: Jenkins Server Tested-by: PPE CI Reviewed-by: CHRISTINA L. GRAVES <clgraves@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22585 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Adding in the exception vectorCHRISTINA L. GRAVES2016-03-291-0/+55
| | | | | | | | | | | | Change-Id: I48193600b25fa62f60b61a6a269ccbedbd96f12d Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/23386 Tested-by: Jenkins Server Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22584 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add ABUS and L4 targets to FAPI_POS and CHIP_UNIT_POS attributesNick Bofferding2016-03-292-2/+2
| | | | | | | | | | | | | | Change-Id: I432388c001c7e9b6064e7432f689cdb6c4549f83 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22467 Tested-by: Jenkins Server Tested-by: Hostboot CI Reviewed-by: Brian R. Silver <bsilver@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22468 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Updates for p9_revert_sbe_mcs_setup, p9_sbe_mcs_setup (Level 2)Joe McGill2016-03-291-1/+1
| | | | | | | | | | | | | | | | | | | Add p9_revert_sbe_mcs_setup L2 content Update p9_sbe_mcs_setup to consider drawer base address, MI target type Add common routine in p9_fbc_utils to determine chip base addresses Update p9_sbe_bootloader to reference common base address routine Change size of fabric system ID attribute to accomodate small sytem memory map Change-Id: Ice97a35657ceb8d9b090a0bee2c725eef18009bd Original-Change-Id: Ifaf016b04c8cf7efbd6e5ee668f22a8059f0ed8d Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21908 Tested-by: Jenkins Server Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: CHRISTINA L. GRAVES <clgraves@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22122 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* VBU IPL regression framework for isteps 0-5Joe McGill2016-03-291-1/+1
| | | | | | | | | | | | | | | | | | | | | - add model boot script (sc, sc_mem models) - add run scripts and config dependencies (sc, sc_mem models) - run_ipl script updates to track IPL spreadsheet - code sim workarounds in eCMD - add IPL phase attribute enum for chip contained work - fix SBE bootloader makefile Change-Id: I5fbcfb6e13cf5e16032c80fa74a262b889975c41 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/20982 Tested-by: Jenkins Server Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Dev-Ready: Benjamin Gass <bgass@us.ibm.com> Reviewed-by: James N. Klazynski <jklazyns@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22121 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* FBC Level 1 proceduresJoe McGill2016-03-291-5/+435
| | | | | | | | | | | | | | | | Shells for p9_build_smp, p9_fab_iovalid, p9_smp_link_layer Supporting attribute definitions Change-Id: I5822ae06fe84b94b26df5253d068f3db75ef834b Original-Change-Id: I59f7fb0f13ee190cd790ea5771f4a32faaa165d9 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21570 Tested-by: Jenkins Server Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: CHRISTINA L. GRAVES <clgraves@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22120 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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