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* Add more fapi2 target types for AxoneMatt K. Light2018-06-275-47/+104
* PM: pm_firinit class fix to properly clear FIRs upon initializationGreg Still2018-06-261-3/+3
* PM: Not mask OCC_HB_NOTIFY during PM ResetRahul Batra2018-06-262-1/+16
* PM: Increase PB Purge time for MPIPL to accommodate FleetwoodGreg Still2018-06-261-2/+2
* P9C Abus ProcedureChris Steffen2018-06-261-0/+5
* DDR3 Support for FleetwoodSwathi Madhuri Bhattiprolu2018-06-262-3/+17
* Save HRMOR in mbox scratch reg for IPC messagingPrachi Gupta2018-06-265-71/+43
* SP ATTN area relative addressing cleanupJaymes Wilks2018-06-264-20/+22
* Modify debug framework to be build-independentDan Crowell2018-06-2628-63/+578
* P9C Abus Reset ProcedureChris Steffen2018-06-262-2/+54
* Cen Too Many Bus ErrorsChris Steffen2018-06-261-1/+57
* Good-Path Fixes for Secure Node CommunicationsMike Baiocchi2018-06-262-22/+51
* Add Option to Use opal-elog-parse to eSEL.plIlya Smirnov2018-06-261-2/+12
* Post informational error log for planar jumper settingsNick Bofferding2018-06-264-63/+93
* STOP API: API conditionally supports 255 SCOM restore entries for each quad.Prem Shanker Jha2018-06-256-106/+145
* PM: Fix double biases value into safe mode frequencyGreg Still2018-06-251-6/+19
* Remove deprecated VCS_I2C_RAIL attribute from hb codeChristian Geddes2018-06-251-5/+0
* Add kernel debug trace to Invalid IPC Message ErrorsBill Hoffa2018-06-251-0/+4
* Updating Channel Fail MaskChris Steffen2018-06-253-5/+17
* centaur mba initfile update for refresh reset intervalMichael Pardeik2018-06-221-3/+3
* Fix data storage exception when PRD runs in istep 12.Thi Tran2018-06-221-0/+1
* PRD: Dont report error log for backlog count underflow FIRCaleb Palmer2018-06-224-2/+82
* p9_throttle_sync -- clear refresh sync type after issuing IPL syncJoe McGill2018-06-221-3/+17
* PRD: fixed the per-symbol threshold in MBA TPSZane Shelley2018-06-221-1/+5
* PRD: abort TPS if chip mark placed during procedureZane Shelley2018-06-222-6/+28
* PRD: Ban TPS if UE found during VCM, DSD, or TPS proceduresZane Shelley2018-06-223-0/+20
* PRD: reduce number of ways TPS can be bannedZane Shelley2018-06-224-20/+18
* PRD: All TPS bans on MCA target should cause fetch CE maskingZane Shelley2018-06-223-3/+4
* PRD: remove unused TD queue parametersZane Shelley2018-06-223-30/+23
* PRD: fix bug that bypasses TPS ban supportZane Shelley2018-06-222-6/+9
* correctly propogate bad return code from p9_adu_coherent_status_checkJoe McGill2018-06-222-9/+17
* Ensure memory HUID's are node-relativeAndrew Geissler2018-06-221-29/+38
* P9N/P9C util to throttle HWP updates for min util and safemodeMichael Pardeik2018-06-218-20/+225
* Secure Boot: Set FIR mask bits for inactive OBUS links during host coalesceNick Bofferding2018-06-212-19/+139
* Updating p9.core.scan.initfile settings for p9n 2.3Ben Gass2018-06-211-2/+16
* Add RL0/RL1 support for CDD1.2Nick Klazynski2018-06-211-8/+31
* Adjust Bad Dq Translation for CDIMMsCaleb Palmer2018-06-211-9/+48
* Add TPM Calls to Node Communication ABUS Exchange ProcedureMike Baiocchi2018-06-216-94/+507
* HRMOR relative addressing for PHyp SP ATTN area dumpJaymes Wilks2018-06-216-0/+117
* HBRT attrrp depends on node zero being presentMarty Gloff2018-06-216-146/+210
* Fix p9c_generic_shmoo unit test to work with corrected bad bits attrLouis Stermole2018-06-212-299/+329
* Update some defaults for AVSBUS attributesDan Crowell2018-06-211-20/+8
* Updates the training advanced algorithmStephen Glancy2018-06-219-139/+511
* Updates training advanced workarounds to run after a failureStephen Glancy2018-06-213-25/+56
* Update PEER_TARGET values to be NULL on MPIPL if neededChristian Geddes2018-06-201-16/+7
* Added in a sleep after we winkle in istep 18 to avoid race conditionsPrachi Gupta2018-06-202-0/+9
* shift OBUS FIR programming inits for secure bootJoe McGill2018-06-203-0/+216
* PRD: shift UCS and HA chiplet masks to match chiplet FIRsZane Shelley2018-06-208-24/+24
* PRD: MBA command resume not incrementing addressZane Shelley2018-06-203-23/+26
* PM: Clear error injection bits before special wake-up in PM complex resetGreg Still2018-06-202-1/+70
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