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* HWP/LIB: add fencing to common poweronoff moduleYue Du2017-02-101-12/+28
* p9_common_poweronoff: delay 10us/40k simcycles between FSM idle pollingJoe Dery2017-02-101-5/+11
* p9_sbe_select_ex Level 2 updateGreg Still2017-02-101-1/+65
* L2 HWP p9_pm_pfet_controlSumit Kumar2017-02-104-260/+829
* HWP-CACHE/CORE:istep4 procedures updatesYue Du2017-02-101-2/+18
* HWP-CORE/CACHE: Update Istep 4 procedures regressed on model 34Yue Du2017-02-102-52/+70
* Fix 1R dual-drop bugsLouis Stermole2017-02-105-49/+120
* Updates MCBIST for dual-drop systemsStephen Glancy2017-02-108-2/+233
* Add c_str generic API and update makefilesAndre Marin2017-02-1055-81/+113
* amo cache disabled for dd1 for HW401780Shelton Leung2017-02-103-1/+29
* p9_pcie_scominit PEC0 swap bit position fixedRicardo Mata2017-02-104-37/+133
* Added Scom to de-assert EDRAM Charge Pumps in Power down sequenceRaja Das2017-02-101-3/+20
* Add Galois-symbol-DQ mapping tables and functionsLouis Stermole2017-02-101-0/+138
* Adding ECC syndrome register access functionsLouis Stermole2017-02-105-0/+1225
* Stopclocks: fix state checking return code being current_errYue Du2017-02-101-37/+22
* cache/core/l2_stopclocks updatesYue Du2017-02-101-0/+123
* Set MSS blue waterfall workaround to only run after coarse rd/wr cal stepLouis Stermole2017-02-101-2/+7
* PB Purge Scoms if PBIEQ clock domain is being stoppedRaja Das2017-02-102-2/+64
* Istep4: clean up istep4 todo items and mark them with RTCYue Du2017-02-101-1/+1
* Implementation of PIB stopclock with CBSSoma BhanuTej2017-02-101-0/+44
* cache/core/l2_stopclocks updatesYue Du2017-02-104-160/+60
* PPE-HWP: [Level 2] Cache/Core chiplet_reset/init/scan0+startclocksYue Du2017-02-102-0/+547
* Shift HWP content to align with desired EKB layoutJoe McGill2017-02-102-0/+377
* PPE-HWP: [Level 2] Poweronoff Hcode Procedures using APIDavid Young2017-02-102-139/+0
* Quiesce SBE before writing SEEPROMMarty Gloff2017-02-1011-46/+93
* Add sbeError tag to all SBE related error xml filesRichard J. Knight2017-02-101-0/+8
* PRD: removed BitStringOffset classZane Shelley2017-02-1013-137/+66
* PRD: cleaned BitString::[GS]setField() functionsZane Shelley2017-02-108-263/+176
* PRD: cleaned BitString::Mask()Zane Shelley2017-02-105-99/+33
* PRD: cleaned BitString::SetBits()Zane Shelley2017-02-107-109/+105
* PRD: cleaned BitString::Pattern()Zane Shelley2017-02-1011-167/+111
* PRD: cleaned BitStringBuffer classZane Shelley2017-02-103-258/+79
* PRD: Cleaned BitString contructor and accessor functionsZane Shelley2017-02-107-257/+164
* PRD: cleaned CPU_WORD type and associated enumsZane Shelley2017-02-103-99/+66
* PRD: RE-UE/CS-SUE association design for P9Brian Stegmiller2017-02-102-286/+12
* PRD: modified getTargetPosition() to assert if target is not supportedZane Shelley2017-02-101-62/+25
* PRD: cleaned error path handling in various getConnected() functionsZane Shelley2017-02-101-22/+11
* PRD: cleaned error handling for getConnectedParent() functionsZane Shelley2017-02-109-82/+22
* PRD: added nullptr check to various functions in prdfTargetServices.CZane Shelley2017-02-101-30/+20
* PRD: Cleaned error handling for getAssociationType()Zane Shelley2017-02-101-55/+37
* HB/IPL: ex_is_abomination workaround for hostbootYue Du2017-02-101-1/+3
* Fix for the EKB build failure caused by hcd constantSangeetha T S2017-02-101-1/+2
* CORE/CACHE: core/cache/l2_stopclocks Level 2Yue Du2017-02-104-10/+328
* CORE/CACHE: add Level1 cache/l2/core stopclocks proceduresYue Du2017-02-103-0/+151
* PPE-HWP: [Level 2] Cache/Core chiplet_reset/init/scan0+startclocksYue Du2017-02-101-0/+131
* PRD: allow getTargetPosition() on SYS targetZane Shelley2017-02-101-1/+8
* PRD: Create CeStats ClassCaleb Palmer2017-02-104-123/+155
* PRD: Update MemThresholds FilesCaleb Palmer2017-02-104-97/+69
* PRD: Update MemUtils FileCaleb Palmer2017-02-103-158/+227
* PRD: Update xml parser for cs_root_cause filterCaleb Palmer2017-02-1012-56/+56
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