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-rw-r--r--src/usr/fsi/fsidd.C45
-rw-r--r--src/usr/fsi/fsidd.H48
2 files changed, 63 insertions, 30 deletions
diff --git a/src/usr/fsi/fsidd.C b/src/usr/fsi/fsidd.C
index facf9d019..8e5ad7689 100644
--- a/src/usr/fsi/fsidd.C
+++ b/src/usr/fsi/fsidd.C
@@ -1327,7 +1327,7 @@ errlHndl_t FsiDD::initPort(FsiChipInfo_t i_fsiInfo,
/**
* @brief Initializes the FSI master control registers
*/
-errlHndl_t FsiDD::initMasterControl(const TARGETING::Target* i_master,
+errlHndl_t FsiDD::initMasterControl(TARGETING::Target* i_master,
TARGETING::FSI_MASTER_TYPE i_type)
{
errlHndl_t l_err = NULL;
@@ -1390,11 +1390,46 @@ errlHndl_t FsiDD::initMasterControl(const TARGETING::Target* i_master,
//Hardware Bug HW204566 on Murano DD1.0 requires legacy
// mode to be enabled
if( (i_master->getAttr<TARGETING::ATTR_MODEL>()
- == TARGETING::MODEL_MURANO) &&
- (i_master->getAttr<TARGETING::ATTR_EC>() == 0x10) )
+ == TARGETING::MODEL_MURANO) )
{
- // 25=clock/4 mode
- databuf |= 0x00000040;
+ uint32_t ec_level = 0x00;
+ uint32_t idec = 0;
+ if( i_master != iv_master )
+ {
+ // get the data via FSI (scom engine)
+ FsiAddrInfo_t addr_info( i_master, 0x1028 );
+ l_err = genFullFsiAddr( addr_info );
+ if( l_err ) { break; }
+
+ // perform the read operation
+ l_err = read( addr_info, &idec );
+ if( l_err ) { break; }
+ TRACFCOMP( g_trac_fsi, "FSI=%X", idec );
+ }
+ else
+ {
+ // have to use the scom version on the master chip
+ uint32_t scom_data[2];
+ size_t scom_size = sizeof(scom_data);
+ l_err = deviceOp( DeviceFW::READ,
+ TARGETING::MASTER_PROCESSOR_CHIP_TARGET_SENTINEL,
+ scom_data,
+ scom_size,
+ DEVICE_XSCOM_ADDRESS(0x000F000F) );
+ if( l_err ) { break; }
+
+ scom_data[0] = 0x1f0fffff;
+ idec = scom_data[0];
+ }
+ ec_level = (idec & 0xF0000000) >> 24;
+ ec_level |= ((idec & 0x00F00000) >> 20);
+
+ TRACFCOMP( g_trac_fsi, "EC=%X", ec_level );
+ if( ec_level == 0x10 )
+ {
+ // 25=clock/4 mode
+ databuf |= 0x00000040;
+ }
}
l_err = write( ctl_reg|FSI_MMODE_000, &databuf );
if( l_err ) { break; }
diff --git a/src/usr/fsi/fsidd.H b/src/usr/fsi/fsidd.H
index ab552ec9e..8d8f7f3bc 100644
--- a/src/usr/fsi/fsidd.H
+++ b/src/usr/fsi/fsidd.H
@@ -1,26 +1,25 @@
-/* IBM_PROLOG_BEGIN_TAG
- * This is an automatically generated prolog.
- *
- * $Source: src/usr/fsi/fsidd.H $
- *
- * IBM CONFIDENTIAL
- *
- * COPYRIGHT International Business Machines Corp. 2011-2012
- *
- * p1
- *
- * Object Code Only (OCO) source materials
- * Licensed Internal Code Source Materials
- * IBM HostBoot Licensed Internal Code
- *
- * The source code for this program is not published or other-
- * wise divested of its trade secrets, irrespective of what has
- * been deposited with the U.S. Copyright Office.
- *
- * Origin: 30
- *
- * IBM_PROLOG_END_TAG
- */
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/fsi/fsidd.H $ */
+/* */
+/* IBM CONFIDENTIAL */
+/* */
+/* COPYRIGHT International Business Machines Corp. 2011,2012 */
+/* */
+/* p1 */
+/* */
+/* Object Code Only (OCO) source materials */
+/* Licensed Internal Code Source Materials */
+/* IBM HostBoot Licensed Internal Code */
+/* */
+/* The source code for this program is not published or otherwise */
+/* divested of its trade secrets, irrespective of what has been */
+/* deposited with the U.S. Copyright Office. */
+/* */
+/* Origin: 30 */
+/* */
+/* IBM_PROLOG_END_TAG */
#ifndef __FSI_FSIDD_H
#define __FSI_FSIDD_H
@@ -194,7 +193,7 @@ class FsiDD
*
* @return errlHndl_t NULL on success
*/
- errlHndl_t initMasterControl(const TARGETING::Target* i_master,
+ errlHndl_t initMasterControl(TARGETING::Target* i_master,
TARGETING::FSI_MASTER_TYPE i_type);
/**
@@ -440,7 +439,6 @@ class FsiDD
FsiChipInfo_t getFsiInfo( const TARGETING::Target* i_target );
-
/********************************************
* VARIABLES
********************************************/
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