diff options
Diffstat (limited to 'src')
3 files changed, 99 insertions, 99 deletions
diff --git a/src/import/chips/centaur/procedures/xml/attribute_info/dimm_attributes.xml b/src/import/chips/centaur/procedures/xml/attribute_info/dimm_attributes.xml index 7623801b0..63e46abe4 100644 --- a/src/import/chips/centaur/procedures/xml/attribute_info/dimm_attributes.xml +++ b/src/import/chips/centaur/procedures/xml/attribute_info/dimm_attributes.xml @@ -87,7 +87,7 @@ <attribute> <id>ATTR_CEN_VPD_DIMM_SPARE</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description> Spare DRAM availability for all DIMMs connected to the target MBA. For each rank on a DIMM, there are 8 DQ lines to spare DRAMs. diff --git a/src/import/chips/centaur/procedures/xml/attribute_info/dimm_spd_vpd_attributes.xml b/src/import/chips/centaur/procedures/xml/attribute_info/dimm_spd_vpd_attributes.xml index 0face9e1d..7110b061b 100644 --- a/src/import/chips/centaur/procedures/xml/attribute_info/dimm_spd_vpd_attributes.xml +++ b/src/import/chips/centaur/procedures/xml/attribute_info/dimm_spd_vpd_attributes.xml @@ -653,7 +653,7 @@ The following attributes can be queried from both DDR3 and DDR4 DIMMs <attribute> <id>ATTR_CEN_VPD_DIMM_RCD_OUTPUT_TIMING</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>RCD Timing. Supplied by VPD, used by mss_eff_config.C. Each dimm will have a value. consumer: mss_eff_config </description> @@ -1858,7 +1858,7 @@ The following attributes are from Centaur VPD. <attribute> <id>ATTR_CEN_VPD_DRAM_ADDRESS_MIRRORING</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description> The C-DIMM ranks that have address mirroring. This data is in the Record:VSPD, Keyword:AM field in C-DIMM VPD. @@ -1880,7 +1880,7 @@ The following attributes are from Centaur VPD. <attribute> <id>ATTR_CEN_VPD_ODT_RD</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Read ODT. Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg. creator: VPD(MT),mss_eff_cnfg_termination consumer: various.C files and initfiles @@ -1894,7 +1894,7 @@ firmware notes: none</description> <attribute> <id>ATTR_CEN_VPD_ODT_WR</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Write ODT. Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg. Creator: VPD(MT)/ mss_eff_cnfg_termination consumer: various.C and initfile @@ -1908,7 +1908,7 @@ firmware notes: none</description> <attribute> <id>ATTR_CEN_VPD_DRAM_RON</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>DRAM Ron. Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg. OHM48 is for DDR4. creator: VPD(MT)/mss_eff_cnfg_termination @@ -1925,7 +1925,7 @@ This Attribute is to be interpreted as an Integer </description> <attribute> <id>ATTR_CEN_VPD_DRAM_RTT_NOM</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>DRAM Rtt_Nom. Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg. creator: VPD(MT),mss_eff_cnfg_termination consumer: various.C files (no initfiles) @@ -1941,7 +1941,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_DRAM_RTT_WR</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>DRAM Rtt_WR. Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg. Creator: VPD(MT), mss_eff_cnfg_termination consumer: various.C files (no initfiles) @@ -1957,7 +1957,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_DRAM_RTT_PARK</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>DRAM Rtt_PARK. Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg. RTT_Park value. This is for DDR4 MRS5.Each memory channel will have a value. Creator: VPD(MT), mss_eff_cnfg_termination @@ -1974,7 +1974,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_DRAM_WR_VREF</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>DRAM Write Vref. Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg. creator: VPD(MT) or mss_eff_cnfg_termination consumer: various.C and initfile @@ -1992,7 +1992,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_DRAM_WRDDR4_VREF</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>DRAM Write Vref. Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg. creator: VPD(MT) or mss_eff_cnfg_termination consumer: various @@ -2013,7 +2013,7 @@ Decode: (R for Range V for Value, blank for unused) <attribute> <id>ATTR_CEN_VPD_DRV_IMP_DQ_DQS</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Centaur DQ and DQS Drive Impedance Used in various locations and comes from the MT Keyword of the VPD or is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg. creator: VPD(MT)/mss_eff_cnfg_termination consumer: initfile,various.C files @@ -2031,7 +2031,7 @@ OHM30_FFE480 = 0x48, OHM30_FFE240 = 0x38, OHM30_FFE160 = 0x28, OHM30_FFE120 = 0x <attribute> <id>ATTR_CEN_VPD_DRV_IMP_ADDR</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Centaur Address Drive Impedance Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg. creator: mss_eff_cnfg_termination consumer: initfile and various.C @@ -2048,7 +2048,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_DRV_IMP_CNTL</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Centaur Control Drive Impedance Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg. creator: VPD(MT)/mss_eff_cnfg_termination consumer: initfile,various .C @@ -2065,7 +2065,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_DRV_IMP_CLK</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Centaur Clock Drive Impedance Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg. creator: VPD(MT),mss_eff_cnfg_termination consumer: initfiles,various @@ -2082,7 +2082,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_DRV_IMP_SPCKE</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Centaur Spare Clock Drive Impedance Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg. creator: VPD(MT) , mss_eff_cnfg_termination consumer: initfiles, various.C @@ -2099,7 +2099,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_RCV_IMP_DQ_DQS</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Centaur DQ and DQS Receiver Impedance Used in various locations and it comes from the VPD MT keyword for custom DIMMs or is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg. creator: VPD, mss_eff_cnfg_termination Consumer: initfile + C code @@ -2116,7 +2116,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_SLEW_RATE_DQ_DQS</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Centaur DQ and DQS Slew Rate Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Slowest slew rate is 0, incrementing by one. The lower the number the slower the slew rate the higher the faster. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg. creator: VPD(MT), mss_eff_cnfg_termination consumer: initfiles,various.C @@ -2137,7 +2137,7 @@ SLEW_MAXV_NS = 7</enum> <attribute> <id>ATTR_CEN_VPD_SLEW_RATE_ADDR</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Centaur Address Slew Rate Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Slowest slew rate is 0, incrementing by one. The lower the number the slower the slew rate the higher the faster. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg. creator: VPD(MT),mss_eff_cnfg_termination consumer: initfile,various .C files @@ -2158,7 +2158,7 @@ SLEW_MAXV_NS = 7</enum> <attribute> <id>ATTR_CEN_VPD_SLEW_RATE_CLK</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Centaur Clock Slew Rate Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Slowest slew rate is 0, incrementing by one. The lower the number the slower the slew rate the higher the faster. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg. creator: VPD(MT)mss_eff_cnfg_termination consumer: initfile,various.C files @@ -2179,7 +2179,7 @@ SLEW_MAXV_NS = 7</enum> <attribute> <id>ATTR_CEN_VPD_SLEW_RATE_SPCKE</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Centaur Spare Clock Slew Rate Used in various locations and comes from the MT keyword or is computed in mss_eff_cnfg_termination. Slowest slew rate is 0, incrementing by one. The lower the number the slower the slew rate the higher the faster. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg. creator: VPD(MT) or mss_eff_cnfg_termination consumer: initfile,various.C @@ -2201,7 +2201,7 @@ SLEW_MAXV_NS = 7 <attribute> <id>ATTR_CEN_VPD_SLEW_RATE_CNTL</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Centaur Control Slew Rate Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Slowest slew rate is 0, incrementing by one. The lower the number the slower the slew rate the higher the faster. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg. creator: VPD(MT),mss_eff_cnfg_termination consumer:initfile, various .C files @@ -2223,7 +2223,7 @@ SLEW_MAXV_NS = 7 <attribute> <id>ATTR_CEN_VPD_RD_VREF</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Centaur Read Vref. Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg. Creator: VPD(MT) or mss_eff_cnfg_termination consumer: various.C and initfiles @@ -2240,7 +2240,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M0_CLK_P0</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M0_CLK_P0</description> <valueType>uint8</valueType> <platInit/> @@ -2251,7 +2251,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M0_CLK_P1</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M0_CLK_P1</description> <valueType>uint8</valueType> <platInit/> @@ -2262,7 +2262,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M1_CLK_P0</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M1_CLK_P0</description> <valueType>uint8</valueType> <platInit/> @@ -2273,7 +2273,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M1_CLK_P1</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M1_CLK_P1</description> <valueType>uint8</valueType> <platInit/> @@ -2284,7 +2284,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M_CMD_A0</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_CMD_A0</description> <valueType>uint8</valueType> <platInit/> @@ -2295,7 +2295,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M_CMD_A1</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_CMD_A1</description> <valueType>uint8</valueType> <platInit/> @@ -2306,7 +2306,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M_CMD_A2</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_CMD_A2</description> <valueType>uint8</valueType> <platInit/> @@ -2317,7 +2317,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M_CMD_A3</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_CMD_A3</description> <valueType>uint8</valueType> <platInit/> @@ -2328,7 +2328,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M_CMD_A4</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_CMD_A4</description> <valueType>uint8</valueType> <platInit/> @@ -2339,7 +2339,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M_CMD_A5</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_CMD_A5</description> <valueType>uint8</valueType> <platInit/> @@ -2350,7 +2350,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M_CMD_A6</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_CMD_A6</description> <valueType>uint8</valueType> <platInit/> @@ -2361,7 +2361,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M_CMD_A7</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_CMD_A7</description> <valueType>uint8</valueType> <platInit/> @@ -2372,7 +2372,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M_CMD_A8</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_CMD_A8</description> <valueType>uint8</valueType> <platInit/> @@ -2383,7 +2383,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M_CMD_A9</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_CMD_A9</description> <valueType>uint8</valueType> <platInit/> @@ -2394,7 +2394,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M_CMD_A10</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_CMD_A10</description> <valueType>uint8</valueType> <platInit/> @@ -2405,7 +2405,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M_CMD_A11</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_CMD_A11</description> <valueType>uint8</valueType> <platInit/> @@ -2416,7 +2416,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M_CMD_A12</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_CMD_A12</description> <valueType>uint8</valueType> <platInit/> @@ -2427,7 +2427,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M_CMD_A13</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_CMD_A13</description> <valueType>uint8</valueType> <platInit/> @@ -2438,7 +2438,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M_CMD_A14</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_CMD_A14</description> <valueType>uint8</valueType> <platInit/> @@ -2449,7 +2449,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M_CMD_A15</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_CMD_A15</description> <valueType>uint8</valueType> <platInit/> @@ -2460,7 +2460,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M_CMD_BA0</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_CMD_BA0</description> <valueType>uint8</valueType> <platInit/> @@ -2471,7 +2471,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M_CMD_BA1</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_CMD_BA1</description> <valueType>uint8</valueType> <platInit/> @@ -2482,7 +2482,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M_CMD_BA2</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_CMD_BA2</description> <valueType>uint8</valueType> <platInit/> @@ -2493,7 +2493,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M_CMD_CASN</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_CMD_CASN</description> <valueType>uint8</valueType> <platInit/> @@ -2504,7 +2504,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M_CMD_RASN</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_CMD_RASN</description> <valueType>uint8</valueType> <platInit/> @@ -2515,7 +2515,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M_CMD_WEN</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_CMD_WEN</description> <valueType>uint8</valueType> <platInit/> @@ -2526,7 +2526,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M_PAR</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_PAR</description> <valueType>uint8</valueType> <platInit/> @@ -2537,7 +2537,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M_ACTN</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_ACTN</description> <valueType>uint8</valueType> <platInit/> @@ -2548,7 +2548,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M0_CNTL_CKE0</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M0_CNTL_CKE0</description> <valueType>uint8</valueType> <platInit/> @@ -2559,7 +2559,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M0_CNTL_CKE1</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M0_CNTL_CKE1</description> <valueType>uint8</valueType> <platInit/> @@ -2570,7 +2570,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M0_CNTL_CKE2</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M0_CNTL_CKE2</description> <valueType>uint8</valueType> <platInit/> @@ -2581,7 +2581,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M0_CNTL_CKE3</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M0_CNTL_CKE3</description> <valueType>uint8</valueType> <platInit/> @@ -2592,7 +2592,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M0_CNTL_CSN0</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M0_CNTL_CSN0</description> <valueType>uint8</valueType> <platInit/> @@ -2603,7 +2603,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M0_CNTL_CSN1</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M0_CNTL_CSN1</description> <valueType>uint8</valueType> <platInit/> @@ -2614,7 +2614,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M0_CNTL_CSN2</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M0_CNTL_CSN2</description> <valueType>uint8</valueType> <platInit/> @@ -2625,7 +2625,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M0_CNTL_CSN3</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M0_CNTL_CSN3</description> <valueType>uint8</valueType> <platInit/> @@ -2636,7 +2636,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M0_CNTL_ODT0</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M0_CNTL_ODT0</description> <valueType>uint8</valueType> <platInit/> @@ -2647,7 +2647,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M0_CNTL_ODT1</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M0_CNTL_ODT1</description> <valueType>uint8</valueType> <platInit/> @@ -2658,7 +2658,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M1_CNTL_CKE0</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M1_CNTL_CKE0</description> <valueType>uint8</valueType> <platInit/> @@ -2669,7 +2669,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M1_CNTL_CKE1</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M1_CNTL_CKE1</description> <valueType>uint8</valueType> <platInit/> @@ -2680,7 +2680,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M1_CNTL_CKE2</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M1_CNTL_CKE2</description> <valueType>uint8</valueType> <platInit/> @@ -2691,7 +2691,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M1_CNTL_CKE3</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M1_CNTL_CKE3</description> <valueType>uint8</valueType> <platInit/> @@ -2702,7 +2702,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M1_CNTL_CSN0</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M1_CNTL_CSN0</description> <valueType>uint8</valueType> <platInit/> @@ -2713,7 +2713,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M1_CNTL_CSN1</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M1_CNTL_CSN1</description> <valueType>uint8</valueType> <platInit/> @@ -2724,7 +2724,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M1_CNTL_CSN2</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M1_CNTL_CSN2</description> <valueType>uint8</valueType> <platInit/> @@ -2735,7 +2735,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M1_CNTL_CSN3</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M1_CNTL_CSN3</description> <valueType>uint8</valueType> <platInit/> @@ -2746,7 +2746,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M1_CNTL_ODT0</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M1_CNTL_ODT0</description> <valueType>uint8</valueType> <platInit/> @@ -2757,7 +2757,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_PHASE_ROT_M1_CNTL_ODT1</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M1_CNTL_ODT1</description> <valueType>uint8</valueType> <platInit/> @@ -2769,7 +2769,7 @@ This Attribute is to be interpreted as an Integer</description> <!-- <attribute> <id>ATTR_CEN_VPD_PERIODIC_MEMCAL_MODE_OPTIONS</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Settings for periodic CAL - zcal 1, syscal 1, centering 0, rdclk 1, dqs align 1, rdclk_update_dis 0, dutycycle 0, and power dis (dqs) 1. Second byte has repeat as 000, mpr mode as 0, mba as 11, and the spares as 00 </description> <valueType>uint32</valueType> @@ -2782,7 +2782,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_CKE_PRI_MAP</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>This value comes from the VPD keyword MT bytes 54 and 55 MT(54:55) for the Logical DIMM associated with port A. Bytes 118:119 for port B, 182:183 for port C and 246:247 for port D. In the end, the AB and CD portions form a 32 bit word for each mba to write into the corresponding ddrphy register</description> <valueType>uint32</valueType> <platInit/> @@ -2792,7 +2792,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_CKE_PWR_MAP</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>This value comes from the VPD keyword MT bytes 56 to 59 MT(56:59) for the Logical DIMM associated with port A. Bytes 120:123 for port B, 184:187 for port C and 248:251 for port D. The values for Port A concatenated with port B forms the value for one MBA. C concat D forms the value for the other MBA</description> <valueType>uint64</valueType> <platInit/> @@ -2801,7 +2801,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_GPO</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>This value comes from the VPD keyword MT bytes 61 MT(61) for the Logical DIMM associated with port A. Bytes 125 for port B, 189 for port C and 253 for port D</description> <valueType>uint8</valueType> <platInit/> @@ -2811,7 +2811,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_RLO</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>This value comes from the VPD keyword MT byte 60 bits 4:7 for the Logical DIMM associated with port A. Byte 124 bits 4:7 for port B, 188 bits 4:7 for port C and 252 bits 4:7 for port D</description> <valueType>uint8</valueType> <platInit/> @@ -2821,7 +2821,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_WLO</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>This value comes from the VPD keyword MT byte 60 bits 0:3 for the Logical DIMM associated with port A. Byte 124 bits 0:3 for port B, 188 bits 0:3 for port C and 252 bits 0:3 for port D</description> <valueType>uint8</valueType> <platInit/> @@ -2831,7 +2831,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_TSYS_ADR</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>This value comes from the VPD MR keyword byte 49 for ports A and B and byte 177 for port C and D. This means that all ADR blocks use this value on an mba level</description> <valueType>uint8</valueType> <platInit/> @@ -2841,7 +2841,7 @@ This Attribute is to be interpreted as an Integer</description> <attribute> <id>ATTR_CEN_VPD_TSYS_DP18</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>This value comes from the VPD MR keyword byte 113 for ports A and B and byte 241 for port C and D. This means all DP18 blocks use this value on a mba level</description> <valueType>uint8</valueType> <platInit/> @@ -2889,7 +2889,7 @@ Comes from the VPD MW Keyword</description> <attribute> <id>ATTR_CEN_VPD_DRAM_2N_MODE_ENABLED</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Describes if this MBA is in 2N address mode. The DIMM attributes associated with this MBA describes if this mode is needed for SI. Come from the VPD and consumed in the mba_def.initfile.</description> <valueType>uint8</valueType> <enum>FALSE = 0, TRUE = 1</enum> @@ -3074,7 +3074,7 @@ Data will be pulled from backplane VPD if IS DIMMs present.</description> <attribute> <id>ATTR_CEN_VPD_DIMM_RCD_IBT</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>RCD IBT. Used in mss_dram_init and is computed in mss_eff_cnfg. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg. Each dimm will have a value. creator: mss_eff_cnfg consumer: mss_dram_init @@ -3090,7 +3090,7 @@ firmware notes: none</description> <!-- <attribute> <id>ATTR_CEN_VPD_RD_CTR_WINDAGE_OFFSET</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Derived from calibration/characterization of read centering. Number of windage offset in units of pico-seconds[ps] with sign bit0 (0b0=positive, 0b1=negative) and value in bits1..31, so 0x80000023 for example would mean "-35ps". Can be overwritten by ODM vendors if done from VPD. Each port will have a value. creator: VPD consumer: mss_draminit_training_adv diff --git a/src/import/chips/centaur/procedures/xml/attribute_info/mss_mcbist_attributes.xml b/src/import/chips/centaur/procedures/xml/attribute_info/mss_mcbist_attributes.xml index 8cf8c85af..839bc0ae9 100644 --- a/src/import/chips/centaur/procedures/xml/attribute_info/mss_mcbist_attributes.xml +++ b/src/import/chips/centaur/procedures/xml/attribute_info/mss_mcbist_attributes.xml @@ -38,7 +38,7 @@ <attributes> <attribute> <id>ATTR_CEN_MCBIST_ADDR_MODES</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Can choose mcbist address mode for full,half or quarter addressing mode.</description> <valueType>uint8</valueType> <writeable/> @@ -47,7 +47,7 @@ <attribute> <id>ATTR_CEN_MCBIST_RANK</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description></description> <valueType>uint8</valueType> <writeable/> @@ -56,7 +56,7 @@ <attribute> <id>ATTR_CEN_MCBIST_START_ADDR</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Defines the start address for the Mcbist address range</description> <valueType>uint64</valueType> <writeable/> @@ -65,7 +65,7 @@ <attribute> <id>ATTR_CEN_MCBIST_END_ADDR</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Defines the end address for the Mcbist address range</description> <valueType>uint64</valueType> <writeable/> @@ -74,7 +74,7 @@ <attribute> <id>ATTR_CEN_MCBIST_ERROR_CAPTURE</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Enables error capture; basically a flag.</description> <valueType>uint8</valueType> <writeable/> @@ -83,7 +83,7 @@ <attribute> <id>ATTR_CEN_MCBIST_MAX_TIMEOUT</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Define mcbist Max timeout</description> <valueType>uint64</valueType> <writeable/> @@ -92,7 +92,7 @@ <attribute> <id>ATTR_CEN_MCBIST_PRINT_PORT</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Enable which port prints are required.</description> <valueType>uint8</valueType> <writeable/> @@ -101,7 +101,7 @@ <attribute> <id>ATTR_CEN_MCBIST_STOP_ON_ERROR</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Flag to stop Mcbist on Error.</description> <valueType>uint8</valueType> <writeable/> @@ -110,7 +110,7 @@ <attribute> <id>ATTR_CEN_MCBIST_DATA_SEED</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Define data seed for the random data pattern or test</description> <valueType>uint32</valueType> <writeable/> @@ -119,7 +119,7 @@ <attribute> <id>ATTR_CEN_MCBIST_ADDR_INTER</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>The address interleave map with user cases or deafult cases of BANK_RANK,RANK_BANK,BANK_ONLY,RANK_ONLYRANKS_DIMM0,RANKS_DIMM1,USER_PATTERN.</description> <valueType>uint8</valueType> <writeable/> @@ -128,7 +128,7 @@ <attribute> <id>ATTR_CEN_MCBIST_ADDR_NUM_ROWS</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>User defined constraint for limiting number of rows for addressing.</description> <valueType>uint8</valueType> <writeable/> @@ -137,7 +137,7 @@ <attribute> <id>ATTR_CEN_MCBIST_ADDR_NUM_COLS</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>User defined constraint for limiting number of columns for addressing.</description> <valueType>uint8</valueType> <writeable/> @@ -146,7 +146,7 @@ <attribute> <id>ATTR_CEN_MCBIST_ADDR_RANK</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>User defined constraint for limiting number of ranks for addressing.</description> <valueType>uint8</valueType> <writeable/> @@ -155,7 +155,7 @@ <attribute> <id>ATTR_CEN_MCBIST_ADDR_BANK</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>User defined constraint for limiting number of banks for addressing.</description> <valueType>uint8</valueType> <writeable/> @@ -164,7 +164,7 @@ <attribute> <id>ATTR_CEN_MCBIST_ADDR_SLAVE_RANK_ON</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>If slave ranks exists;Restrict usage or enable addressing on them as well.</description> <valueType>uint8</valueType> <writeable/> @@ -173,7 +173,7 @@ <attribute> <id>ATTR_CEN_MCBIST_ADDR_STR_MAP</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>To Define custom addressing map ; Input by user.</description> <valueType>uint64</valueType> <writeable/> @@ -182,7 +182,7 @@ <attribute> <id>ATTR_CEN_MCBIST_ADDR_RAND</id> - <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <targetType>TARGET_TYPE_MBA</targetType> <description>Flag for Addressing to go sequential manner or random.</description> <valueType>uint8</valueType> <writeable/> |
