diff options
Diffstat (limited to 'src')
2 files changed, 20 insertions, 11 deletions
diff --git a/src/usr/hwpf/hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete/proc_extract_pore_base_ffdc.C b/src/usr/hwpf/hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete/proc_extract_pore_base_ffdc.C index b366eac5e..1f2a38ccf 100644 --- a/src/usr/hwpf/hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete/proc_extract_pore_base_ffdc.C +++ b/src/usr/hwpf/hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete/proc_extract_pore_base_ffdc.C @@ -22,7 +22,7 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: proc_extract_pore_base_ffdc.C,v 1.3 2015/03/01 21:45:05 jmcgill Exp $ +// $Id: proc_extract_pore_base_ffdc.C,v 1.4 2015/04/22 14:14:25 jmcgill Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_extract_pore_base_ffdc.C,v $ //------------------------------------------------------------------------------ // *| @@ -123,6 +123,14 @@ fapi::ReturnCode proc_extract_pore_base_ffdc(const por_base_state & i_pore_state { if (i_pore_state.engine == SBE) { + uint8_t is_mpipl; + rc = FAPI_ATTR_GET(ATTR_IS_MPIPL, NULL, is_mpipl); + if (!rc.ok()) + { + FAPI_ERR("proc_extract_pore_base_ffdc: Error reading ATTR_IS_MPIPL"); + break; + } + const uint64_t & PNOR_ECCB_STATUS = i_pore_sbe_state.pnor_eccb_status.getDoubleWord(0); const uint64_t & SEEPROM_ECCB_STATUS = i_pore_sbe_state.i2cm_eccb_status.getDoubleWord(0); const uint8_t & SOFT_ERROR_STATUS = i_pore_sbe_state.soft_err; @@ -130,15 +138,16 @@ fapi::ReturnCode proc_extract_pore_base_ffdc(const por_base_state & i_pore_state if ((o_rc == fapi::RC_SBE_TRIGGER_WINKLE_HOSTBOOT_DID_NOT_RESPOND) || (o_rc == fapi::RC_SBE_TRIGGER_WINKLE_EX_DID_NOT_ENTER_WINKLE) || (o_rc == fapi::RC_SBE_TRIGGER_WINKLE_EX_WAKEUP_DID_NOT_HIT_GOTO) || - (o_rc == fapi::RC_SBE_TRIGGER_WINKLE_EX_WAKEUP_DID_NOT_FINISH)) + (o_rc == fapi::RC_SBE_TRIGGER_WINKLE_EX_WAKEUP_DID_NOT_FINISH) || + (is_mpipl)) { - FAPI_ERR("proc_extract_pore_base_ffdc: Collecting base FFDC for SBE deadman timer fail..."); - FAPI_ADD_INFO_TO_HWP_ERROR(o_rc, RC_PROC_EXTRACT_PORE_BASE_FFDC_SBE_DEADMAN); + FAPI_ERR("proc_extract_pore_base_ffdc: Collecting base FFDC for SBE fail (exclude TP ring)..."); + FAPI_ADD_INFO_TO_HWP_ERROR(o_rc, RC_PROC_EXTRACT_PORE_BASE_FFDC_SBE_WO_TP_DATA); } else { - FAPI_ERR("proc_extract_pore_base_ffdc: Collecting base FFDC for SBE non-deadman timer fail..."); - FAPI_ADD_INFO_TO_HWP_ERROR(o_rc, RC_PROC_EXTRACT_PORE_BASE_FFDC_SBE); + FAPI_ERR("proc_extract_pore_base_ffdc: Collecting base FFDC for SBE fail (include TP ring)..."); + FAPI_ADD_INFO_TO_HWP_ERROR(o_rc, RC_PROC_EXTRACT_PORE_BASE_FFDC_SBE_W_TP_DATA); } } else diff --git a/src/usr/hwpf/hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete/proc_extract_pore_base_ffdc.xml b/src/usr/hwpf/hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete/proc_extract_pore_base_ffdc.xml index 709eb0ac3..e52dcd870 100644 --- a/src/usr/hwpf/hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete/proc_extract_pore_base_ffdc.xml +++ b/src/usr/hwpf/hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete/proc_extract_pore_base_ffdc.xml @@ -22,7 +22,7 @@ <!-- permissions and limitations under the License. --> <!-- --> <!-- IBM_PROLOG_END_TAG --> -<!-- $Id: proc_extract_pore_base_ffdc.xml,v 1.3 2015/02/28 00:13:45 jmcgill Exp $ --> +<!-- $Id: proc_extract_pore_base_ffdc.xml,v 1.4 2015/04/22 14:14:58 jmcgill Exp $ --> <!-- Error definitions for proc_extract_pore_base_ffdc procedure --> <hwpErrors> <!-- *********************************************************************** --> @@ -79,9 +79,9 @@ </hwpError> <!-- *********************************************************************** --> <hwpError> - <rc>RC_PROC_EXTRACT_PORE_BASE_FFDC_SBE_DEADMAN</rc> + <rc>RC_PROC_EXTRACT_PORE_BASE_FFDC_SBE_WO_TP_DATA</rc> <description> - SBE specific register FFDC to collect (via chip target) on all deadman timer fails + SBE specific register FFDC to collect (via chip target) on all fails, exclude TP ring data </description> <ffdc>PNOR_ECCB_STATUS</ffdc> <ffdc>SEEPROM_ECCB_STATUS</ffdc> @@ -96,9 +96,9 @@ </hwpError> <!-- *********************************************************************** --> <hwpError> - <rc>RC_PROC_EXTRACT_PORE_BASE_FFDC_SBE</rc> + <rc>RC_PROC_EXTRACT_PORE_BASE_FFDC_SBE_W_TP_DATA</rc> <description> - SBE specific register FFDC to collect (via chip target) on all non-deadman timer fails + SBE specific register FFDC to collect (via chip target) on all fails, include TP ring data </description> <ffdc>PNOR_ECCB_STATUS</ffdc> <ffdc>SEEPROM_ECCB_STATUS</ffdc> |