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-rw-r--r--src/include/usr/hwpf/hwp/utility_procedures/mss_maint_cmds.H10
-rw-r--r--src/usr/hwpf/hwp/dmi_training/dmi_training.C2
-rw-r--r--src/usr/hwpf/hwp/utility_procedures/mss_maint_cmds.C26
-rw-r--r--src/usr/hwpf/hwp/utility_procedures/mss_unmask_errors.C42
-rw-r--r--src/usr/scom/scomtrans.C30
-rw-r--r--src/usr/scom/scomtrans.H10
6 files changed, 91 insertions, 29 deletions
diff --git a/src/include/usr/hwpf/hwp/utility_procedures/mss_maint_cmds.H b/src/include/usr/hwpf/hwp/utility_procedures/mss_maint_cmds.H
index 217ff2423..87d3e9018 100644
--- a/src/include/usr/hwpf/hwp/utility_procedures/mss_maint_cmds.H
+++ b/src/include/usr/hwpf/hwp/utility_procedures/mss_maint_cmds.H
@@ -20,7 +20,7 @@
/* Origin: 30 */
/* */
/* IBM_PROLOG_END_TAG */
-// $Id: mss_maint_cmds.H,v 1.17 2013/08/23 19:44:02 gollub Exp $
+// $Id: mss_maint_cmds.H,v 1.18 2013/10/31 20:42:15 gollub Exp $
//------------------------------------------------------------------------------
// Don't forget to create CVS comments when you check in your changes!
//------------------------------------------------------------------------------
@@ -54,6 +54,10 @@
// | | | Added mss_stopCmd
// | | | Changed setupAndExecuteCmd to pure virtual
// 1.17 | 08/23/13 | gollub | Added x4 ECC mode support: mss_x4_chip_mark_to_centaurDQ
+// 1.18 | 10/31/13 | gollub | Removed support for stop condition enum
+// | | | ENABLE_CMD_COMPLETE_ATTENTION_ON_CLEAN_AND_ERROR
+
+
#ifndef _MSS_MAINT_CMDS_H
#define _MSS_MAINT_CMDS_H
@@ -270,10 +274,6 @@ class mss_MaintCmd
// Enable command complete attention
ENABLE_CMD_COMPLETE_ATTENTION = 0x0008,
- // Enable command complete attention for both stop clean, and stop
- // due to error
- ENABLE_CMD_COMPLETE_ATTENTION_ON_CLEAN_AND_ERROR = 0x0004,
-
};
/**
diff --git a/src/usr/hwpf/hwp/dmi_training/dmi_training.C b/src/usr/hwpf/hwp/dmi_training/dmi_training.C
index faea2dc59..726e6b685 100644
--- a/src/usr/hwpf/hwp/dmi_training/dmi_training.C
+++ b/src/usr/hwpf/hwp/dmi_training/dmi_training.C
@@ -1238,7 +1238,7 @@ void* call_cen_set_inband_addr( void *io_pArgs )
// (Chip is >=DD20 OR IBSCOM Override is set)
if ((membufChips[i]->getAttr<ATTR_PRIMARY_CAPABILITIES>()
.supportsInbandScom) &&
- ((membufChips[i]->getAttr<TARGETING::ATTR_EC>() >= 0x20) ||
+ (// TODO: RTC 68984: Disable IBSCOM for now (membufChips[i]->getAttr<TARGETING::ATTR_EC>() >= 0x20) ||
(sys->getAttr<TARGETING::ATTR_IBSCOM_ENABLE_OVERRIDE>() != 0))
)
{
diff --git a/src/usr/hwpf/hwp/utility_procedures/mss_maint_cmds.C b/src/usr/hwpf/hwp/utility_procedures/mss_maint_cmds.C
index 71290b4cc..c1d722930 100644
--- a/src/usr/hwpf/hwp/utility_procedures/mss_maint_cmds.C
+++ b/src/usr/hwpf/hwp/utility_procedures/mss_maint_cmds.C
@@ -20,7 +20,7 @@
/* Origin: 30 */
/* */
/* IBM_PROLOG_END_TAG */
-// $Id: mss_maint_cmds.C,v 1.27 2013/09/03 19:57:39 gollub Exp $
+// $Id: mss_maint_cmds.C,v 1.28 2013/10/31 20:42:54 gollub Exp $
//------------------------------------------------------------------------------
// Don't forget to create CVS comments when you check in your changes!
//------------------------------------------------------------------------------
@@ -78,6 +78,11 @@
// | | | Updated random data seed
// | | | Ordered display output by beat 0-7
// 1.27 | 09/03/13 | gollub | Removed unused variables
+// 1.28 | 10/31/13 | gollub | Removed support for stop condition enum
+// | | | ENABLE_CMD_COMPLETE_ATTENTION_ON_CLEAN_AND_ERROR
+// | | | DD2: enable (fixed)
+// | | | DD1: disable (broken)
+
//------------------------------------------------------------------------------
// Includes
@@ -1156,8 +1161,17 @@ fapi::ReturnCode mss_MaintCmd::loadStopCondMask()
fapi::ReturnCode l_rc;
uint32_t l_ecmd_rc = 0;
ecmdDataBufferBase l_mbasctlq(64);
+ uint8_t l_mbspa_0_fixed_for_dd2 = 0;
FAPI_INF("ENTER mss_MaintCmd::loadStopCondMask()");
+
+ // Get attribute that tells us if mbspa 0 cmd complete attention is fixed for dd2
+ l_rc = FAPI_ATTR_GET(ATTR_CENTAUR_EC_HW217608_MBSPA_0_CMD_COMPLETE_ATTN_FIXED, &iv_targetCentaur, l_mbspa_0_fixed_for_dd2);
+ if(l_rc)
+ {
+ FAPI_ERR("Error getting ATTR_CENTAUR_EC_HW217608_MBSPA_0_CMD_COMPLETE_ATTN_FIXED");
+ return l_rc;
+ }
// Get stop conditions from MBASCTLQ
l_rc = fapiGetScom(iv_target, MBA01_MBASCTLQ_0x0301060F, l_mbasctlq);
@@ -1219,9 +1233,13 @@ fapi::ReturnCode mss_MaintCmd::loadStopCondMask()
if ( 0 != (iv_stopCondition & STOP_ON_SUE) )
l_ecmd_rc |= l_mbasctlq.setBit(12);
- // Enable command complete attention on clean and error
- if ( 0 != (iv_stopCondition & ENABLE_CMD_COMPLETE_ATTENTION_ON_CLEAN_AND_ERROR) )
- l_ecmd_rc |= l_mbasctlq.setBit(16);
+ // Command complete attention on clean and error
+ // DD2: enable (fixed)
+ // DD1: disable (broken)
+ if (l_mbspa_0_fixed_for_dd2)
+ {
+ l_ecmd_rc |= l_mbasctlq.setBit(16);
+ }
if(l_ecmd_rc)
{
diff --git a/src/usr/hwpf/hwp/utility_procedures/mss_unmask_errors.C b/src/usr/hwpf/hwp/utility_procedures/mss_unmask_errors.C
index 12f15df6f..e15e0b327 100644
--- a/src/usr/hwpf/hwp/utility_procedures/mss_unmask_errors.C
+++ b/src/usr/hwpf/hwp/utility_procedures/mss_unmask_errors.C
@@ -20,7 +20,7 @@
/* Origin: 30 */
/* */
/* IBM_PROLOG_END_TAG */
-// $Id: mss_unmask_errors.C,v 1.4 2013/10/22 18:55:06 gollub Exp $
+// $Id: mss_unmask_errors.C,v 1.5 2013/10/31 20:41:25 gollub Exp $
//------------------------------------------------------------------------------
// Don't forget to create CVS comments when you check in your changes!
//------------------------------------------------------------------------------
@@ -36,6 +36,7 @@
// 1.3 | 03/08/13 | gollub | Masking MBSPA[0] for DD1, and using MBSPA[8] instead.
// 1.4 | 10/22/13 | gollub | Keep maint ECC errors masked, since PRD intends
// | | | to use cmd complete attention instead.
+// 1.5 | 10/31/13 | gollub | For DD1 use MBSPA[8], for DD2 using MBSPA[0].
//------------------------------------------------------------------------------
// Includes
@@ -1472,7 +1473,17 @@ fapi::ReturnCode mss_unmask_maint_errors(const fapi::Target & i_target,
ecmdDataBufferBase l_mbeccfir_action0(64);
ecmdDataBufferBase l_mbeccfir_action1(64);
+ uint8_t l_mbspa_0_fixed_for_dd2 = 0;
+ // Get attribute that tells us if mbspa 0 cmd complete attention is fixed for dd2
+ l_rc = FAPI_ATTR_GET(ATTR_CENTAUR_EC_HW217608_MBSPA_0_CMD_COMPLETE_ATTN_FIXED, &i_target, l_mbspa_0_fixed_for_dd2);
+ if(l_rc)
+ {
+ FAPI_ERR("Error getting ATTR_CENTAUR_EC_HW217608_MBSPA_0_CMD_COMPLETE_ATTN_FIXED");
+ // Log passed in error before returning with new error
+ if (i_bad_rc) fapiLogError(i_bad_rc);
+ return l_rc;
+ }
// Get associated functional MBAs on this centaur
l_rc = fapiGetChildChiplets(i_target,
@@ -1682,7 +1693,7 @@ fapi::ReturnCode mss_unmask_maint_errors(const fapi::Target & i_target,
//*************************
//*************************
- // MBASPA
+ // MBSPA
//*************************
//*************************
@@ -1703,11 +1714,15 @@ fapi::ReturnCode mss_unmask_maint_errors(const fapi::Target & i_target,
// to be valid errors for PRD to log.
- // 0 Command_Complete mask (broken on DD1)
- // NOTE: This bit broken in DD1.
- // It can be made to come on when cmd completes clean, or make to come
- // on when cmd stops on error, but can't be set to do both.
- l_ecmd_rc |= l_mbaspa_mask.setBit(0);
+ // 0 Command_Complete
+ if (l_mbspa_0_fixed_for_dd2)
+ {
+ l_ecmd_rc |= l_mbaspa_mask.clearBit(0); // DD2: unmask (fixed)
+ }
+ else
+ {
+ l_ecmd_rc |= l_mbaspa_mask.setBit(0); // DD1: masked (broken)
+ }
// 1 Hard_CE_ETE_Attn mask (forever)
// NOTE: FW wants to mask these and rely instead on detecting the
@@ -1747,10 +1762,15 @@ fapi::ReturnCode mss_unmask_maint_errors(const fapi::Target & i_target,
// 7 Firmware_Attn1 masked (forever)
l_ecmd_rc |= l_mbaspa_mask.setBit(7);
- // 8 wat_debug_attn unmasked
- // NOTE: DD1 workaround for broken bit 0. This bit will come on whenever
- // cmd stops, either stop clean or stop on error.
- l_ecmd_rc |= l_mbaspa_mask.clearBit(8);
+ // 8 wat_debug_attn
+ if (l_mbspa_0_fixed_for_dd2)
+ {
+ l_ecmd_rc |= l_mbaspa_mask.setBit(8); // DD2: masked (workaround for mbspa 0 not needed)
+ }
+ else
+ {
+ l_ecmd_rc |= l_mbaspa_mask.clearBit(8); // DD1: unmasked (workaround for mbspa 0 needed)
+ }
// 9 Spare_Attn1 masked (forever)
l_ecmd_rc |= l_mbaspa_mask.setBit(9);
diff --git a/src/usr/scom/scomtrans.C b/src/usr/scom/scomtrans.C
index 694d1fafe..024b2cd54 100644
--- a/src/usr/scom/scomtrans.C
+++ b/src/usr/scom/scomtrans.C
@@ -414,6 +414,9 @@ errlHndl_t scomTranslate(DeviceFW::OperationType i_opType,
// SCOM_TRANS_MBA_MASK = 0xFFFFFFFF7FFFFC00,
// SCOM_TRANS_MBA_BASEADDR = 0x0000000003010400,
//
+ // SCOM_TRANS_TCM_MBA_MASK = 0xFFFFFFFFFFFFFC00
+ // SCOM_TRANS_TCM_MBA_BASEADDR = 0x0000000003010800
+ //
// In the XML.. the
// <default>physical:sys-0/node-0/membuf-10/mbs-0/mba-1</default>
//
@@ -422,8 +425,10 @@ errlHndl_t scomTranslate(DeviceFW::OperationType i_opType,
//
// 0x00000000_03010400 MBA 0 # MBA01
// 0x00000000_03010C00 MBA 1 # MBA23
- //
- //
+
+ // 0x00000000_03010880 MBA 0 # Trace for MBA01
+ // 0x00000000_030110C0 MBA 1 # Trace for MBA23
+
// 0x00000000_03011400 MBA 0 # DPHY01 (indirect addressing)
// 0x00000000_03011800 MBA 1 # DPHY23 (indirect addressing)
@@ -433,13 +438,13 @@ errlHndl_t scomTranslate(DeviceFW::OperationType i_opType,
// 0x80000000_0701143f MBA 0 # DPHY01 (indirect addressing)
// 0x80000000_0701183f MBA 1 # DPHY23 (indirect addressing)
//
+
// SCOM_TRANS_IND_MBA_MASK = 0x80000000FFFFFFFF,
// SCOM_TRANS_IND_MBA_BASEADDR = 0x800000000301143f,
-
- // check to see that the Address is in the correct direct
- // scom MBA address range.
- if ((i_addr & SCOM_TRANS_MBA_MASK) == SCOM_TRANS_MBA_BASEADDR)
+ // check to see that the Address is in the correct direct
+ // scom MBA address range.
+ if ( (i_addr & SCOM_TRANS_MBA_MASK) == SCOM_TRANS_MBA_BASEADDR )
{
l_err = scomPerformTranslate(epath,
@@ -450,6 +455,19 @@ errlHndl_t scomTranslate(DeviceFW::OperationType i_opType,
i_target,
i_addr );
}
+
+ // New TCM MBA registers for DD2.0
+ else if ( (i_addr & SCOM_TRANS_TCM_MBA_MASK) ==
+ SCOM_TRANS_TCM_MBA_BASEADDR )
+ {
+ l_instance = epath.pathElementOfType(TARGETING::TYPE_MBA).instance;
+ i_addr = i_addr + (l_instance * SCOM_TRANS_TCM_MBA_OFFSET);
+ // Call to set the target to the parent target type
+ l_err = scomfindParentTarget(epath,
+ TARGETING::TYPE_MEMBUF,
+ i_target);
+ }
+
// check to see if valid MBA 0 indirect address range
else if ((i_addr & SCOM_TRANS_IND_MBA_MASK) ==
SCOM_TRANS_IND_MBA_BASEADDR)
diff --git a/src/usr/scom/scomtrans.H b/src/usr/scom/scomtrans.H
index 473b0c6a9..d5a5413f7 100644
--- a/src/usr/scom/scomtrans.H
+++ b/src/usr/scom/scomtrans.H
@@ -5,7 +5,7 @@
/* */
/* IBM CONFIDENTIAL */
/* */
-/* COPYRIGHT International Business Machines Corp. 2011,2012 */
+/* COPYRIGHT International Business Machines Corp. 2011,2013 */
/* */
/* p1 */
/* */
@@ -38,11 +38,12 @@ namespace SCOM
SCOM_TRANS_EX_MASK = 0xFFFFFFFF7F000000,
SCOM_TRANS_MCS_MASK = 0xFFFFFFFF7FFFFF80,
SCOM_TRANS_MBA_MASK = 0xFFFFFFFF7FFFFC00,
+ SCOM_TRANS_TCM_MBA_MASK = 0xFFFFFFFFFFFFFC00,
SCOM_TRANS_XBUS_MASK = 0x00000000FFFFFC00,
SCOM_TRANS_IND_MCS_DMI_MASK = 0x80000060FFFFFFFF,
SCOM_TRANS_IND_MBA_MASK = 0x80000000FFFFFFFF,
SCOM_TRANS_ABUS_MASK = 0x00000060FFFFFC00,
- SCOM_TRANS_INDIRECT_MASK = 0x8000000000000000,
+ SCOM_TRANS_INDIRECT_MASK = 0x8000000000000000,
};
enum ScomTransBaseAddr
@@ -52,6 +53,7 @@ namespace SCOM
SCOM_TRANS_MCS_DMI_BASEADDR = 0x0000000002011A00,
SCOM_TRANS_IND_MCS_BASEADDR = 0x8000006002011A00,
SCOM_TRANS_MBA_BASEADDR = 0x0000000003010400,
+ SCOM_TRANS_TCM_MBA_BASEADDR = 0x0000000003010800,
SCOM_TRANS_XBUS_BASEADDR = 0x0000000004011000,
SCOM_TRANS_ABUS_BASEADDR = 0x0000000008010C00,
SCOM_TRANS_IND_MBA_BASEADDR = 0x800000000301143f,
@@ -59,6 +61,10 @@ namespace SCOM
SCOM_TRANS_INDIRECT_ADDRESS = 0x8000000000000000,
};
+ enum ScomTransOffset
+ {
+ SCOM_TRANS_TCM_MBA_OFFSET = 0x840,
+ };
/**
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