diff options
Diffstat (limited to 'src')
7 files changed, 122 insertions, 0 deletions
diff --git a/src/import/chips/p9/common/include/p9_mc_scom_addresses_fld_fixes.H b/src/import/chips/p9/common/include/p9_mc_scom_addresses_fld_fixes.H index f12a956ff..69deff6da 100644 --- a/src/import/chips/p9/common/include/p9_mc_scom_addresses_fld_fixes.H +++ b/src/import/chips/p9/common/include/p9_mc_scom_addresses_fld_fixes.H @@ -64,5 +64,11 @@ REG64_FLD( MCBIST_MCBCFGQ_CFG_MCBIST_CFG_FORCE_PAUSE_AFTER_RANK , 34 , SH_UN REG64_FLD( MCBIST_MBSTRQ_CFG_PAUSE_ON_MCE , 33 , SH_UNT_MCBIST , SH_ACS_SCOM_RW , SH_FLD_CFG_PAUSE_ON_MCE ); +REG64_FLD( MCS_MCMODE0_GROUP_INTERLEAVE_GRANULARITY , 52 , SH_UNT_MCS , SH_ACS_SCOM_RW , + 0 ); +REG64_FLD( MCS_MCMODE0_GROUP_INTERLEAVE_GRANULARITY_LEN , 4 , SH_UNT_MCS , SH_ACS_SCOM_RW , + 0 ); + + #endif diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H index 4a04556a9..87307fafb 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H @@ -27969,6 +27969,30 @@ fapi_try_exit: } /// +/// @brief ATTR_MSS_INTERLEAVE_GRANULARITY getter +/// @param[out] uint8_t& reference to store the value +/// @note Generated by gen_accessors.pl generateParameters (SYSTEM) +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note Determines the stride covered by each granule in an interleaving group. The +/// default stride -- 128B -- is the only value intended for production FW use. All +/// other combinations are for experimental performance evaluation. Regardless of +/// this attribute value, groups of size 1, 3, and 6 will be forced to 128B stride +/// based on the logic +/// capabilities. +/// +inline fapi2::ReturnCode mss_interleave_granularity(uint8_t& o_value) +{ + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_INTERLEAVE_GRANULARITY, fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>(), o_value) ); + return fapi2::current_err; + +fapi_try_exit: + FAPI_ERR("failed accessing ATTR_MSS_INTERLEAVE_GRANULARITY: 0x%lx (system target)", + uint64_t(fapi2::current_err)); + return fapi2::current_err; +} + +/// /// @brief ATTR_MRW_HW_MIRRORING_ENABLE getter /// @param[out] uint8_t& reference to store the value /// @note Generated by gen_accessors.pl generateParameters (SYSTEM) diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_mss_setup_bars.C b/src/import/chips/p9/procedures/hwp/nest/p9_mss_setup_bars.C index 513f9d5b5..161b64a34 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9_mss_setup_bars.C +++ b/src/import/chips/p9/procedures/hwp/nest/p9_mss_setup_bars.C @@ -901,6 +901,13 @@ fapi2::ReturnCode writeMCBarData( fapi2::ReturnCode l_rc; fapi2::buffer<uint64_t> l_scomData(0); + fapi2::ATTR_MSS_INTERLEAVE_GRANULARITY_Type l_interleave_granule_size; + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_MSS_INTERLEAVE_GRANULARITY, + fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>(), + l_interleave_granule_size), + "Error getting ATTR_MSS_INTERLEAVE_GRANULARITY, l_rc 0x%.8X", + (uint64_t)fapi2::current_err); + for (auto l_pair : i_mcBarDataPair) { fapi2::Target<fapi2::TARGET_TYPE_MCS> l_target = l_pair.first; @@ -935,6 +942,21 @@ fapi2::ReturnCode writeMCBarData( l_scomData.insertFromRight<MCS_MCFGP_GROUP_BASE_ADDRESS, MCS_MCFGP_GROUP_BASE_ADDRESS_LEN>( (l_data.MCFGP_groupBaseAddr >> 2)); + + // configure interleave granularity if 2/4/8 MC per group only + if ((l_data.MCFGP_chan_per_group == 0b0100) || // 2 MC/group + (l_data.MCFGP_chan_per_group == 0b0101) || + (l_data.MCFGP_chan_per_group == 0b0110) || // 4 MC/group + (l_data.MCFGP_chan_per_group == 0b1000)) // 8 MC/group + { + fapi2::buffer<uint64_t> l_mcmode0_scom_data; + FAPI_TRY(fapi2::getScom(l_target, MCS_MCMODE0, l_mcmode0_scom_data), + "Error reading from MCS_MCMODE0 reg"); + l_mcmode0_scom_data.insertFromRight<MCS_MCMODE0_GROUP_INTERLEAVE_GRANULARITY, + MCS_MCMODE0_GROUP_INTERLEAVE_GRANULARITY_LEN>(l_interleave_granule_size); + FAPI_TRY(fapi2::putScom(l_target, MCS_MCMODE0, l_mcmode0_scom_data), + "Error writing to MCS_MCMODE0 reg"); + } } // Channel per group (bits 1:4) diff --git a/src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml index 66db2ff2f..bfe0596f2 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml @@ -931,6 +931,36 @@ </attribute> <!-- ********************************************************************** --> <attribute> + <id>ATTR_MSS_INTERLEAVE_GRANULARITY</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description> + Determines the stride covered by each granule in an interleaving + group. The default stride -- 128B -- is the only value intended for + production FW use. All other combinations are for experimental + performance evaluation. + + Regardless of this attribute value, groups of size 1, 3, and 6 + will be forced to 128B stride based on the logic capabilities. + </description> + <valueType>uint8</valueType> + <platInit/> + <odmVisable/> + <odmChangeable/> + <enum> + 128_B = 0x00, + 256_B = 0x01, + 512_B = 0x02, + 1_KB = 0x03, + 2_KB = 0x04, + 4_KB = 0x05, + 8_KB = 0x06, + 16_KB = 0x07, + 32_KB = 0x08 + </enum> + <initToZero/> +</attribute> +<!-- ********************************************************************** --> +<attribute> <id>ATTR_MSS_MEM_MC_IN_GROUP</id> <targetType>TARGET_TYPE_PROC_CHIP</targetType> <description> diff --git a/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml b/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml index 644199b88..9847420cd 100644 --- a/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml +++ b/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml @@ -233,6 +233,11 @@ <default>0x3C</default> </attribute> + <attribute> + <id>ATTR_MSS_INTERLEAVE_GRANULARITY</id> + <default>0x00</default> + </attribute> + <!-- ===================================================================== End of temporary definitions ================================================================= --> diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml index 17fb66c2d..f2083ac0a 100644 --- a/src/usr/targeting/common/xmltohb/attribute_types.xml +++ b/src/usr/targeting/common/xmltohb/attribute_types.xml @@ -10081,6 +10081,40 @@ firmware notes: Used as override attribute for pstate procedure </attribute> <attribute> + <id>MSS_INTERLEAVE_GRANULARITY</id> + <description> + Determines the stride covered by each granule in an interleaving + group. The default stride -- 128B -- is the only value intended for + production FW use. All other combinations are for experimental + performance evaluation. + + Regardless of this attribute value, groups of size 1, 3, and 6 + will be forced to 128B stride based on the logic capabilities. + + 128_B = 0x00, + 256_B = 0x01, + 512_B = 0x02, + 1_KB = 0x03, + 2_KB = 0x04, + 4_KB = 0x05, + 8_KB = 0x06, + 16_KB = 0x07, + 32_KB = 0x08 + </description> + <simpleType> + <uint8_t> + </uint8_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_INTERLEAVE_GRANULARITY</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> <id>MSS_MBA_ADDR_INTERLEAVE_BIT</id> <description>sets the Centaur address bits used to interleave addresses between MBA01 and MBA23. valid values are 23 through 32.</description> <simpleType> diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml index 7c41b78d7..c9e23ab12 100755 --- a/src/usr/targeting/common/xmltohb/target_types.xml +++ b/src/usr/targeting/common/xmltohb/target_types.xml @@ -841,6 +841,7 @@ <attribute><id>MSS_VOLT_VPP_SLOPE</id></attribute> <attribute><id>MSS_VOLT_VPP_INTERCEPT</id></attribute> <attribute><id>MSS_INTERLEAVE_ENABLE</id></attribute> + <attribute><id>MSS_INTERLEAVE_GRANULARITY</id></attribute> <!-- Enable memory voltages --> <attribute><id>SUPPORTS_DYNAMIC_MEM_VOLT</id></attribute> |
