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-rw-r--r--src/import/chips/p9a/procedures/hwp/memory/p9a_mss_freq_system.C23
-rw-r--r--src/import/chips/p9a/procedures/hwp/memory/p9a_mss_freq_system.H32
-rw-r--r--src/import/chips/p9a/procedures/hwp/memory/p9a_mss_volt.mk7
3 files changed, 62 insertions, 0 deletions
diff --git a/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_freq_system.C b/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_freq_system.C
index 2628cbd7e..cc23976d8 100644
--- a/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_freq_system.C
+++ b/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_freq_system.C
@@ -22,3 +22,26 @@
/* permissions and limitations under the License. */
/* */
/* IBM_PROLOG_END_TAG */
+
+///
+/// @file p9a_mss_freq_system.C
+/// @brief Matches OMI freq with DDR freq
+///
+// *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com>
+// *HWP HWP Backup: Louis Stermole <stermole@us.ibm.com>
+// *HWP Team: Memory
+// *HWP Level: 1
+// *HWP Consumed by: FSP:HB
+
+// fapi2
+#include <p9a_mss_freq_system.H>
+
+///
+/// @brief Matches OMI freq with DDR freq
+/// @param[in] i_target controller (e.g. MC)
+/// @return FAPI2_RC_SUCCESS iff ok
+///
+fapi2::ReturnCode p9a_mss_freq_system( const fapi2::Target<fapi2::TARGET_TYPE_MC>& i_target )
+{
+ return fapi2::FAPI2_RC_SUCCESS;
+}
diff --git a/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_freq_system.H b/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_freq_system.H
index 6d2083406..11d6230fd 100644
--- a/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_freq_system.H
+++ b/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_freq_system.H
@@ -22,3 +22,35 @@
/* permissions and limitations under the License. */
/* */
/* IBM_PROLOG_END_TAG */
+
+///
+/// @file p9a_mss_freq_system.H
+/// @brief Matches OMI freq with DDR freq
+///
+// *HWP HWP Owner: Louis Stermole <stermole@us.ibm.com>
+// *HWP HWP Backup: Andre A. Marin <aamarin@us.ibm.com>
+// *HWP Team: Memory
+// *HWP Level: 1
+// *HWP Consumed by: FSP:HB
+
+#ifndef P9A_MSS_FREQ_SYSTEM_H_
+#define P9A_MSS_FREQ_SYSTEM_H_
+
+#include <fapi2.H>
+#include <vector>
+
+typedef fapi2::ReturnCode (*p9a_mss_freq_system_FP_t) (const fapi2::Target<fapi2::TARGET_TYPE_MC>&);
+
+extern "C"
+{
+
+ ///
+ /// @brief Matches OMI freq with DDR freq
+ /// @param[in] i_target controller (e.g. MC)
+ /// @return FAPI2_RC_SUCCESS iff ok
+ ///
+ fapi2::ReturnCode p9a_mss_freq_system(const fapi2::Target<fapi2::TARGET_TYPE_MC>& i_target);
+
+}
+
+#endif
diff --git a/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_volt.mk b/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_volt.mk
index 2e2e42310..045691c45 100644
--- a/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_volt.mk
+++ b/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_volt.mk
@@ -22,3 +22,10 @@
# permissions and limitations under the License.
#
# IBM_PROLOG_END_TAG
+
+# Include the macros and things for MSS procedures
+-include 00p9a_common.mk
+
+PROCEDURE=p9a_mss_volt
+$(eval $(call ADD_MEMORY_INCDIRS,$(PROCEDURE)))
+$(call BUILD_PROCEDURE)
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