diff options
Diffstat (limited to 'src/usr')
-rw-r--r-- | src/usr/hwpf/hwp/chip_attributes.xml | 34 | ||||
-rw-r--r-- | src/usr/hwpf/hwp/freq_attributes.xml | 103 | ||||
-rw-r--r-- | src/usr/hwpf/hwp/proc_mvpd_attributes.xml | 39 | ||||
-rw-r--r-- | src/usr/hwpf/hwp/system_attributes.xml | 56 | ||||
-rw-r--r-- | src/usr/hwpf/makefile | 4 | ||||
-rw-r--r-- | src/usr/targeting/xmltohb/attribute_types.xml | 286 | ||||
-rw-r--r-- | src/usr/targeting/xmltohb/makefile | 4 | ||||
-rw-r--r-- | src/usr/targeting/xmltohb/simics_SALERNO.system.xml | 12 | ||||
-rw-r--r-- | src/usr/targeting/xmltohb/simics_VENICE.system.xml | 92 | ||||
-rw-r--r-- | src/usr/targeting/xmltohb/target_types.xml | 27 | ||||
-rw-r--r-- | src/usr/targeting/xmltohb/vbu.system.xml | 36 | ||||
-rwxr-xr-x | src/usr/targeting/xmltohb/xmltohb.pl | 7 |
12 files changed, 685 insertions, 15 deletions
diff --git a/src/usr/hwpf/hwp/chip_attributes.xml b/src/usr/hwpf/hwp/chip_attributes.xml index 28d13ad83..6745da328 100644 --- a/src/usr/hwpf/hwp/chip_attributes.xml +++ b/src/usr/hwpf/hwp/chip_attributes.xml @@ -30,7 +30,10 @@ <attribute> <id>ATTR_EC</id> <targetType>TARGET_TYPE_PROC_CHIP,TARGET_TYPE_MEMBUF_CHIP</targetType> - <description>EC level of a chip target</description> + <description> + EC level of a chip target + Read from the chip by the platform + </description> <valueType>uint8</valueType> <platInit/> <persistRuntime/> @@ -39,10 +42,37 @@ <attribute> <id>ATTR_FSI_GP_REG_SCOM_ACCESS</id> <targetType>TARGET_TYPE_PROC_CHIP,TARGET_TYPE_MEMBUF_CHIP</targetType> - <description>Indicates if the target's FSI GP regs have scom access</description> + <description> + Indicates if the target's FSI GP regs have scom access + Provided by the Machine Readable Workbook. + </description> <valueType>uint8</valueType> <enum>false = 0, true = 1</enum> <platInit/> <persistRuntime/> </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_FABRIC_NODE_ID</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + Logical fabric node the chip belongs to. + Provided by the Machine Readable Workbook. + Can vary across drawers. + </description> + <valueType>uint8</valueType> + <platInit/> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_FABRIC_CHIP_ID</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + Logical fabric chip id for this chip (position within the fabric). + Provided by the Machine Readable Workbook. + Can vary across drawers. + </description> + <valueType>uint8</valueType> + <platInit/> + </attribute> </attributes> diff --git a/src/usr/hwpf/hwp/freq_attributes.xml b/src/usr/hwpf/hwp/freq_attributes.xml new file mode 100644 index 000000000..fde70fd10 --- /dev/null +++ b/src/usr/hwpf/hwp/freq_attributes.xml @@ -0,0 +1,103 @@ +<!-- IBM_PROLOG_BEGIN_TAG + This is an automatically generated prolog. + + $Source: src/usr/hwpf/hwp/freq_attributes.xml $ + + IBM CONFIDENTIAL + + COPYRIGHT International Business Machines Corp. 2012 + + p1 + + Object Code Only (OCO) source materials + Licensed Internal Code Source Materials + IBM HostBoot Licensed Internal Code + + The source code for this program is not published or other- + wise divested of its trade secrets, irrespective of what has + been deposited with the U.S. Copyright Office. + + Origin: 30 + + IBM_PROLOG_END --> +<!-- + XML file specifying HWPF attributes. + These are frequency attributes. +--> + +<attributes> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_FREQ_PROC_REFCLOCK</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description> + The frequency of the processor refclock in MHz. + Provided by the Machine Readable Workbook. + This is read by the set_ref_clock HWP to find out the desired frequency. + This can be overridden to adjust the refclock frequency. + </description> + <valueType>uint32</valueType> + <platInit/> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_FREQ_MEM_REFCLOCK</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description> + The frequency of the memory refclock in MHz. + Provided by the Machine Readable Workbook. + This is read by the set_ref_clock HWP to find out the desired frequency. + This can be overridden to adjust the refclock frequency. + </description> + <valueType>uint32</valueType> + <platInit/> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_FREQ_CORE_FLOOR</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description> + The lowest frequency that a core can be set to in MHz. + This is the same for all cores in the system. + TODO Provided by TBD. Current thinking is MRW or MVPD. + If MRW then this attribute will stay here as a platInit attribute. + If MVPD then this attribute will move to proc_mvpd_attributes.xml. + </description> + <valueType>uint32</valueType> + <platInit/> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_FREQ_PB</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description> + The frequency of a processor's PB chiplet in MHz. + This is the same for all PB chiplets in the system. + This is set by a HWP that runs after SBE HWPs setup the PB PLL. It + reads ATTR_FREQ_PROC_REFCLOCK and the PB PLL settings. + </description> + <valueType>uint32</valueType> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_FREQ_A</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description> + The frequency of a processor's A-bus chiplet in MHz. + This is the same for all A-bus chiplets in the system. + This is set by the HWP that sets up the A-bus PLL. + </description> + <valueType>uint32</valueType> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_FREQ_X</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description> + The frequency of a processor's X-bus chiplet in MHz. + This is the same for all X-bus chiplets in the system. + This is set by the HWP that sets up the X-bus PLL. + </description> + <valueType>uint32</valueType> + </attribute> +</attributes> diff --git a/src/usr/hwpf/hwp/proc_mvpd_attributes.xml b/src/usr/hwpf/hwp/proc_mvpd_attributes.xml new file mode 100644 index 000000000..e72ef8f34 --- /dev/null +++ b/src/usr/hwpf/hwp/proc_mvpd_attributes.xml @@ -0,0 +1,39 @@ +<!-- IBM_PROLOG_BEGIN_TAG + This is an automatically generated prolog. + + $Source: src/usr/hwpf/hwp/proc_mvpd_attributes.xml $ + + IBM CONFIDENTIAL + + COPYRIGHT International Business Machines Corp. 2012 + + p1 + + Object Code Only (OCO) source materials + Licensed Internal Code Source Materials + IBM HostBoot Licensed Internal Code + + The source code for this program is not published or other- + wise divested of its trade secrets, irrespective of what has + been deposited with the U.S. Copyright Office. + + Origin: 30 + + IBM_PROLOG_END --> +<!-- + XML file specifying HWPF attributes. + These are processor module VPD (MVPD) attributes. +--> + +<attributes> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_MVPD_FREQ_CORE_NOMINAL</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + The nominal frequency of the processor cores in MHz. + </description> + <valueType>uint32</valueType> + <platInit/> + </attribute> +</attributes> diff --git a/src/usr/hwpf/hwp/system_attributes.xml b/src/usr/hwpf/hwp/system_attributes.xml index 52556b4bb..416c1c478 100644 --- a/src/usr/hwpf/hwp/system_attributes.xml +++ b/src/usr/hwpf/hwp/system_attributes.xml @@ -36,4 +36,60 @@ <valueType>uint8</valueType> <platInit/> </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_PROC_EPS_TABLE_TYPE</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description> + Processor epsilon table type. Used to calculate the processor nest + epsilon register values. + Provided by the Machine Readable Workbook. + </description> + <valueType>uint8</valueType> + <enum>EPS_TYPE_LE = 0x01, EPS_TYPE_HE = 0x02</enum> + <platInit/> + <persistRuntime/> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_PROC_FABRIC_PUMP_MODE</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description> + Processor SMP Fabric broadcast scope configuration. + MODE1 = default = chip/group/system/remote group/foreign. + MODE2 = group/system/remote group/foreign. + Provided by the Machine Readable Workbook. + </description> + <valueType>uint8</valueType> + <enum>MODE1 = 0x01, MODE2 = 0x02</enum> + <platInit/> + <persistRuntime/> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_PROC_X_BUS_WIDTH</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description> + Processor SMP X bus width. + Provided by the Machine Readable Workbook. + </description> + <valueType>uint8</valueType> + <enum>W4BYTE = 0x01, W8BYTE = 0x02</enum> + <platInit/> + <persistRuntime/> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_ALL_MCS_IN_INTERLEAVING_GROUP</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description> + If all MCS chiplets are in an interleaving group (1=true, 0=false). + If true the SMP fabric is setup in normal mode. + If false the SMP fabric is setup in checkerboard mode. + Provided by the Machine Readable Workbook. + </description> + <valueType>uint8</valueType> + <platInit/> + <persistRuntime/> + </attribute> </attributes> diff --git a/src/usr/hwpf/makefile b/src/usr/hwpf/makefile index 6c0c5c06b..dc92e60c5 100644 --- a/src/usr/hwpf/makefile +++ b/src/usr/hwpf/makefile @@ -43,7 +43,9 @@ HWP_ATTR_XML_FILES = hwp/memory_attributes.xml \ hwp/chip_attributes.xml \ hwp/dimm_spd_attributes.xml \ hwp/dimm_attributes.xml \ - hwp/unit_attributes.xml + hwp/unit_attributes.xml \ + hwp/freq_attributes.xml \ + hwp/proc_mvpd_attributes.xml #------------------------------------------------------------------------------ # Initfiles diff --git a/src/usr/targeting/xmltohb/attribute_types.xml b/src/usr/targeting/xmltohb/attribute_types.xml index 101c9e04c..15b77b8aa 100644 --- a/src/usr/targeting/xmltohb/attribute_types.xml +++ b/src/usr/targeting/xmltohb/attribute_types.xml @@ -2912,7 +2912,291 @@ </simpleType> <persistency>non-volatile</persistency> <readable/> - <writeable/> +</attribute> + +<enumerationType> + <id>PROC_EPS_TABLE_TYPE</id> + <description>Enumeration indicating the PROC_EPS_TABLE_TYPE</description> + <enumerator> + <name>EPS_TYPE_LE</name> + <value>1</value> + </enumerator> + <enumerator> + <name>EPS_TYPE_HE</name> + <value>2</value> + </enumerator> +</enumerationType> + +<attribute> + <id>PROC_EPS_TABLE_TYPE</id> + <description> + System attribute. + Processor epsilon table type. Used to calculate the processor nest + epsilon register values. + </description> + <simpleType> + <enumeration> + <id>PROC_EPS_TABLE_TYPE</id> + </enumeration> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_PROC_EPS_TABLE_TYPE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<enumerationType> + <id>PROC_FABRIC_PUMP_MODE</id> + <description>Enumeration indicating the PROC_FABRIC_PUMP_MODE</description> + <enumerator> + <name>MODE1</name> + <value>1</value> + </enumerator> + <enumerator> + <name>MODE2</name> + <value>2</value> + </enumerator> +</enumerationType> + +<attribute> + <id>PROC_FABRIC_PUMP_MODE</id> + <description> + System attribute. + Processor SMP Fabric broadcast scope configuration. + MODE1 = default = chip/group/system/remote group/foreign. + MODE2 = group/system/remote group/foreign. + Provided by the Machine Readable Workbook. + </description> + <simpleType> + <enumeration> + <id>PROC_FABRIC_PUMP_MODE</id> + </enumeration> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_PROC_FABRIC_PUMP_MODE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<enumerationType> + <id>PROC_X_BUS_WIDTH</id> + <description>Enumeration indicating the PROC_X_BUS_WIDTH</description> + <enumerator> + <name>W4BYTE</name> + <value>1</value> + </enumerator> + <enumerator> + <name>W8BYTE</name> + <value>2</value> + </enumerator> +</enumerationType> + +<attribute> + <id>PROC_X_BUS_WIDTH</id> + <description> + System attribute. + Processor SMP X bus width. + Provided by the Machine Readable Workbook. + </description> + <simpleType> + <enumeration> + <id>PROC_X_BUS_WIDTH</id> + </enumeration> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_PROC_X_BUS_WIDTH</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>ALL_MCS_IN_INTERLEAVING_GROUP</id> + <description> + System attribute. + If all MCS chiplets are in an interleaving group (1=true, 0=false). + If true the SMP fabric is setup in normal mode. + If false the SMP fabric is setup in checkerboard mode. + Provided by the Machine Readable Workbook. + </description> + <simpleType><uint8_t></uint8_t></simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_ALL_MCS_IN_INTERLEAVING_GROUP</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>FABRIC_NODE_ID</id> + <description> + Chip attribute. + Logical fabric node the chip belongs to. + Provided by the Machine Readable Workbook. + Can vary across drawers. + </description> + <simpleType><uint8_t></uint8_t></simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_FABRIC_NODE_ID</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>FABRIC_CHIP_ID</id> + <description> + Chip attribute. + Logical fabric chip id for this chip (position within the fabric). + Provided by the Machine Readable Workbook. + Can vary across drawers. + </description> + <simpleType><uint8_t></uint8_t></simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_FABRIC_CHIP_ID</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>FREQ_PROC_REFCLOCK</id> + <description> + System attribute. + The frequency of the processor refclock in MHz. + Provided by the Machine Readable Workbook. + The corresponding HWPF attribute: + - Is read by the set_ref_clock HWP to find out the desired frequency. + - Can be overridden to adjust the refclock frequency. + </description> + <simpleType><uint32_t></uint32_t></simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_FREQ_PROC_REFCLOCK</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>FREQ_MEM_REFCLOCK</id> + <description> + System attribute. + The frequency of the memory refclock in MHz. + Provided by the Machine Readable Workbook. + The corresponding HWPF attribute: + - Is read by the set_ref_clock HWP to find out the desired frequency. + - Can be overridden to adjust the refclock frequency. + </description> + <simpleType><uint32_t></uint32_t></simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_FREQ_MEM_REFCLOCK</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>FREQ_CORE_FLOOR</id> + <description> + System attribute. + The lowest frequency that a core can be set to in MHz. + This is the same for all cores in the system. + TODO Provided by TBD. Current thinking is MRW or MVPD. + If MRW then this attribute will stay here. + If MVPD then this attribute will be deleted. + </description> + <simpleType><uint32_t></uint32_t></simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_FREQ_CORE_FLOOR</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>FREQ_PB</id> + <description> + System attribute. + The frequency of a processor's PB chiplet in MHz. + This is the same for all PB chiplets in the system. + The corresponding HWPF attribute: + - Is set by a HWP that runs after SBE HWPs setup the PB PLL. It + reads ATTR_FREQ_PROC_REFCLOCK and the PB PLL settings. + </description> + <simpleType><uint32_t></uint32_t></simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_FREQ_PB</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>FREQ_A</id> + <description> + System attribute. + The frequency of a processor's A-bus chiplet in MHz. + This is the same for all A-bus chiplets in the system. + The corresponding HWPF attribute: + - Is set by the HWP that sets up the A-bus PLL. + </description> + <simpleType><uint32_t></uint32_t></simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_FREQ_A</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>FREQ_X</id> + <description> + System attribute. + The frequency of a processor's X-bus chiplet in MHz. + This is the same for all X-bus chiplets in the system. + The corresponding HWPF attribute: + - Is set by the HWP that sets up the X-bus PLL. + </description> + <simpleType><uint32_t></uint32_t></simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_FREQ_X</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MVPD_FREQ_CORE_NOMINAL</id> + <description> + Chip attribute. + The nominal frequency of the processor cores in MHz. + TODO This attribute should be from MVPD. + When MVPD function is present, this attribute should be deleted. + The corresponding HWPF attribute request should map to a function + that calls the MVPD driver (in the same way as DIMM SPD). + For now, just default to 3GHz + </description> + <simpleType><uint32_t><default>3000</default></uint32_t></simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_MVPD_FREQ_CORE_NOMINAL</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> </attribute> </attributes> diff --git a/src/usr/targeting/xmltohb/makefile b/src/usr/targeting/xmltohb/makefile index 8ed2e1e0c..252460fc2 100644 --- a/src/usr/targeting/xmltohb/makefile +++ b/src/usr/targeting/xmltohb/makefile @@ -53,7 +53,9 @@ XMLTOHB_FAPIATTR_SOURCES = \ ${ROOTPATH}/src/usr/hwpf/hwp/chip_attributes.xml \ ${ROOTPATH}/src/usr/hwpf/hwp/dimm_spd_attributes.xml \ ${ROOTPATH}/src/usr/hwpf/hwp/dimm_attributes.xml \ - ${ROOTPATH}/src/usr/hwpf/hwp/unit_attributes.xml + ${ROOTPATH}/src/usr/hwpf/hwp/unit_attributes.xml \ + ${ROOTPATH}/src/usr/hwpf/hwp/freq_attributes.xml \ + ${ROOTPATH}/src/usr/hwpf/hwp/proc_mvpd_attributes.xml VMM_CONSTS_FILE = \ ${ROOTPATH}/src/include/usr/vmmconst.h diff --git a/src/usr/targeting/xmltohb/simics_SALERNO.system.xml b/src/usr/targeting/xmltohb/simics_SALERNO.system.xml index 603e26b06..5de483d2c 100644 --- a/src/usr/targeting/xmltohb/simics_SALERNO.system.xml +++ b/src/usr/targeting/xmltohb/simics_SALERNO.system.xml @@ -42,6 +42,18 @@ <id>AFFINITY_PATH</id> <default>affinity:sys-0</default> </attribute> + <attribute> + <id>PROC_EPS_TABLE_TYPE</id> + <default>EPS_TYPE_LE</default> + </attribute> + <attribute> + <id>PROC_FABRIC_PUMP_MODE</id> + <default>MODE1</default> + </attribute> + <attribute> + <id>PROC_X_BUS_WIDTH</id> + <default>W8BYTE</default> + </attribute> </targetInstance> <targetInstance> diff --git a/src/usr/targeting/xmltohb/simics_VENICE.system.xml b/src/usr/targeting/xmltohb/simics_VENICE.system.xml index 701beccb0..4bfb2df83 100644 --- a/src/usr/targeting/xmltohb/simics_VENICE.system.xml +++ b/src/usr/targeting/xmltohb/simics_VENICE.system.xml @@ -48,6 +48,34 @@ <id>AFFINITY_PATH</id> <default>affinity:sys-0</default> </attribute> + <attribute> + <id>PROC_EPS_TABLE_TYPE</id> + <default>EPS_TYPE_HE</default> + </attribute> + <attribute> + <id>PROC_FABRIC_PUMP_MODE</id> + <default>MODE1</default> + </attribute> + <attribute> + <id>PROC_X_BUS_WIDTH</id> + <default>W8BYTE</default> + </attribute> + <attribute> + <id>ALL_MCS_IN_INTERLEAVING_GROUP</id> + <default>1</default> + </attribute> + <attribute> + <id>FREQ_PROC_REFCLOCK</id> + <default>200</default> + </attribute> + <attribute> + <id>FREQ_MEM_REFCLOCK</id> + <default>266</default> + </attribute> + <attribute> + <id>FREQ_CORE_FLOOR</id> + <default>2500</default> + </attribute> </targetInstance> <!-- System node 0 --> @@ -94,6 +122,14 @@ <id>AFFINITY_PATH</id> <default>affinity:sys-0/node-0/proc-0</default> </attribute> + <attribute> + <id>FABRIC_NODE_ID</id> + <default>0</default> + </attribute> + <attribute> + <id>FABRIC_CHIP_ID</id> + <default>0</default> + </attribute> </targetInstance> <!-- Venice n0p0 EX units --> @@ -515,6 +551,14 @@ <id>FSI_OPTION_FLAGS</id> <default>0</default> </attribute> + <attribute> + <id>FABRIC_NODE_ID</id> + <default>0</default> + </attribute> + <attribute> + <id>FABRIC_CHIP_ID</id> + <default>1</default> + </attribute> </targetInstance> <!-- Venice n0p1 EX units --> @@ -937,6 +981,14 @@ <id>FSI_OPTION_FLAGS</id> <default>0</default> </attribute> + <attribute> + <id>FABRIC_NODE_ID</id> + <default>0</default> + </attribute> + <attribute> + <id>FABRIC_CHIP_ID</id> + <default>2</default> + </attribute> </targetInstance> <!-- Venice n0p2 EX units --> @@ -1358,6 +1410,14 @@ <id>FSI_OPTION_FLAGS</id> <default>0</default> </attribute> + <attribute> + <id>FABRIC_NODE_ID</id> + <default>0</default> + </attribute> + <attribute> + <id>FABRIC_CHIP_ID</id> + <default>3</default> + </attribute> </targetInstance> <!-- Venice n0p3 EX units --> @@ -1779,6 +1839,14 @@ <id>FSI_OPTION_FLAGS</id> <default>0</default> </attribute> + <attribute> + <id>FABRIC_NODE_ID</id> + <default>0</default> + </attribute> + <attribute> + <id>FABRIC_CHIP_ID</id> + <default>4</default> + </attribute> </targetInstance> <!-- Venice n0p4 EX units --> @@ -2200,6 +2268,14 @@ <id>FSI_OPTION_FLAGS</id> <default>0</default> </attribute> + <attribute> + <id>FABRIC_NODE_ID</id> + <default>0</default> + </attribute> + <attribute> + <id>FABRIC_CHIP_ID</id> + <default>5</default> + </attribute> </targetInstance> <!-- Venice n0p5 EX units --> @@ -2621,6 +2697,14 @@ <id>FSI_OPTION_FLAGS</id> <default>0</default> </attribute> + <attribute> + <id>FABRIC_NODE_ID</id> + <default>0</default> + </attribute> + <attribute> + <id>FABRIC_CHIP_ID</id> + <default>6</default> + </attribute> </targetInstance> <!-- Venice n0p6 EX units --> @@ -3042,6 +3126,14 @@ <id>FSI_OPTION_FLAGS</id> <default>0</default> </attribute> + <attribute> + <id>FABRIC_NODE_ID</id> + <default>0</default> + </attribute> + <attribute> + <id>FABRIC_CHIP_ID</id> + <default>7</default> + </attribute> </targetInstance> <!-- Venice n0p7 EX units --> diff --git a/src/usr/targeting/xmltohb/target_types.xml b/src/usr/targeting/xmltohb/target_types.xml index 7ebadb6a8..ed6036ebf 100644 --- a/src/usr/targeting/xmltohb/target_types.xml +++ b/src/usr/targeting/xmltohb/target_types.xml @@ -66,9 +66,7 @@ <attribute><id>NUMERIC_POD_TYPE_TEST</id></attribute> <attribute><id>HB_MUTEX_TEST_LOCK</id></attribute> <attribute><id>DUMMY_RW</id></attribute> - <attribute> - <id>XSCOM_BASE_ADDRESS</id> - </attribute> + <attribute><id>XSCOM_BASE_ADDRESS</id></attribute> <attribute> <id>PHYS_PATH</id> <default>physical:sys-0</default> @@ -76,14 +74,22 @@ <attribute> <id>AFFINITY_PATH</id> <default>affinity:sys-0</default> - </attribute> + </attribute> <attribute> <id>IS_SIMULATION</id> <default>0</default> - </attribute> - <attribute> - <id>ISTEP_MODE</id> - </attribute> + </attribute> + <attribute><id>ISTEP_MODE</id></attribute> + <attribute><id>PROC_EPS_TABLE_TYPE</id></attribute> + <attribute><id>PROC_FABRIC_PUMP_MODE</id></attribute> + <attribute><id>PROC_X_BUS_WIDTH</id></attribute> + <attribute><id>ALL_MCS_IN_INTERLEAVING_GROUP</id></attribute> + <attribute><id>FREQ_PROC_REFCLOCK</id></attribute> + <attribute><id>FREQ_MEM_REFCLOCK</id></attribute> + <attribute><id>FREQ_CORE_FLOOR</id></attribute> + <attribute><id>FREQ_PB</id></attribute> + <attribute><id>FREQ_A</id></attribute> + <attribute><id>FREQ_X</id></attribute> </targetType> <targetType> @@ -155,7 +161,10 @@ <id>FSI_GP_REG_SCOM_ACCESS</id> <default>1</default> </attribute> - + <attribute><id>FABRIC_NODE_ID</id></attribute> + <attribute><id>FABRIC_CHIP_ID</id></attribute> + <!-- TODO. MVPD_FREQ_CORE_NOMINAL to be deleted when MVPD available --> + <attribute><id>MVPD_FREQ_CORE_NOMINAL</id></attribute> </targetType> <targetType> diff --git a/src/usr/targeting/xmltohb/vbu.system.xml b/src/usr/targeting/xmltohb/vbu.system.xml index 76c6f7412..ece731e50 100644 --- a/src/usr/targeting/xmltohb/vbu.system.xml +++ b/src/usr/targeting/xmltohb/vbu.system.xml @@ -43,6 +43,34 @@ <id>IS_SIMULATION</id> <default>1</default> </attribute> + <attribute> + <id>PROC_EPS_TABLE_TYPE</id> + <default>EPS_TYPE_HE</default> + </attribute> + <attribute> + <id>PROC_FABRIC_PUMP_MODE</id> + <default>MODE1</default> + </attribute> + <attribute> + <id>PROC_X_BUS_WIDTH</id> + <default>W8BYTE</default> + </attribute> + <attribute> + <id>ALL_MCS_IN_INTERLEAVING_GROUP</id> + <default>0</default> + </attribute> + <attribute> + <id>FREQ_PROC_REFCLOCK</id> + <default>200</default> + </attribute> + <attribute> + <id>FREQ_MEM_REFCLOCK</id> + <default>266</default> + </attribute> + <attribute> + <id>FREQ_CORE_FLOOR</id> + <default>2500</default> + </attribute> </targetInstance> <targetInstance> @@ -87,6 +115,14 @@ <id>AFFINITY_PATH</id> <default>affinity:sys-0/node-0/proc-0</default> </attribute> + <attribute> + <id>FABRIC_NODE_ID</id> + <default>0</default> + </attribute> + <attribute> + <id>FABRIC_CHIP_ID</id> + <default>0</default> + </attribute> </targetInstance> <!-- Venice n0p0 EX units --> diff --git a/src/usr/targeting/xmltohb/xmltohb.pl b/src/usr/targeting/xmltohb/xmltohb.pl index 3fdcbd6e4..3f36269c9 100755 --- a/src/usr/targeting/xmltohb/xmltohb.pl +++ b/src/usr/targeting/xmltohb/xmltohb.pl @@ -46,7 +46,12 @@ use Text::Wrap; use Data::Dumper; use POSIX; - +################################################################################ +# Set PREFERRED_PARSER to XML::Parser. Otherwise it uses XML::SAX which contains +# bugs that result in XML parse errors that can be fixed by adjusting white- +# space (i.e. parse errors that do not make sense). +################################################################################ +$XML::Simple::PREFERRED_PARSER = 'XML::Parser'; ################################################################################ # Process command line parameters, issue help text if needed |