diff options
Diffstat (limited to 'src/usr/targeting')
7 files changed, 142 insertions, 5 deletions
diff --git a/src/usr/targeting/common/genHwsvMrwXml.pl b/src/usr/targeting/common/genHwsvMrwXml.pl index 9373de6d4..e07d21d4d 100755 --- a/src/usr/targeting/common/genHwsvMrwXml.pl +++ b/src/usr/targeting/common/genHwsvMrwXml.pl @@ -224,9 +224,13 @@ push @systemAttr, $reqPol->{'cdimm_master_i2c_temp_sensor_enable'}, "MRW_CDIMM_SPARE_I2C_TEMP_SENSOR_ENABLE", $reqPol->{'cdimm_spare_i2c_temp_sensor_enable'}, - "MRW_MEM_SENSOR_CACHE_ADDR_MAP", - $reqPol->{'mem_sensor_cache_addr_map'}, - "PM_SYSTEM_IVRMS_ENABLED", $reqPol->{'pm_system_ivrms_enabled'}, + "MRW_VMEM_REGULATOR_POWER_LIMIT_PER_DIMM_ADJ_ENABLE", + $reqPol->{'vmem_regulator_memory_power_limit_per_dimm_adjustment_enable'}, + "MRW_MAX_NUMBER_DIMMS_POSSIBLE_PER_VMEM_REGULATOR", + $reqPol->{'max_number_dimms_possible_per_vmem_regulator'}, + "MRW_VMEM_REGULATOR_MEMORY_POWER_LIMIT_PER_DIMM", + $reqPol->{'vmem_regulator_memory_power_limit_per_dimm'}, + "PM_SYSTEM_IVRMS_ENABLED", $reqPol->{'pm_system_ivrms_enabled'}, "PM_SYSTEM_IVRM_VPD_MIN_LEVEL", $reqPol->{'pm_system_ivrm_vpd_min_level'}, "MRW_ENHANCED_GROUPING_NO_MIRRORING", $reqPol->{'mcs_enhanced_grouping_no_mirroring'}, "MRW_STRICT_MBA_PLUG_RULE_CHECKING", $reqPol->{'strict_mba_plug_rule_checking'}, diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml index dab406c1f..d1cce5b86 100644 --- a/src/usr/targeting/common/xmltohb/attribute_types.xml +++ b/src/usr/targeting/common/xmltohb/attribute_types.xml @@ -14412,6 +14412,26 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript </attribute> <attribute> + <id>MSS_VOLT_COMPLIANT_DIMMS</id> + <description> + Compliant Voltages. Created to call out non-compliant dimms + if they exist in the system. + </description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_VOLT_COMPLIANT_DIMMS</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> <id>MSS_VDDR_OVERIDE_SPD</id> <description> DIMM SPD voltage override for VDDR voltage calculations. @@ -15467,4 +15487,77 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript <!-- === Manufacturing threshold Attributes of PRD === --> +<attribute> + <id>MSS_VMEM_REGULATOR_MAX_DIMM_COUNT</id> + <description>Maximum number of installed DIMMs per VMEM regulator for all + VMEM regulators in the system. + </description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_VMEM_REGULATOR_MAX_DIMM_COUNT</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MRW_VMEM_REGULATOR_POWER_LIMIT_PER_DIMM_ADJ_ENABLE</id> + <description>Machine Readable Workbook enablement of the HWP code to adjust + the VMEM regulator power limit based on number of installed DIMMs. + </description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_MRW_VMEM_REGULATOR_POWER_LIMIT_PER_DIMM_ADJ_ENABLE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MRW_MAX_NUMBER_DIMMS_POSSIBLE_PER_VMEM_REGULATOR</id> + <description>Machine Readable Workbook value for the maximum possible number + of dimms that can be installed under any of the VMEM regulators. + </description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_MRW_MAX_NUMBER_DIMMS_POSSIBLE_PER_VMEM_REGULATOR</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MRW_VMEM_REGULATOR_MEMORY_POWER_LIMIT_PER_DIMM</id> + <description>Machine Readable Workbook VMEM regulator power limit per CDIMM + assuming a full configuration. Units in cW. + </description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_MRW_VMEM_REGULATOR_MEMORY_POWER_LIMIT_PER_DIMM</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + </attributes> diff --git a/src/usr/targeting/common/xmltohb/simics_MURANO.system.xml b/src/usr/targeting/common/xmltohb/simics_MURANO.system.xml index f7551fc7d..07967cce0 100644 --- a/src/usr/targeting/common/xmltohb/simics_MURANO.system.xml +++ b/src/usr/targeting/common/xmltohb/simics_MURANO.system.xml @@ -249,6 +249,18 @@ <id>REDUNDANT_CLOCKS</id> <default>0x00</default> </attribute> + <attribute> + <id>MRW_VMEM_REGULATOR_POWER_LIMIT_PER_DIMM_ADJ_ENABLE</id> + <default>1</default> + </attribute> + <attribute> + <id>MRW_MAX_NUMBER_DIMMS_POSSIBLE_PER_VMEM_REGULATOR</id> + <default>3</default> + </attribute> + <attribute> + <id>MRW_VMEM_REGULATOR_MEMORY_POWER_LIMIT_PER_DIMM</id> + <default>2532</default> + </attribute> <!-- End System Attributes from MRW --> <attribute> <id>ISTEP_MODE</id> diff --git a/src/usr/targeting/common/xmltohb/simics_VENICE.system.xml b/src/usr/targeting/common/xmltohb/simics_VENICE.system.xml index c25236472..73714c0ac 100644 --- a/src/usr/targeting/common/xmltohb/simics_VENICE.system.xml +++ b/src/usr/targeting/common/xmltohb/simics_VENICE.system.xml @@ -253,6 +253,14 @@ <id>REDUNDANT_CLOCKS</id> <default>0x01</default> </attribute> + <attribute> + <id>MRW_MAX_NUMBER_DIMMS_POSSIBLE_PER_VMEM_REGULATOR</id> + <default>8</default> + </attribute> + <attribute> + <id>MRW_VMEM_REGULATOR_MEMORY_POWER_LIMIT_PER_DIMM</id> + <default>5500</default> + </attribute> <!-- End System Attributes from MRW --> <attribute> <id>ISTEP_MODE</id> diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml index aabb107f3..5503e3ce1 100644 --- a/src/usr/targeting/common/xmltohb/target_types.xml +++ b/src/usr/targeting/common/xmltohb/target_types.xml @@ -129,8 +129,10 @@ <attribute><id>MRW_POWER_CONTROL_REQUESTED</id></attribute> <attribute><id>MRW_DDR3_VDDR_MAX_LIMIT</id></attribute> <attribute><id>MRW_DDR4_VDDR_MAX_LIMIT</id></attribute> - <attribute><id>MRW_MEM_SENSOR_CACHE_ADDR_MAP</id></attribute> - + <attribute><id>MSS_VMEM_REGULATOR_MAX_DIMM_COUNT</id></attribute> + <attribute><id>MRW_VMEM_REGULATOR_POWER_LIMIT_PER_DIMM_ADJ_ENABLE</id></attribute> + <attribute><id>MRW_MAX_NUMBER_DIMMS_POSSIBLE_PER_VMEM_REGULATOR</id></attribute> + <attribute><id>MRW_VMEM_REGULATOR_MEMORY_POWER_LIMIT_PER_DIMM</id></attribute> <!-- Start pm_plat_attributes.xml --> <attribute><id>PM_EXTERNAL_VRM_STEPSIZE</id></attribute> <attribute><id>PM_EXTERNAL_VRM_STEPDELAY</id></attribute> @@ -274,6 +276,7 @@ <attribute><id>MSS_VOLT_DDR4_VDDR_SLOPE</id></attribute> <attribute><id>MSS_VOLT_DDR4_VDDR_INTERCEPT</id></attribute> <attribute><id>MSS_VDDR_OVERIDE_SPD</id></attribute> + <attribute><id>MSS_VOLT_COMPLIANT_DIMMS</id></attribute> <attribute><id>PM_PFET_WORKAROUND_RUN_FLAG</id></attribute> <attribute><id>PM_SLEEP_ENABLE</id></attribute> <attribute><id>MSS_DRAMINIT_RESET_DISABLE</id></attribute> @@ -1433,6 +1436,7 @@ <attribute><id>MSS_FREQ</id></attribute> <attribute><id>MSS_LAB_OVERRIDE_FOR_MEM_PLL</id></attribute> <attribute><id>ECID</id></attribute> + <attribute><id>MRW_MEM_SENSOR_CACHE_ADDR_MAP</id></attribute> <attribute> <!-- Centaur memory buffer chips do not have SCOM accessible FSI GP regs --> <id>FSI_GP_REG_SCOM_ACCESS</id> diff --git a/src/usr/targeting/common/xmltohb/vbu_MURANO.system.xml b/src/usr/targeting/common/xmltohb/vbu_MURANO.system.xml index 6fe6c9532..d1f16bfb7 100644 --- a/src/usr/targeting/common/xmltohb/vbu_MURANO.system.xml +++ b/src/usr/targeting/common/xmltohb/vbu_MURANO.system.xml @@ -212,6 +212,14 @@ <id>REDUNDANT_CLOCKS</id> <default>0x00</default> </attribute> + <attribute> + <id>MRW_MAX_NUMBER_DIMMS_POSSIBLE_PER_VMEM_REGULATOR</id> + <default>3</default> + </attribute> + <attribute> + <id>MRW_VMEM_REGULATOR_MEMORY_POWER_LIMIT_PER_DIMM</id> + <default>2532</default> + </attribute> <!-- End System Attributes from MRW --> <attribute> <id>ISTEP_MODE</id> diff --git a/src/usr/targeting/common/xmltohb/vbu_VENICE.system.xml b/src/usr/targeting/common/xmltohb/vbu_VENICE.system.xml index 0f507e5b6..9da901e28 100644 --- a/src/usr/targeting/common/xmltohb/vbu_VENICE.system.xml +++ b/src/usr/targeting/common/xmltohb/vbu_VENICE.system.xml @@ -211,6 +211,14 @@ <id>REDUNDANT_CLOCKS</id> <default>0x01</default> </attribute> + <attribute> + <id>MRW_MAX_NUMBER_DIMMS_POSSIBLE_PER_VMEM_REGULATOR</id> + <default>8</default> + </attribute> + <attribute> + <id>MRW_VMEM_REGULATOR_MEMORY_POWER_LIMIT_PER_DIMM</id> + <default>5500</default> + </attribute> <!-- End System Attributes from MRW --> <attribute> <id>BOOT_FREQ_MHZ</id> |
