diff options
Diffstat (limited to 'src/usr/isteps')
-rw-r--r-- | src/usr/isteps/istep11/call_cen_sbe_pll_initf.C | 38 | ||||
-rw-r--r-- | src/usr/isteps/istep11/call_cen_sbe_pll_setup.C | 38 | ||||
-rw-r--r-- | src/usr/isteps/istep11/call_cen_sbe_tp_arrayinit.C | 38 | ||||
-rw-r--r-- | src/usr/isteps/istep11/call_cen_sbe_tp_chiplet_init1.C | 38 | ||||
-rw-r--r-- | src/usr/isteps/istep11/call_cen_sbe_tp_chiplet_init2.C | 38 | ||||
-rw-r--r-- | src/usr/isteps/istep11/call_cen_sbe_tp_chiplet_init3.C | 38 | ||||
-rw-r--r-- | src/usr/isteps/istep11/call_host_prd_hwreconfig.C | 39 | ||||
-rw-r--r-- | src/usr/isteps/istep11/makefile | 36 | ||||
-rw-r--r-- | src/usr/isteps/istep12/call_dmi_attr_update.C | 50 | ||||
-rw-r--r-- | src/usr/isteps/istep12/call_dmi_erepair.C | 250 | ||||
-rw-r--r-- | src/usr/isteps/istep12/call_dmi_io_dccal.C | 159 | ||||
-rw-r--r-- | src/usr/isteps/istep12/call_dmi_scominit.C | 107 | ||||
-rw-r--r-- | src/usr/isteps/istep12/call_mss_getecid.C | 279 | ||||
-rw-r--r-- | src/usr/isteps/istep12/call_proc_dmi_scominit.C | 106 | ||||
-rw-r--r-- | src/usr/isteps/istep12/makefile | 35 | ||||
-rw-r--r-- | src/usr/isteps/makefile | 2 |
16 files changed, 1291 insertions, 0 deletions
diff --git a/src/usr/isteps/istep11/call_cen_sbe_pll_initf.C b/src/usr/isteps/istep11/call_cen_sbe_pll_initf.C new file mode 100644 index 000000000..a42b0d89d --- /dev/null +++ b/src/usr/isteps/istep11/call_cen_sbe_pll_initf.C @@ -0,0 +1,38 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/isteps/istep11/call_cen_sbe_pll_initf.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +#include <errl/errlentry.H> + +using namespace ERRORLOG; + +namespace ISTEP_11 +{ +void* call_cen_sbe_pll_initf (void *io_pArgs) +{ + errlHndl_t l_err = NULL; + //@TODO call cen_sbe_pll_initf.C HWP + return l_err; +} + +}; diff --git a/src/usr/isteps/istep11/call_cen_sbe_pll_setup.C b/src/usr/isteps/istep11/call_cen_sbe_pll_setup.C new file mode 100644 index 000000000..bb873e0ed --- /dev/null +++ b/src/usr/isteps/istep11/call_cen_sbe_pll_setup.C @@ -0,0 +1,38 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/isteps/istep11/call_cen_sbe_pll_setup.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +#include <errl/errlentry.H> + +using namespace ERRORLOG; + +namespace ISTEP_11 +{ +void* call_cen_sbe_pll_setup (void *io_pArgs) +{ + errlHndl_t l_err = NULL; + //@TODO call cen_sbe_pll_setup.C HWP + return l_err; +} + +}; diff --git a/src/usr/isteps/istep11/call_cen_sbe_tp_arrayinit.C b/src/usr/isteps/istep11/call_cen_sbe_tp_arrayinit.C new file mode 100644 index 000000000..2cec8931a --- /dev/null +++ b/src/usr/isteps/istep11/call_cen_sbe_tp_arrayinit.C @@ -0,0 +1,38 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/isteps/istep11/call_cen_sbe_tp_arrayinit.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +#include <errl/errlentry.H> + +using namespace ERRORLOG; + +namespace ISTEP_11 +{ +void* call_cen_sbe_tp_arrayinit (void *io_pArgs) +{ + errlHndl_t l_err = NULL; + //@TODO call cen_sbe_tp_arrayinit.C HWP + return l_err; +} + +}; diff --git a/src/usr/isteps/istep11/call_cen_sbe_tp_chiplet_init1.C b/src/usr/isteps/istep11/call_cen_sbe_tp_chiplet_init1.C new file mode 100644 index 000000000..be2038cc9 --- /dev/null +++ b/src/usr/isteps/istep11/call_cen_sbe_tp_chiplet_init1.C @@ -0,0 +1,38 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/isteps/istep11/call_cen_sbe_tp_chiplet_init1.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +#include <errl/errlentry.H> + +using namespace ERRORLOG; + +namespace ISTEP_11 +{ +void* call_cen_sbe_tp_chiplet_init1 (void *io_pArgs) +{ + errlHndl_t l_err = NULL; + //@TODO call cen_sbe_tp_chiplet_init1.C HWP + return l_err; +} + +}; diff --git a/src/usr/isteps/istep11/call_cen_sbe_tp_chiplet_init2.C b/src/usr/isteps/istep11/call_cen_sbe_tp_chiplet_init2.C new file mode 100644 index 000000000..585d75167 --- /dev/null +++ b/src/usr/isteps/istep11/call_cen_sbe_tp_chiplet_init2.C @@ -0,0 +1,38 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/isteps/istep11/call_cen_sbe_tp_chiplet_init2.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +#include <errl/errlentry.H> + +using namespace ERRORLOG; + +namespace ISTEP_11 +{ +void* call_cen_sbe_tp_chiplet_init2 (void *io_pArgs) +{ + errlHndl_t l_err = NULL; + //@TODO call cen_sbe_tp_chiplet_init2.C HWP + return l_err; +} + +}; diff --git a/src/usr/isteps/istep11/call_cen_sbe_tp_chiplet_init3.C b/src/usr/isteps/istep11/call_cen_sbe_tp_chiplet_init3.C new file mode 100644 index 000000000..312c20999 --- /dev/null +++ b/src/usr/isteps/istep11/call_cen_sbe_tp_chiplet_init3.C @@ -0,0 +1,38 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/isteps/istep11/call_cen_sbe_tp_chiplet_init3.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +#include <errl/errlentry.H> + +using namespace ERRORLOG; + +namespace ISTEP_11 +{ +void* call_cen_sbe_tp_chiplet_init3 (void *io_pArgs) +{ + errlHndl_t l_err = NULL; + //@TODO call cen_sbe_tp_chiplet_init3.C HWP + return l_err; +} + +}; diff --git a/src/usr/isteps/istep11/call_host_prd_hwreconfig.C b/src/usr/isteps/istep11/call_host_prd_hwreconfig.C new file mode 100644 index 000000000..0cdc9a056 --- /dev/null +++ b/src/usr/isteps/istep11/call_host_prd_hwreconfig.C @@ -0,0 +1,39 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/isteps/istep11/call_host_prd_hwreconfig.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +#include <errl/errlentry.H> + +using namespace ERRORLOG; + +namespace ISTEP_11 +{ +void* call_host_prd_hwreconfig (void *io_pArgs) +{ + errlHndl_t l_err = NULL; + //@TODO call p9_switch_cfsim.C HWP + //@TODO call p9_enable_reconfig.C + return l_err; +} + +}; diff --git a/src/usr/isteps/istep11/makefile b/src/usr/isteps/istep11/makefile new file mode 100644 index 000000000..7ad9affff --- /dev/null +++ b/src/usr/isteps/istep11/makefile @@ -0,0 +1,36 @@ +# IBM_PROLOG_BEGIN_TAG +# This is an automatically generated prolog. +# +# $Source: src/usr/isteps/istep11/makefile $ +# +# OpenPOWER HostBoot Project +# +# Contributors Listed Below - COPYRIGHT 2015 +# [+] International Business Machines Corp. +# +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or +# implied. See the License for the specific language governing +# permissions and limitations under the License. +# +# IBM_PROLOG_END_TAG +ROOTPATH = ../../../.. +MODULE = istep11 + +OBJS += call_host_prd_hwreconfig.o +OBJS += call_cen_sbe_tp_chiplet_init1.o +OBJS += call_cen_sbe_pll_initf.o +OBJS += call_cen_sbe_pll_setup.o +OBJS += call_cen_sbe_tp_chiplet_init2.o +OBJS += call_cen_sbe_tp_arrayinit.o +OBJS += call_cen_sbe_tp_chiplet_init3.o + +include ${ROOTPATH}/config.mk diff --git a/src/usr/isteps/istep12/call_dmi_attr_update.C b/src/usr/isteps/istep12/call_dmi_attr_update.C new file mode 100644 index 000000000..4405afab0 --- /dev/null +++ b/src/usr/isteps/istep12/call_dmi_attr_update.C @@ -0,0 +1,50 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/isteps/istep12/call_dmi_attr_update.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +#include <errl/errlentry.H> +#include <isteps/hwpisteperror.H> + + +using namespace ERRORLOG; +using namespace ISTEP_ERROR; + + +namespace ISTEP_12 +{ +void* call_dmi_attr_update (void *io_pArgs) +{ + IStepError l_StepError; + + TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "call_dmi_attr_update entry" ); + + //@TODO RTC:133831 call dmi_attr_update.C HWP + TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "call_dmi_attr_update exit" ); + + return l_StepError.getErrorHandle(); + +} + +}; diff --git a/src/usr/isteps/istep12/call_dmi_erepair.C b/src/usr/isteps/istep12/call_dmi_erepair.C new file mode 100644 index 000000000..88c834d8c --- /dev/null +++ b/src/usr/isteps/istep12/call_dmi_erepair.C @@ -0,0 +1,250 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/isteps/istep12/call_dmi_erepair.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +#include <errl/errlentry.H> +#include <errl/errlmanager.H> +#include <initservice/isteps_trace.H> + +#include <isteps/hwpisteperror.H> +#include <errl/errludtarget.H> + +// targeting support. +#include <targeting/common/commontargeting.H> +#include <targeting/common/utilFilter.H> + +using namespace ISTEP; +using namespace ISTEP_ERROR; +using namespace ERRORLOG; +using namespace TARGETING; + +namespace ISTEP_12 +{ +void* call_dmi_erepair (void *io_pArgs) +{ + ISTEP_ERROR::IStepError l_StepError; + //@TODO RTC:133831 + /* + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_dmi_erepair entry" ); + +#ifdef CONFIG_NO_DMI_EREPAIR + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "DMI erepair is disabled" ); +#else + + errlHndl_t l_errPtr = NULL; + fapi::ReturnCode l_rc; + std::vector<uint8_t> l_endp1_txFaillanes; + std::vector<uint8_t> l_endp1_rxFaillanes; + std::vector<uint8_t> l_endp2_txFaillanes; + std::vector<uint8_t> l_endp2_rxFaillanes; + uint32_t l_count = 0; + + TargetHandleList l_mcsTargetList; + TargetHandleList l_memTargetList; + TargetHandleList::iterator l_mem_iter; + + // find all MCS chiplets of all procs + getAllChiplets(l_mcsTargetList, TYPE_MCS); + + for (TargetHandleList::const_iterator + l_mcs_iter = l_mcsTargetList.begin(); + l_mcs_iter != l_mcsTargetList.end(); + ++l_mcs_iter) + { + // make a local copy of the MCS target + TARGETING::Target *l_mcs_target = *l_mcs_iter; + ATTR_CHIP_UNIT_type l_mcsNum = l_mcs_target->getAttr<ATTR_CHIP_UNIT>(); + + // find all the Centaurs that are associated with this MCS + getChildAffinityTargets(l_memTargetList, l_mcs_target, + CLASS_CHIP, TYPE_MEMBUF); + + if(l_memTargetList.size() != EREPAIR_MAX_CENTAUR_PER_MCS) + { + continue; + } + + // There will always be 1 Centaur associated with a MCS + l_mem_iter = l_memTargetList.begin(); + + // make a local copy of the MEMBUF target + TARGETING::Target *l_mem_target = *l_mem_iter; + ATTR_POSITION_type l_memNum = l_mem_target->getAttr<ATTR_POSITION>(); + + // struct containing custom parameters that is fed to HWP + // call the HWP with each target(if parallel, spin off a task) + const fapi::Target l_fapi_endp1_target(TARGET_TYPE_MCS_CHIPLET, + l_mcs_target); + + const fapi::Target l_fapi_endp2_target(TARGET_TYPE_MEMBUF_CHIP, + l_mem_target); + + // Get the repair lanes from the VPD + l_endp1_txFaillanes.clear(); + l_endp1_rxFaillanes.clear(); + l_endp2_txFaillanes.clear(); + l_endp2_rxFaillanes.clear(); + l_rc = erepairGetRestoreLanes(l_fapi_endp1_target, + l_endp1_txFaillanes, + l_endp1_rxFaillanes, + l_fapi_endp2_target, + l_endp2_txFaillanes, + l_endp2_rxFaillanes); + if(l_rc) + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, "Unable to" + " retrieve DMI eRepair data from the VPD"); + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "target HUID %.8X", TARGETING::get_huid(l_mem_target)); + + // Convert fapi returnCode to Error handle + l_errPtr = fapiRcToErrl(l_rc); + + // capture the target data in the elog + ErrlUserDetailsTarget(l_mcs_target).addToLog(l_errPtr); + ErrlUserDetailsTarget(l_mem_target).addToLog(l_errPtr); + + // Create IStep error log and cross reference error that occurred + l_StepError.addErrorDetails( l_errPtr); + + // Commit Error + errlCommit(l_errPtr, HWPF_COMP_ID); + break; + } + + if(l_endp1_txFaillanes.size() || l_endp1_rxFaillanes.size()) + { + // call the io_restore_erepair HWP to restore eRepair + // lanes of endp1 + + TRACDCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "io_restore_erepair HWP on %s" + " ( mcs 0x%x, mem 0x%x ) : ", + l_fapi_endp1_target.toEcmdString(), + l_mcsNum, + l_memNum ); + + FAPI_INVOKE_HWP(l_errPtr, + io_restore_erepair, + l_fapi_endp1_target, + l_endp1_txFaillanes, + l_endp1_rxFaillanes); + if(l_errPtr) + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "ERROR 0x%.8X : io_restore_erepair HWP" + "( mcs 0x%x, mem 0x%x ) ", + l_errPtr->reasonCode(), + l_mcsNum, + l_memNum); + + // capture the target data in the elog + ErrlUserDetailsTarget(l_mcs_target).addToLog(l_errPtr); + + // Create IStep error log and cross ref error that occurred + l_StepError.addErrorDetails( l_errPtr); + + // Commit Error + errlCommit(l_errPtr, HWPF_COMP_ID); + break; + } + + for(l_count = 0; l_count < l_endp1_txFaillanes.size(); l_count++) + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,"Successfully" + " restored Tx lane %d, of DMI-Bus, of endpoint %s", + l_endp1_txFaillanes[l_count], + l_fapi_endp1_target.toEcmdString()); + } + + for(l_count = 0; l_count < l_endp1_rxFaillanes.size(); l_count++) + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,"Successfully" + " restored Rx lane %d, of DMI-Bus, of endpoint %s", + l_endp1_rxFaillanes[l_count], + l_fapi_endp1_target.toEcmdString()); + } + } // end of if(l_endp1_txFaillanes.size() || l_endp1_rxFaillanes.size()) + + if(l_endp2_txFaillanes.size() || l_endp2_rxFaillanes.size()) + { + // call the io_restore_erepair HWP to restore eRepair + // lanes of endp2 + + TRACDCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "io_restore_erepair HWP on %s" + " ( mcs 0x%x, mem 0x%x ) : ", + l_fapi_endp2_target.toEcmdString(), + l_mcsNum, + l_memNum ); + FAPI_INVOKE_HWP(l_errPtr, + io_restore_erepair, + l_fapi_endp2_target, + l_endp2_txFaillanes, + l_endp2_rxFaillanes); + if (l_errPtr) + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "ERROR 0x%.8X : io_restore_erepair HWP" + "( mcs 0x%x, mem 0x%x ) ", + l_errPtr->reasonCode(), + l_mcsNum, + l_memNum); + + // capture the target data in the elog + ErrlUserDetailsTarget(l_mem_target).addToLog(l_errPtr); + + // Create IStep error log and cross ref error that occurred + l_StepError.addErrorDetails( l_errPtr); + + // Commit Error + errlCommit(l_errPtr, HWPF_COMP_ID); + break; + } + + for(l_count = 0; l_count < l_endp2_txFaillanes.size(); l_count++) + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,"Successfully" + " restored Tx lane %d, of DMI-Bus, of endpoint %s", + l_endp2_txFaillanes[l_count], + l_fapi_endp2_target.toEcmdString()); + } + + for(l_count = 0; l_count < l_endp2_rxFaillanes.size(); l_count++) + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,"Successfully" + " restored Rx lane %d, of DMI-Bus, of endpoint %s", + l_endp2_rxFaillanes[l_count], + l_fapi_endp2_target.toEcmdString()); + } + } // end of if(l_endp2_txFaillanes.size() || l_endp2_rxFaillanes.size()) + } // end for l_mcs_target + +#endif + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_dmi_erepair exit" ); + + */ + return l_StepError.getErrorHandle(); +} + +}; diff --git a/src/usr/isteps/istep12/call_dmi_io_dccal.C b/src/usr/isteps/istep12/call_dmi_io_dccal.C new file mode 100644 index 000000000..199804797 --- /dev/null +++ b/src/usr/isteps/istep12/call_dmi_io_dccal.C @@ -0,0 +1,159 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/isteps/istep12/call_dmi_io_dccal.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +#include <errl/errlentry.H> +#include <errl/errlmanager.H> +#include <initservice/isteps_trace.H> + +#include <isteps/hwpisteperror.H> +#include <errl/errludtarget.H> + +// targeting support. +#include <targeting/common/commontargeting.H> +#include <targeting/common/utilFilter.H> + +using namespace ISTEP; +using namespace ISTEP_ERROR; +using namespace ERRORLOG; +using namespace TARGETING; + + +namespace ISTEP_12 +{ +void* call_dmi_io_dccal (void *io_pArgs) +{ + ISTEP_ERROR::IStepError l_StepError; + //@TODO RTC:133831 +#if 0 + errlHndl_t l_errl = NULL; + + // We are not running this analog procedure in VPO + if (TARGETING::is_vpo()) + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "Skip dmi_io_dccal in VPO!"); + return l_StepError.getErrorHandle(); + } + + TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "call_dmi_io_dccal entry" ); + + TargetPairs_t l_dmi_io_dccal_targets; + get_dmi_io_targets(l_dmi_io_dccal_targets); + + + // Note: + // Due to lab tester board environment, HW procedure writer (Varkey) has + // requested to send in one target of a time (we used to send in + // the MCS and MEMBUF pair in one call). Even though they don't have to be + // in order, we should keep the pair concept here in case we need to send + // in a pair in the future again. + for (TargetPairs_t::const_iterator + l_itr = l_dmi_io_dccal_targets.begin(); + l_itr != l_dmi_io_dccal_targets.end(); + ++l_itr) + { + /* + //@TODO RTC:133831 + const fapi::Target l_fapi_mcs_target( TARGET_TYPE_MCS_CHIPLET, + (const_cast<TARGETING::Target*>(l_itr->first))); + + const fapi::Target l_fapi_membuf_target( TARGET_TYPE_MEMBUF_CHIP, + (const_cast<TARGETING::Target*>(l_itr->second))); + + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "===== Call dmi_io_dccal HWP( mcs 0x%.8X, mem 0x%.8X) : ", + TARGETING::get_huid(l_itr->first), + TARGETING::get_huid(l_itr->second)); + + // Call on the MCS + FAPI_INVOKE_HWP(l_errl, dmi_io_dccal, l_fapi_mcs_target); + */ + if (l_errl) + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "ERROR 0x%.8X : dmi_io_dccal HWP Target MCS 0x%.8X", + l_errl->reasonCode(), TARGETING::get_huid(l_itr->first)); + + // Create IStep error log and cross reference error that occurred + l_StepError.addErrorDetails( l_errl ); + + // Commit Error + errlCommit( l_errl, HWPF_COMP_ID ); + // We want to continue the training despite the error, so + // no break + } + else + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "SUCCESS : call_dmi_io_dccal HWP - Target 0x%.8X", + TARGETING::get_huid(l_itr->first)); + } + + // io_dccal.C is going to look for a PLL ring with a "stub" + // mem freq -- so set to a default, then clear it (so as not + // to mess up MSS HWP later + //@TODO RTC:133831 + /* + TARGETING::Target* l_membuf_target = + (const_cast<TARGETING::Target*>(l_itr->second)); + l_membuf_target->setAttr<TARGETING::ATTR_MSS_FREQ>(1600); + + // Call on the MEMBUF + FAPI_INVOKE_HWP(l_errl, dmi_io_dccal, l_fapi_membuf_target); + + // Clear MSS_FREQ. This attribute will be set in istep 12 (mss_freq) for good + l_membuf_target->setAttr<TARGETING::ATTR_MSS_FREQ>(0); + */ + if (l_errl) + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "ERROR 0x%.8X : dmi_io_dccal HWP Target Membuf 0x%.8X", + l_errl->reasonCode(), TARGETING::get_huid(l_itr->second)); + + // Create IStep error log and cross reference error that occurred + l_StepError.addErrorDetails( l_errl ); + + // Commit Error + errlCommit( l_errl, HWPF_COMP_ID ); + // We want to continue the training despite the error, so + // no break + } + else + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "SUCCESS : call_dmi_io_dccal HWP - Target 0x%.8X", + TARGETING::get_huid(l_itr->second)); + } + + } + + TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "call_dmi_io_dccal exit" ); +#endif + // end task, returning any errorlogs to IStepDisp + return l_StepError.getErrorHandle(); +} + +}; diff --git a/src/usr/isteps/istep12/call_dmi_scominit.C b/src/usr/isteps/istep12/call_dmi_scominit.C new file mode 100644 index 000000000..31d21171c --- /dev/null +++ b/src/usr/isteps/istep12/call_dmi_scominit.C @@ -0,0 +1,107 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/isteps/istep12/call_dmi_scominit.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +#include <errl/errlentry.H> +#include <errl/errlmanager.H> +#include <initservice/isteps_trace.H> + +#include <isteps/hwpisteperror.H> +#include <errl/errludtarget.H> + +// targeting support. +#include <targeting/common/commontargeting.H> +#include <targeting/common/utilFilter.H> + +using namespace ISTEP; +using namespace ISTEP_ERROR; +using namespace ERRORLOG; +using namespace TARGETING; + + +namespace ISTEP_12 +{ +void* call_dmi_scominit (void *io_pArgs) +{ + errlHndl_t l_errl = NULL; + IStepError l_StepError; + + TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_dmi_scominit entry" ); + + // Get all functional membuf chips + TARGETING::TargetHandleList l_membufTargetList; + getAllChips(l_membufTargetList, TYPE_MEMBUF); + + // Invoke dmi_scominit on each one + for (TargetHandleList::iterator l_membuf_iter = l_membufTargetList.begin(); + l_membuf_iter != l_membufTargetList.end(); + ++l_membuf_iter) + { + const TARGETING::Target* l_pTarget = *l_membuf_iter; + + //@TODO RTC:133831 + /* + const fapi::Target l_fapi_target( + TARGET_TYPE_MEMBUF_CHIP, + reinterpret_cast<void *> + (const_cast<TARGETING::Target*>(l_pTarget))); + + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, "Running cen_dmi_scominit HWP on..."); + EntityPath l_path; + l_path = l_pTarget->getAttr<ATTR_PHYS_PATH>(); + l_path.dump(); + + FAPI_INVOKE_HWP(l_errl, cen_dmi_scominit, l_fapi_target); + */ + if (l_errl) + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, "ERROR 0x%.8X : cen_dmi_scominit HWP returns error", + l_errl->reasonCode()); + + // capture the target data in the elog + ErrlUserDetailsTarget(l_pTarget).addToLog( l_errl ); + + break; + } + else + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, "SUCCESS : dmi_scominit HWP"); + } + } + + if( l_errl ) + { + // Create IStep error log and cross reference error that occurred + l_StepError.addErrorDetails( l_errl); + + // Commit Error + errlCommit( l_errl, HWPF_COMP_ID ); + } + + TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_dmi_scominit exit" ); + + // end task, returning any errorlogs to IStepDisp + return l_StepError.getErrorHandle(); +} + +}; diff --git a/src/usr/isteps/istep12/call_mss_getecid.C b/src/usr/isteps/istep12/call_mss_getecid.C new file mode 100644 index 000000000..2ec3db40b --- /dev/null +++ b/src/usr/isteps/istep12/call_mss_getecid.C @@ -0,0 +1,279 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/isteps/istep12/call_mss_getecid.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +#include <errl/errlentry.H> + +#include <initservice/isteps_trace.H> + +#include <isteps/hwpisteperror.H> +#include <errl/errludtarget.H> + +// targeting support. +#include <targeting/common/commontargeting.H> +#include <targeting/common/utilFilter.H> + +using namespace ISTEP; +using namespace ISTEP_ERROR; +using namespace ERRORLOG; +using namespace TARGETING; + + +namespace ISTEP_12 +{ +void* call_mss_getecid (void *io_pArgs) +{ + IStepError l_StepError; + /* + //@TODO RTC:133831 + errlHndl_t l_err = NULL; + uint8_t l_ddr_port_status = 0; + uint8_t l_cache_enable = 0; + uint8_t l_centaur_sub_revision = 0; + + ecid_user_struct l_ecidUser; // Do not need to be initalized by caller + + mss_get_cen_ecid_ddr_status l_mbaBadMask[2] = + { MSS_GET_CEN_ECID_DDR_STATUS_MBA0_BAD, + MSS_GET_CEN_ECID_DDR_STATUS_MBA1_BAD }; + + TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_mss_getecid entry" ); + + // Get all Centaur targets + TARGETING::TargetHandleList l_membufTargetList; + getAllChips(l_membufTargetList, TYPE_MEMBUF); + + for (TargetHandleList::const_iterator + l_membuf_iter = l_membufTargetList.begin(); + l_membuf_iter != l_membufTargetList.end(); + ++l_membuf_iter) + { + // make a local copy of the target for ease of use + TARGETING::Target* l_pCentaur = *l_membuf_iter; + + // Dump current run on target + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "Running mss_get_cen_ecid HWP on " + "target HUID %.8X", TARGETING::get_huid(l_pCentaur)); + + // Cast to a FAPI type of target. + const fapi::Target l_fapi_centaur( TARGET_TYPE_MEMBUF_CHIP, + (const_cast<TARGETING::Target*>(l_pCentaur)) ); + + // call the HWP with each fapi::Target + // Note: This HWP does not actually return the entire ECID data. It + // updates the attribute ATTR_MSS_ECID and returns the DDR port status + // which is a portion of the ECID data. + FAPI_INVOKE_HWP(l_err, mss_get_cen_ecid, + l_fapi_centaur, l_ddr_port_status, + l_cache_enable, l_centaur_sub_revision, l_ecidUser); + if (l_err) + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "ERROR 0x%.8X: mss_get_cen_ecid HWP returns error", + l_err->reasonCode()); + + // capture the target data in the elog + ErrlUserDetailsTarget(l_pCentaur).addToLog( l_err ); + + // Create IStep error log and cross reference error that occurred + l_StepError.addErrorDetails( l_err ); + + // Commit Error + errlCommit( l_err, HWPF_COMP_ID ); + } + else + { + if (MSS_GET_CEN_ECID_DDR_STATUS_ALL_GOOD != l_ddr_port_status) + { + // Check the DDR port status returned by mss_get_cen_ecid to + // see which MBA is bad. If the MBA's state is + // functional and the DDR port status indicates that it's bad, + // then set the MBA to nonfunctional. If the MBA's state is + // nonfunctional, then do nothing since we don't want to + // override previous settings. + + // Find the functional MBAs associated with this Centaur + PredicateCTM l_mba_pred(CLASS_UNIT,TYPE_MBA); + TARGETING::TargetHandleList l_mbaTargetList; + getChildChiplets(l_mbaTargetList, + l_pCentaur, + TYPE_MBA); + + uint8_t l_num_func_mbas = l_mbaTargetList.size(); + + for (TargetHandleList::const_iterator + l_mba_iter = l_mbaTargetList.begin(); + l_mba_iter != l_mbaTargetList.end(); + ++l_mba_iter) + { + // Make a local copy of the target for ease of use + TARGETING::Target* l_pMBA = *l_mba_iter; + + // Get the MBA chip unit position + ATTR_CHIP_UNIT_type l_pos = + l_pMBA->getAttr<ATTR_CHIP_UNIT>(); + + // Check the DDR port status to see if this MBA should be + // set to nonfunctional. + if ( l_ddr_port_status & l_mbaBadMask[l_pos] ) + { + // call HWAS to deconfigure this target + l_err = HWAS::theDeconfigGard().deconfigureTarget( + *l_pMBA, HWAS::DeconfigGard:: + DECONFIGURED_BY_MEMORY_CONFIG); + l_num_func_mbas--; + + if (l_err) + { + // shouldn't happen, but if it does, stop trying to + // deconfigure targets.. + break; + } + } + } // for + + if (l_err) + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "ERROR: error deconfiguring MBA or Centaur"); + + // Create IStep error log and cross ref error that occurred + l_StepError.addErrorDetails( l_err ); + + // Commit Error + errlCommit( l_err, HWPF_COMP_ID ); + } + } + + // mss_get_cen_ecid returns if the L4 cache is enabled. This can be + // - fapi::ENUM_ATTR_MSS_CACHE_ENABLE_OFF + // - fapi::ENUM_ATTR_MSS_CACHE_ENABLE_ON + // - fapi::ENUM_ATTR_MSS_CACHE_ENABLE_HALF_A + // - fapi::ENUM_ATTR_MSS_CACHE_ENABLE_HALF_B + // - fapi::ENUM_ATTR_MSS_CACHE_ENABLE_UNK_OFF + // - fapi::ENUM_ATTR_MSS_CACHE_ENABLE_UNK_ON + // - fapi::ENUM_ATTR_MSS_CACHE_ENABLE_UNK_HALF_A + // - fapi::ENUM_ATTR_MSS_CACHE_ENABLE_UNK_HALF_B + // The UNK values are for DD1.* Centaur chips where the fuses were + // not blown correctly so the cache may not be in the correct state. + // + // Firmware does not normally support HALF enabled + // If ON then ATTR_MSS_CACHE_ENABLE is set to ON + // Else ATTR_MSS_CACHE_ENABLE is set to OFF and the L4 Target is + // deconfigured + // + // However, an engineer can override ATTR_MSS_CACHE_ENABLE. If they + // override it to HALF_A or HALF_B then + // - ATTR_MSS_CACHE_ENABLE is set to HALF_X + // - The L4 Target is not deconfigured + if (l_cache_enable != fapi::ENUM_ATTR_MSS_CACHE_ENABLE_ON) + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "call_mss_getecid: mss_get_cen_ecid returned L4 not-on (0x%02x)", + l_cache_enable); + l_cache_enable = fapi::ENUM_ATTR_MSS_CACHE_ENABLE_OFF; + } + + // Set the ATTR_MSS_CACHE_ENABLE attribute + l_pCentaur->setAttr<TARGETING::ATTR_MSS_CACHE_ENABLE>( + l_cache_enable); + + // Read the ATTR_MSS_CACHE_ENABLE back to pick up any override + uint8_t l_cache_enable_attr = + l_pCentaur->getAttr<TARGETING::ATTR_MSS_CACHE_ENABLE>(); + + if (l_cache_enable != l_cache_enable_attr) + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "call_mss_getecid: ATTR_MSS_CACHE_ENABLE override (0x%02x)", + l_cache_enable_attr); + } + + // At this point HALF_A/HALF_B are only possible due to override + if ((l_cache_enable_attr != + fapi::ENUM_ATTR_MSS_CACHE_ENABLE_ON) && + (l_cache_enable_attr != + fapi::ENUM_ATTR_MSS_CACHE_ENABLE_HALF_A) && + (l_cache_enable_attr != + fapi::ENUM_ATTR_MSS_CACHE_ENABLE_HALF_B)) + { + // Deconfigure the L4 Cache Targets (there should be 1) + TargetHandleList l_list; + getChildChiplets(l_list, l_pCentaur, TYPE_L4, false); + + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "call_mss_getecid: deconfiguring %d L4s (Centaur huid: 0x%.8X)", + l_list.size(), get_huid(l_pCentaur)); + + for (TargetHandleList::const_iterator + l_l4_iter = l_list.begin(); + l_l4_iter != l_list.end(); + ++l_l4_iter) + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "call_mss_getecid: deconfiguring L4 (huid: 0x%.8X)", + get_huid( *l_l4_iter)); + + l_err = HWAS::theDeconfigGard(). + deconfigureTarget(**l_l4_iter , + HWAS::DeconfigGard:: + DECONFIGURED_BY_MEMORY_CONFIG); + + if (l_err) + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "ERROR: error deconfiguring Centaur L4"); + + // Create IStep error log + // and cross reference error that occurred + l_StepError.addErrorDetails( l_err); + + // Commit Error + errlCommit(l_err, HWPF_COMP_ID); + } + } + } + else + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "call_mss_getecid: Centaur L4 good, not deconfiguring"); + } + } + + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "SUCCESS : mss_get_cen_ecid HWP( )" ); + } + + #ifdef CONFIG_BMC_IPMI + // Gather + Send the IPMI Fru Inventory data to the BMC + IPMIFRUINV::setData(true); + #endif + + TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_mss_getecid exit" ); +*/ + // end task, returning any errorlogs to IStepDisp + return l_StepError.getErrorHandle(); +} + +}; diff --git a/src/usr/isteps/istep12/call_proc_dmi_scominit.C b/src/usr/isteps/istep12/call_proc_dmi_scominit.C new file mode 100644 index 000000000..4d822cd92 --- /dev/null +++ b/src/usr/isteps/istep12/call_proc_dmi_scominit.C @@ -0,0 +1,106 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/isteps/istep12/call_proc_dmi_scominit.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +#include <errl/errlentry.H> +#include <errl/errlmanager.H> +#include <initservice/isteps_trace.H> + +#include <isteps/hwpisteperror.H> +#include <errl/errludtarget.H> + +// targeting support. +#include <targeting/common/commontargeting.H> +#include <targeting/common/utilFilter.H> + +using namespace ISTEP; +using namespace ISTEP_ERROR; +using namespace ERRORLOG; +using namespace TARGETING; + +namespace ISTEP_12 +{ +void* call_proc_dmi_scominit (void *io_pArgs) +{ + errlHndl_t l_errl = NULL; + IStepError l_StepError; + + TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_proc_dmi_scominit entry" ); + + // Get all functional MCS chiplets + TARGETING::TargetHandleList l_mcsTargetList; + getAllChiplets(l_mcsTargetList, TYPE_MCS); + + // Invoke dmi_scominit on each one + for (TargetHandleList::const_iterator + l_mcs_iter = l_mcsTargetList.begin(); + l_mcs_iter != l_mcsTargetList.end(); + ++l_mcs_iter) + { + const TARGETING::Target* l_pTarget = *l_mcs_iter; + + //@TODO RTC:133831 + /* + const fapi::Target l_fapi_target( TARGET_TYPE_MCS_CHIPLET, + (const_cast<TARGETING::Target*>(l_pTarget))); + + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "Running proc_dmi_scominit HWP on " + "target HUID %.8X", TARGETING::get_huid(l_pTarget)); + + FAPI_INVOKE_HWP(l_errl, proc_dmi_scominit, l_fapi_target); + */ + if (l_errl) + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "ERROR 0x%.8X : proc_dmi_scominit HWP returns error", + l_errl->reasonCode()); + + // capture the target data in the elog + ErrlUserDetailsTarget(l_pTarget).addToLog( l_errl ); + + break; + } + else + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, "SUCCESS : proc_dmi_scominit HWP"); + } + } + + if( l_errl ) + { + + // Create IStep error log and cross reference error that occurred + l_StepError.addErrorDetails( l_errl); + + // Commit Error + errlCommit( l_errl, HWPF_COMP_ID ); + } + + TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_proc_dmi_scominit exit" ); + + // end task, returning any errorlogs to IStepDisp + return l_StepError.getErrorHandle(); +} + +}; diff --git a/src/usr/isteps/istep12/makefile b/src/usr/isteps/istep12/makefile new file mode 100644 index 000000000..7d4527f0d --- /dev/null +++ b/src/usr/isteps/istep12/makefile @@ -0,0 +1,35 @@ +# IBM_PROLOG_BEGIN_TAG +# This is an automatically generated prolog. +# +# $Source: src/usr/isteps/istep12/makefile $ +# +# OpenPOWER HostBoot Project +# +# Contributors Listed Below - COPYRIGHT 2015 +# [+] International Business Machines Corp. +# +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or +# implied. See the License for the specific language governing +# permissions and limitations under the License. +# +# IBM_PROLOG_END_TAG +ROOTPATH = ../../../.. +MODULE = istep12 + +OBJS += call_mss_getecid.o +OBJS += call_dmi_attr_update.o +OBJS += call_proc_dmi_scominit.o +OBJS += call_dmi_scominit.o +OBJS += call_dmi_erepair.o +OBJS += call_dmi_io_dccal.o + +include ${ROOTPATH}/config.mk diff --git a/src/usr/isteps/makefile b/src/usr/isteps/makefile index 7c1e4406a..8e0d560b9 100644 --- a/src/usr/isteps/makefile +++ b/src/usr/isteps/makefile @@ -30,6 +30,8 @@ SUBDIRS+=istep07.d SUBDIRS+=istep08.d SUBDIRS+=istep09.d SUBDIRS+=istep10.d +SUBDIRS+=istep11.d +SUBDIRS+=istep12.d OBJS += hwpisteperror.o OBJS += hwpistepud.o |