summaryrefslogtreecommitdiffstats
path: root/src/usr/hwpf/hwp
diff options
context:
space:
mode:
Diffstat (limited to 'src/usr/hwpf/hwp')
-rw-r--r--src/usr/hwpf/hwp/dram_training/memory_errors.xml56
-rwxr-xr-xsrc/usr/hwpf/hwp/include/cen_scom_addresses.H24
-rw-r--r--src/usr/hwpf/hwp/proc_cfam_registers.xml20
-rw-r--r--src/usr/hwpf/hwp/proc_sbe_registers.xml13
4 files changed, 61 insertions, 52 deletions
diff --git a/src/usr/hwpf/hwp/dram_training/memory_errors.xml b/src/usr/hwpf/hwp/dram_training/memory_errors.xml
index 3b82da84b..d3a6cb2c8 100644
--- a/src/usr/hwpf/hwp/dram_training/memory_errors.xml
+++ b/src/usr/hwpf/hwp/dram_training/memory_errors.xml
@@ -21,7 +21,7 @@
<!-- -->
<!-- IBM_PROLOG_END_TAG -->
<hwpErrors>
-<!-- $Id: memory_errors.xml,v 1.41 2013/06/19 18:27:28 bellows Exp $ -->
+<!-- $Id: memory_errors.xml,v 1.42 2013/08/22 19:44:10 mjjones Exp $ -->
<!-- EDIT THIS FILE DIRECTLY. THE ODS FILE METHOD IS NO LONGER VALID -->
<!-- *********************************************************************** -->
@@ -334,10 +334,10 @@
<registerFfdc>
<id>REG_FFDC_MBI_FIR_REGS</id>
- <scomRegister>CEN_MBIFIRQ_0x02010800</scomRegister>
- <scomRegister>CEN_MBIFIRMASK_0x02010803</scomRegister>
- <scomRegister>CEN_MBIFIRACT0_0x02010806</scomRegister>
- <scomRegister>CEN_MBIFIRACT1_0x02010807</scomRegister>
+ <scomRegister>MBI_FIR_0x02010800</scomRegister>
+ <scomRegister>MBI_FIRMASK_0x02010803</scomRegister>
+ <scomRegister>MBI_FIRACT0_0x02010806</scomRegister>
+ <scomRegister>MBI_FIRACT1_0x02010807</scomRegister>
</registerFfdc>
<registerFfdc>
@@ -360,35 +360,35 @@
<scomRegister>MBS_ECC1_MBECCFIR_ACTION1_0x02011487</scomRegister>
<scomRegister>MBS_ECC1_MBECCFIR_WOF_0x02011488</scomRegister>
- <scomRegister>CEN_MBS01_MBSFIRQ_0x02011600</scomRegister>
- <scomRegister>CEN_MBS01_MBSFIRMASK_0x02011603</scomRegister>
- <scomRegister>CEN_MBS01_MBSFIRACT0_0x02011606</scomRegister>
- <scomRegister>CEN_MBS01_MBSFIRACT1_0x02011607</scomRegister>
- <scomRegister>CEN_MBS01_MBSFIRWOF_0x02011608</scomRegister>
-
- <scomRegister>CEN_MBS23_MBSFIRQ_0x02011700</scomRegister>
- <scomRegister>CEN_MBS23_MBSFIRMASK_0x02011703</scomRegister>
- <scomRegister>CEN_MBS23_MBSFIRACT0_0x02011706</scomRegister>
- <scomRegister>CEN_MBS23_MBSFIRACT1_0x02011707</scomRegister>
- <scomRegister>CEN_MBS23_MBSFIRWOF_0x02011708</scomRegister>
+ <scomRegister>MBS01_MBSFIRQ_0x02011600</scomRegister>
+ <scomRegister>MBS01_MBSFIRMASK_0x02011603</scomRegister>
+ <scomRegister>MBS01_MBSFIRACT0_0x02011606</scomRegister>
+ <scomRegister>MBS01_MBSFIRACT1_0x02011607</scomRegister>
+ <scomRegister>MBS01_MBSFIRWOF_0x02011608</scomRegister>
+
+ <scomRegister>MBS23_MBSFIRQ_0x02011700</scomRegister>
+ <scomRegister>MBS23_MBSFIRMASK_0x02011703</scomRegister>
+ <scomRegister>MBS23_MBSFIRACT0_0x02011706</scomRegister>
+ <scomRegister>MBS23_MBSFIRACT1_0x02011707</scomRegister>
+ <scomRegister>MBS23_MBSFIRWOF_0x02011708</scomRegister>
</registerFfdc>
<registerFfdc>
<id>REG_FFDC_SCAC_FIR_REGS</id>
- <scomRegister>CEN_SCAC_LFIR_0x020115c0</scomRegister>
- <scomRegister>CEN_SCAC_FIRMASK_0x020115c3</scomRegister>
- <scomRegister>CEN_SCAC_FIRACTION0_0x020115c6</scomRegister>
- <scomRegister>CEN_SCAC_FIRACTION1_0x020115c7</scomRegister>
- <scomRegister>CEN_SCAC_FIRWOF_0x020115c8</scomRegister>
+ <scomRegister>SCAC_LFIR_0x020115C0</scomRegister>
+ <scomRegister>SCAC_FIRMASK_0x020115C3</scomRegister>
+ <scomRegister>SCAC_FIRACTION0_0x020115C6</scomRegister>
+ <scomRegister>SCAC_FIRACTION1_0x020115C7</scomRegister>
+ <scomRegister>SCAC_FIRWOF_0x020115C8</scomRegister>
</registerFfdc>
<registerFfdc>
<id>REG_FFDC_DDR_PHY_FIR_REGS</id>
- <scomRegister>PHY01_DDRPHY_FIR_REG_0x800200900301143fULL</scomRegister>
- <scomRegister>PHY01_DDRPHY_FIR_MASK_REG_0x800200930301143fULL</scomRegister>
- <scomRegister>PHY01_DDRPHY_FIR_ACTION0_REG_0x800200960301143fULL</scomRegister>
- <scomRegister>PHY01_DDRPHY_FIR_ACTION1_REG_0x800200970301143fULL</scomRegister>
- <scomRegister>PHY01_DDRPHY_FIR_WOF_REG_0x800200980301143fULL</scomRegister>
+ <scomRegister>PHY01_DDRPHY_FIR_REG_0x800200900301143f</scomRegister>
+ <scomRegister>PHY01_DDRPHY_FIR_MASK_REG_0x800200930301143f</scomRegister>
+ <scomRegister>PHY01_DDRPHY_FIR_ACTION0_REG_0x800200960301143f</scomRegister>
+ <scomRegister>PHY01_DDRPHY_FIR_ACTION1_REG_0x800200970301143f</scomRegister>
+ <scomRegister>PHY01_DDRPHY_FIR_WOF_REG_0x800200980301143f</scomRegister>
</registerFfdc>
<registerFfdc>
@@ -396,8 +396,8 @@
<scomRegister>CEN_DMIFIR_0x02010400</scomRegister>
<scomRegister>CEN_DMIFIR_MASK_0x02010403</scomRegister>
<scomRegister>CEN_DMIFIR_ACT0_0x02010406</scomRegister>
- <scomRegister>CEN_DMIFIR_ACT0_0x02010407</scomRegister>
- <scomRegister>CEN_DMIFIR_ACT0_0x02010408</scomRegister>
+ <scomRegister>CEN_DMIFIR_ACT1_0x02010407</scomRegister>
+ <scomRegister>CEN_DMIFIR_WOF_0x02010408</scomRegister>
</registerFfdc>
<!-- EDIT THIS FILE DIRECTLY. THE ODS FILE METHOD IS NO LONGER VALID -->
diff --git a/src/usr/hwpf/hwp/include/cen_scom_addresses.H b/src/usr/hwpf/hwp/include/cen_scom_addresses.H
index 2309fafe7..12c93fde2 100755
--- a/src/usr/hwpf/hwp/include/cen_scom_addresses.H
+++ b/src/usr/hwpf/hwp/include/cen_scom_addresses.H
@@ -20,7 +20,7 @@
/* Origin: 30 */
/* */
/* IBM_PROLOG_END_TAG */
-// $Id: cen_scom_addresses.H,v 1.63 2013/06/18 15:20:21 mwuu Exp $
+// $Id: cen_scom_addresses.H,v 1.64 2013/08/22 19:46:32 mjjones Exp $
// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/centaur/working/procedures/cen_scom_addresses.H,v $
//------------------------------------------------------------------------------
// *! (C) Copyright International Business Machines Corp. 2011
@@ -709,8 +709,16 @@ CONST_UINT64_T( MBA01_MBA_WRD_MODE_0x03010449 , ULL(0x03010449) );
//------------------------------------------------------------------------------
CONST_UINT64_T( MBA01_MBARPC0Q_0x03010434 ,ULL(0x03010434) );
-
-
+//------------------------------------------------------------------------------
+// DMI FIR Registers
+//------------------------------------------------------------------------------
+CONST_UINT64_T( CEN_DMIFIR_0x02010400 , ULL(0x02010400) );
+CONST_UINT64_T( CEN_DMIFIR_MASK_0x02010403 , ULL(0x02010403) );
+CONST_UINT64_T( CEN_DMIFIR_MASK_AND_0x02010404 , ULL(0x02010404) );
+CONST_UINT64_T( CEN_DMIFIR_MASK_OR_0x02010405 , ULL(0x02010405) );
+CONST_UINT64_T( CEN_DMIFIR_ACT0_0x02010406 , ULL(0x02010406) );
+CONST_UINT64_T( CEN_DMIFIR_ACT1_0x02010407 , ULL(0x02010407) );
+CONST_UINT64_T( CEN_DMIFIR_WOF_0x02010408 , ULL(0x02010408) );
//------------------------------------------------------------------------------
// Address Translate Control Registers
@@ -729,6 +737,7 @@ CONST_UINT64_T( MBS_ECC0_MBECCFIR_MASK_AND_0x02011444 , ULL(0x02011444) );
CONST_UINT64_T( MBS_ECC0_MBECCFIR_MASK_OR_0x02011445 , ULL(0x02011445) );
CONST_UINT64_T( MBS_ECC0_MBECCFIR_ACTION0_0x02011446 , ULL(0x02011446) );
CONST_UINT64_T( MBS_ECC0_MBECCFIR_ACTION1_0x02011447 , ULL(0x02011447) );
+CONST_UINT64_T( MBS_ECC0_MBECCFIR_WOF_0x02011448 , ULL(0x02011448) );
CONST_UINT64_T( MBS_ECC1_MBECCFIR_0x02011480 , ULL(0x02011480) );
CONST_UINT64_T( MBS_ECC0_MBECCFIR_AND_0x02011481 , ULL(0x02011481) );
@@ -738,6 +747,7 @@ CONST_UINT64_T( MBS_ECC1_MBECCFIR_MASK_AND_0x02011484 , ULL(0x02011484) );
CONST_UINT64_T( MBS_ECC1_MBECCFIR_MASK_OR_0x02011485 , ULL(0x02011485) );
CONST_UINT64_T( MBS_ECC1_MBECCFIR_ACTION0_0x02011486 , ULL(0x02011486) );
CONST_UINT64_T( MBS_ECC1_MBECCFIR_ACTION1_0x02011487 , ULL(0x02011487) );
+CONST_UINT64_T( MBS_ECC1_MBECCFIR_WOF_0x02011488 , ULL(0x02011488) );
//------------------------------------------------------------------------------
// MBS ECC Error Report Hold Registers
@@ -991,6 +1001,7 @@ CONST_UINT64_T( MBS_FIR_MASK_REG_AND_0x02011404 , ULL(0x02011404) );
CONST_UINT64_T( MBS_FIR_MASK_REG_OR_0x02011405 , ULL(0x02011405) );
CONST_UINT64_T( MBS_FIR_ACTION0_REG_0x02011406 , ULL(0x02011406) );
CONST_UINT64_T( MBS_FIR_ACTION1_REG_0x02011407 , ULL(0x02011407) );
+CONST_UINT64_T( MBS_FIR_WOF_REG_0x02011408 , ULL(0x02011408) );
//------------------------------------------------------------------------------
// DDRPHY FIR Registers
@@ -1001,6 +1012,7 @@ CONST_UINT64_T( PHY01_DDRPHY_FIR_MASK_REG_AND_0x800200940301143f , ULL(0x8002
CONST_UINT64_T( PHY01_DDRPHY_FIR_MASK_REG_OR_0x800200950301143f , ULL(0x800200950301143f) );
CONST_UINT64_T( PHY01_DDRPHY_FIR_ACTION0_REG_0x800200960301143f , ULL(0x800200960301143f) );
CONST_UINT64_T( PHY01_DDRPHY_FIR_ACTION1_REG_0x800200970301143f , ULL(0x800200970301143f) );
+CONST_UINT64_T( PHY01_DDRPHY_FIR_WOF_REG_0x800200980301143f , ULL(0x800200980301143f) );
//------------------------------------------------------------------------------
// MBA RRQ0 Register - DDR read command parameters
@@ -1025,6 +1037,7 @@ CONST_UINT64_T( MBS01_MBSFIRMASK_AND_0x02011604 , ULL(0x02011604) );
CONST_UINT64_T( MBS01_MBSFIRMASK_OR_0x02011605 , ULL(0x02011605) );
CONST_UINT64_T( MBS01_MBSFIRACT0_0x02011606 , ULL(0x02011606) );
CONST_UINT64_T( MBS01_MBSFIRACT1_0x02011607 , ULL(0x02011607) );
+CONST_UINT64_T( MBS01_MBSFIRWOF_0x02011608 , ULL(0x02011608) );
CONST_UINT64_T( MBS23_MBSFIRQ_0x02011700 , ULL(0x02011700) );
CONST_UINT64_T( MBS23_MBSFIRMASK_0x02011703 , ULL(0x02011703) );
@@ -1032,6 +1045,7 @@ CONST_UINT64_T( MBS23_MBSFIRMASK_AND_0x02011704 , ULL(0x02011704) );
CONST_UINT64_T( MBS23_MBSFIRMASK_OR_0x02011705 , ULL(0x02011705) );
CONST_UINT64_T( MBS23_MBSFIRACT0_0x02011706 , ULL(0x02011706) );
CONST_UINT64_T( MBS23_MBSFIRACT1_0x02011707 , ULL(0x02011707) );
+CONST_UINT64_T( MBS23_MBSFIRWOF_0x02011708 , ULL(0x02011708) );
//------------------------------------------------------------------------------
// SCAC Registers
@@ -1042,6 +1056,7 @@ CONST_UINT64_T( SCAC_FIRMASK_AND_0x020115C4 , ULL(0x020115C4) );
CONST_UINT64_T( SCAC_FIRMASK_OR_0x020115C5 , ULL(0x020115C5) );
CONST_UINT64_T( SCAC_FIRACTION0_0x020115C6 , ULL(0x020115C6) );
CONST_UINT64_T( SCAC_FIRACTION1_0x020115C7 , ULL(0x020115C7) );
+CONST_UINT64_T( SCAC_FIRWOF_0x020115C8 , ULL(0x020115C8) );
//------------------------------------------------------------------------------
// DQ/DQS Slew Registers
@@ -1741,6 +1756,9 @@ This section is automatically updated by CVS when you check in this file.
Be sure to create CVS comments when you commit so that they can be included here.
$Log: cen_scom_addresses.H,v $
+Revision 1.64 2013/08/22 19:46:32 mjjones
+Added DMI-FIR and WOF registers
+
Revision 1.63 2013/06/18 15:20:21 mwuu
Fixed naming of IO_FET_SLICE_EN_MAP1_P0_ADR0:3
diff --git a/src/usr/hwpf/hwp/proc_cfam_registers.xml b/src/usr/hwpf/hwp/proc_cfam_registers.xml
index bf5f70b5e..861a1c6df 100644
--- a/src/usr/hwpf/hwp/proc_cfam_registers.xml
+++ b/src/usr/hwpf/hwp/proc_cfam_registers.xml
@@ -20,27 +20,27 @@
<!-- Origin: 30 -->
<!-- -->
<!-- IBM_PROLOG_END_TAG -->
-<!-- $Id: proc_cfam_registers.xml,v 1.3 2013/06/21 14:31:01 jeshua Exp $ -->
+<!-- $Id: proc_cfam_registers.xml,v 1.4 2013/08/22 19:41:45 mjjones Exp $ -->
<!-- Definition of cfam registers to collect on some errors -->
<hwpErrors>
<!-- processor cfam registers -->
<registerFfdc>
<id>REG_FFDC_PROC_CFAM_REGISTERS</id>
- <cfamRegister>FSI_STATUS_0x1007</cfamRegister>
- <cfamRegister>FSI_GP3_0x2812</cfamRegister>
- <cfamRegister>FSI_GP4_0x2813</cfamRegister>
- <cfamRegister>FSI_GP5_0x2814</cfamRegister>
- <cfamRegister>FSI_GP6_0x2815</cfamRegister>
- <cfamRegister>FSI_GP7_0x2816</cfamRegister>
- <cfamRegister>FSI_GP8_0x2817</cfamRegister>
- <cfamRegister>FSI_GP3MIR_0x281B</cfamRegister>
+ <cfamRegister>CFAM_FSI_STATUS_0x00001007</cfamRegister>
+ <cfamRegister>CFAM_FSI_GP3_0x00002812</cfamRegister>
+ <cfamRegister>CFAM_FSI_GP4_0x00002813</cfamRegister>
+ <cfamRegister>CFAM_FSI_GP5_0x00002814</cfamRegister>
+ <cfamRegister>CFAM_FSI_GP6_0x00002815</cfamRegister>
+ <cfamRegister>CFAM_FSI_GP7_0x00002816</cfamRegister>
+ <cfamRegister>CFAM_FSI_GP8_0x00002817</cfamRegister>
+ <cfamRegister>CFAM_FSI_GP3_MIRROR_0x0000281B</cfamRegister>
<cfamRegister>CFAM_FSI_SBE_VITAL_0x0000281C</cfamRegister>
<cfamRegister>CFAM_FSI_WRITE_PROTECT_0x00002818</cfamRegister>
</registerFfdc>
<!-- Just the Status and SBE vital regs -->
<registerFfdc>
<id>REG_FFDC_PROC_STATUS_AND_SBE_VITAL_REGISTERS</id>
- <cfamRegister>FSI_STATUS_0x1007</cfamRegister>
+ <cfamRegister>CFAM_FSI_STATUS_0x00001007</cfamRegister>
<cfamRegister>CFAM_FSI_SBE_VITAL_0x0000281C</cfamRegister>
</registerFfdc>
<!-- processor mailbox registers -->
diff --git a/src/usr/hwpf/hwp/proc_sbe_registers.xml b/src/usr/hwpf/hwp/proc_sbe_registers.xml
index a6de24830..bd465197d 100644
--- a/src/usr/hwpf/hwp/proc_sbe_registers.xml
+++ b/src/usr/hwpf/hwp/proc_sbe_registers.xml
@@ -5,7 +5,7 @@
<!-- -->
<!-- IBM CONFIDENTIAL -->
<!-- -->
-<!-- COPYRIGHT International Business Machines Corp. 2012 -->
+<!-- COPYRIGHT International Business Machines Corp. 2012,2013 -->
<!-- -->
<!-- p1 -->
<!-- -->
@@ -20,18 +20,11 @@
<!-- Origin: 30 -->
<!-- -->
<!-- IBM_PROLOG_END_TAG -->
+<!-- $Id: proc_sbe_registers.xml,v 1.3 2013/04/25 19:55:25 jeshua Exp $ -->
<!-- Definition of SBE registers to collect on some errors -->
<hwpErrors>
<registerFfdc>
<id>REG_FFDC_PROC_SBE_REGISTERS</id>
- <cfamRegister>FSI_STATUS_0x1007</cfamRegister>
- <cfamRegister> FSI_GP3_0x2812</cfamRegister>
- <cfamRegister>FSI_GP4_0x2813</cfamRegister>
- <cfamRegister>FSI_GP5_0x2814</cfamRegister>
- <cfamRegister>FSI_GP6_0x2815</cfamRegister>
- <cfamRegister>FSI_GP7_0x2816</cfamRegister>
- <cfamRegister>FSI_GP8_0x2817</cfamRegister>
- <cfamRegister>FSI_GP3MIR_0x281B</cfamRegister>
<scomRegister>PORE_SBE_STATUS_0x000E0000</scomRegister>
<scomRegister>PORE_SBE_CONTROL_0x000E0001</scomRegister>
<scomRegister>PORE_SBE_RESET_0x000E0002</scomRegister>
@@ -58,7 +51,5 @@
<scomRegister>PORE_SBE_I2C_E0_PARAM_0x000E0017</scomRegister>
<scomRegister>PORE_SBE_I2C_E1_PARAM_0x000E0018</scomRegister>
<scomRegister>PORE_SBE_I2C_E2_PARAM_0x000E0019</scomRegister>
- <scomRegister>PIBMEM_STATUS_0x00088005</scomRegister>
- <scomRegister>TP_CLK_STATUS_0x01030008</scomRegister>
</registerFfdc>
</hwpErrors>
OpenPOWER on IntegriCloud