diff options
Diffstat (limited to 'src/usr/hwpf/hwp/dram_training/mss_ddr_phy_reset/memory_mss_ddr_phy_reset.xml')
| -rw-r--r-- | src/usr/hwpf/hwp/dram_training/mss_ddr_phy_reset/memory_mss_ddr_phy_reset.xml | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/src/usr/hwpf/hwp/dram_training/mss_ddr_phy_reset/memory_mss_ddr_phy_reset.xml b/src/usr/hwpf/hwp/dram_training/mss_ddr_phy_reset/memory_mss_ddr_phy_reset.xml new file mode 100644 index 000000000..9e1c7abfc --- /dev/null +++ b/src/usr/hwpf/hwp/dram_training/mss_ddr_phy_reset/memory_mss_ddr_phy_reset.xml @@ -0,0 +1,54 @@ +<!-- IBM_PROLOG_BEGIN_TAG --> +<!-- This is an automatically generated prolog. --> +<!-- --> +<!-- $Source: src/usr/hwpf/hwp/dram_training/mss_ddr_phy_reset/memory_mss_ddr_phy_reset.xml $ --> +<!-- --> +<!-- IBM CONFIDENTIAL --> +<!-- --> +<!-- COPYRIGHT International Business Machines Corp. 2013 --> +<!-- --> +<!-- p1 --> +<!-- --> +<!-- Object Code Only (OCO) source materials --> +<!-- Licensed Internal Code Source Materials --> +<!-- IBM HostBoot Licensed Internal Code --> +<!-- --> +<!-- The source code for this program is not published or otherwise --> +<!-- divested of its trade secrets, irrespective of what has been --> +<!-- deposited with the U.S. Copyright Office. --> +<!-- --> +<!-- Origin: 30 --> +<!-- --> +<!-- IBM_PROLOG_END_TAG --> +<hwpErrors> +<!-- $Id: memory_mss_ddr_phy_reset.xml,v 1.1 2013/06/19 18:27:43 bellows Exp $ --> +<!-- For file ../../ipl/fapi/mss_ddr_phy_reset.C --> +<!-- // *! OWNER NAME : Mark Fredrickson Email: mfred@us.ibm.com --> +<!-- // *! BACKUP NAME : Mark Bellows Email: bellows@us.ibm.com --> + +<!-- Original Source for RC_MSS_DP18_0_PLL_FAILED_TO_LOCK memory_errors.xml --> + <hwpError> + <rc>RC_MSS_DP18_0_PLL_FAILED_TO_LOCK</rc> + <description>DP18 0x0C000 PLL failed to lock! See lock status register at address: 0x8000C0000301143F</description> +</hwpError> + +<!-- Original Source for RC_MSS_DP18_1_PLL_FAILED_TO_LOCK memory_errors.xml --> + <hwpError> + <rc>RC_MSS_DP18_1_PLL_FAILED_TO_LOCK</rc> + <description>DP18 0x1C000 PLL failed to lock! See lock status register at address: 0x8001C0000301143F</description> +</hwpError> + +<!-- Original Source for RC_MSS_AD32S_0_PLL_FAILED_TO_LOCK memory_errors.xml --> + <hwpError> + <rc>RC_MSS_AD32S_0_PLL_FAILED_TO_LOCK</rc> + <description>AD32S 0x0C001 PLL failed to lock! See lock status register at address: 0x8000C0010301143F</description> +</hwpError> + +<!-- Original Source for RC_MSS_AD32S_1_PLL_FAILED_TO_LOCK memory_errors.xml --> + <hwpError> + <rc>RC_MSS_AD32S_1_PLL_FAILED_TO_LOCK</rc> + <description>AD32S 0x1C001 PLL failed to lock! See lock status register at address: 0x8001C0010301143F</description> +</hwpError> + + +</hwpErrors> |
