diff options
Diffstat (limited to 'src/usr/fsiscom/test/fsiscomtest.H')
| -rw-r--r-- | src/usr/fsiscom/test/fsiscomtest.H | 133 |
1 files changed, 107 insertions, 26 deletions
diff --git a/src/usr/fsiscom/test/fsiscomtest.H b/src/usr/fsiscom/test/fsiscomtest.H index 5c570793b..16481987d 100644 --- a/src/usr/fsiscom/test/fsiscomtest.H +++ b/src/usr/fsiscom/test/fsiscomtest.H @@ -1,43 +1,124 @@ -// IBM_PROLOG_BEGIN_TAG -// This is an automatically generated prolog. -// -// $Source: src/usr/fsiscom/test/fsiscomtest.H $ -// -// IBM CONFIDENTIAL -// -// COPYRIGHT International Business Machines Corp. 2011 -// -// p1 -// -// Object Code Only (OCO) source materials -// Licensed Internal Code Source Materials -// IBM HostBoot Licensed Internal Code -// -// The source code for this program is not published or other- -// wise divested of its trade secrets, irrespective of what has -// been deposited with the U.S. Copyright Office. -// -// Origin: 30 -// -// IBM_PROLOG_END +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/fsiscom/test/fsiscomtest.H $ */ +/* */ +/* IBM CONFIDENTIAL */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2011,2013 */ +/* */ +/* p1 */ +/* */ +/* Object Code Only (OCO) source materials */ +/* Licensed Internal Code Source Materials */ +/* IBM HostBoot Licensed Internal Code */ +/* */ +/* The source code for this program is not published or otherwise */ +/* divested of its trade secrets, irrespective of what has been */ +/* deposited with the U.S. Copyright Office. */ +/* */ +/* Origin: 30 */ +/* */ +/* IBM_PROLOG_END_TAG */ #include <cxxtest/TestSuite.H> #include <errl/errlmanager.H> #include <errl/errlentry.H> #include <limits.h> #include <devicefw/driverif.H> +#include <fsiscom/fsiscom_reasoncodes.H> +extern trace_desc_t* g_trac_fsiscom; class FsiScomTest : public CxxTest::TestSuite { public: /** - * @brief test1 + * @brief Test error path and recovery */ - void test_fsiScom(void) + void test_Error(void) { + TRACFCOMP( g_trac_fsiscom, "FsiScomTest::test_Error> Start" ); - //FSISCOM testing driving by SCOM device driver. This allows for testing FSISCOM <-> XSCOM - //coherency. + //@fixme: RTC:80081 + TRACFCOMP( g_trac_fsiscom, "FsiScomTest::test_Error> Disabling test until D892724 is in a build" ); +#if 0 + uint64_t fails = 0; + uint64_t total = 0; + errlHndl_t l_err = NULL; + uint64_t regdata = 0; + size_t op_size = sizeof(uint64_t); + + // Centaur target + TARGETING::EntityPath epath(TARGETING::EntityPath::PATH_PHYSICAL); + epath.addLast(TARGETING::TYPE_SYS,0); + epath.addLast(TARGETING::TYPE_NODE,0); + epath.addLast(TARGETING::TYPE_MEMBUF,4); + TARGETING::Target* fsi_target = + TARGETING::targetService().toTarget(epath); + if( fsi_target == NULL ) + { + TRACFCOMP( g_trac_fsiscom, "FsiScomTest::test_Error> Target is NULL" ); + TS_FAIL( "FsiScomTest::test_Error> Target is NULL" ); + } + + // Bad address read + total++; + l_err = DeviceFW::deviceOp( + DeviceFW::READ, + fsi_target, + ®data, + op_size, + DEVICE_FSISCOM_ADDRESS(0x11111111) ); + if( l_err && (l_err->reasonCode() == FSISCOM::RC_READ_ERROR) ) + { + delete l_err; + } + else + { + TRACFCOMP(g_trac_fsiscom, "FsiScomTest::test_Error> No/wrong error for bad address read, RC=%X", ERRL_GETRC_SAFE(l_err) ); + TS_FAIL( "FsiScomTest::test_Error> No/wrong error for bad address read" ); + fails++; + if( l_err ) { errlCommit(l_err,FSISCOM_COMP_ID); } + } + + // Bad address write + total++; + l_err = DeviceFW::deviceOp( + DeviceFW::WRITE, + fsi_target, + ®data, + op_size, + DEVICE_FSISCOM_ADDRESS(0x00222222) ); + if( l_err && (l_err->reasonCode() == FSISCOM::RC_WRITE_ERROR) ) + { + delete l_err; + } + else + { + TRACFCOMP(g_trac_fsiscom, "FsiScomTest::test_Error> No/wrong error for bad address write, RC=%X", ERRL_GETRC_SAFE(l_err) ); + TS_FAIL( "FsiScomTest::test_Error> No/wrong error for bad address write" ); + fails++; + if( l_err ) { errlCommit(l_err,FSISCOM_COMP_ID); } + } + + // Do a good scom to prove things are working again + total++; + l_err = DeviceFW::deviceOp( + DeviceFW::READ, + fsi_target, + ®data, + op_size, + DEVICE_FSISCOM_ADDRESS(0x02011403) ); + if( l_err ) + { + TRACFCOMP(g_trac_fsiscom, "FsiScomTest::test_Error> Error reading 0x02011403, RC=%X", ERRL_GETRC_SAFE(l_err) ); + TS_FAIL( "FsiScomTest::test_Error> Error reading 0x02011403" ); + fails++; + errlCommit(l_err,FSISCOM_COMP_ID); + } + + TRACFCOMP( g_trac_fsiscom, "FsiScomTest::test_Error> %d/%d fails", fails, total ); +#endif }; }; |
