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Diffstat (limited to 'src/usr/diag/prdf/plat/pegasus/Proc.rule')
| -rw-r--r-- | src/usr/diag/prdf/plat/pegasus/Proc.rule | 332 |
1 files changed, 332 insertions, 0 deletions
diff --git a/src/usr/diag/prdf/plat/pegasus/Proc.rule b/src/usr/diag/prdf/plat/pegasus/Proc.rule new file mode 100644 index 000000000..39e9a469b --- /dev/null +++ b/src/usr/diag/prdf/plat/pegasus/Proc.rule @@ -0,0 +1,332 @@ +# IBM_PROLOG_BEGIN_TAG +# This is an automatically generated prolog. +# +# $Source: src/usr/diag/prdf/plat/pegasus/Proc.rule $ +# +# IBM CONFIDENTIAL +# +# COPYRIGHT International Business Machines Corp. 2012 +# +# p1 +# +# Object Code Only (OCO) source materials +# Licensed Internal Code Source Materials +# IBM HostBoot Licensed Internal Code +# +# The source code for this program is not published or otherwise +# divested of its trade secrets, irrespective of what has been +# deposited with the U.S. Copyright Office. +# +# Origin: 30 +# +# IBM_PROLOG_END_TAG + +################################################################################ +# +# Scope: +# Registers and actions for the following chiplets: +# +# Chiplet Register Adddresses Description +# ======= ======================= ============================================ +# TP 0x01000000 - 0x01FFFFFF TP pervasive logic +# PB 0x02000000 - 0x02FFFFFF PB pervasive logic, note that this does +# include the SCOM addresses characterized by +# the MCS target. See Mcs.rule for those +# address ranges. +# XBUS 0x04000000 - 0x0400FFFF XBUS pervasive logic +# ABUS 0x08000000 - 0x0800FFFF ABUS pervasive logic +# PCIE 0x09000000 - 0x09FFFFFF PCIE pervasive logic +# +################################################################################ + +chip Proc +{ + name "Power8 Chip"; + targettype TYPE_PROC; + sigoff 0x8000; +# FIXME May need to update dump type + dump DUMP_CONTENT_HW; + scomlen 64; + + ############################################################################# + # # + # ###### # + # # # ###### #### ### #### ##### ###### ##### #### # + # # # # # # # # # # # # # # + # ###### ##### # # #### # ##### # # #### # + # # # # # ### # # # # ##### # # + # # # # # # # # # # # # # # # # + # # # ###### #### ### #### # ###### # # #### # + # # + ############################################################################# + + ############################################################################ + # Global Broadcast Registers + ############################################################################ + + register GLOBAL_CS_FIR + { + name "Global Checkstop Attention FIR"; + scomaddr 0x570F001C; + capture group default; + }; + + register GLOBAL_RE_FIR + { + name "Global Recoverable Attention FIR"; + scomaddr 0x570F001B; + capture group default; + }; + + register GLOBAL_SPA + { + name "Global Special Attention FIR"; + scomaddr 0x570F001A; + capture group default; + }; + +# Import all of the chiplet registers +.include "Proc_regs_TP.rule" +.include "Proc_regs_PB.rule" +.include "Proc_regs_XBUS.rule" +.include "Proc_regs_ABUS.rule" +.include "Proc_regs_PCIE.rule" + +}; + + ############################################################################## + # # + # #### # # + # # # # # # ##### ### # # # ## ##### ### ### # # ### # + # # # # # # # # # # # # # # # # # ## # # # + # #### # # # #### ### # ####### # # # # # # # # ### # + # # # # # # # # # # # # # # # # # # ## # # + # # # ### #### ##### ### # # # ## # ### ### # # ### # + # # + ############################################################################## + +################################################################################ +# Global Broadcast Registers +################################################################################ + +rule GlobalFir +{ + CHECK_STOP: GLOBAL_CS_FIR; + RECOVERABLE: GLOBAL_RE_FIR; +}; + +group gGlobalFir attntype CHECK_STOP, RECOVERABLE filter singlebit +{ + /** GLOBAL_FIR[1] + * Attention from TP chiplet + */ + (GlobalFir, bit(1)) ? analyze(gTpChipletFir); + + /** GLOBAL_FIR[2] + * Attention from PB chiplet + */ + (GlobalFir, bit(2)) ? analyze(gPbChipletFir); + + /** GLOBAL_FIR[4] + * Attention from XBUS chiplet + */ + (GlobalFir, bit(4)) ? analyze(gXbusChipletFir); + + /** GLOBAL_FIR[8] + * Attention from ABUS chiplet + */ + (GlobalFir, bit(8)) ? analyze(gAbusChipletFir); + + /** GLOBAL_FIR[9] + * Attention from PCIE + */ + (GlobalFir, bit(9)) ? analyze(gPcieChipletFir); + + /** GLOBAL_FIR[11] + * Attention from EX1 (Venice only) + */ + (GlobalFir, bit(11)) ? defaultMaskedError; + + /** GLOBAL_FIR[12] + * Attention from EX2 (Venice only) + */ + (GlobalFir, bit(12)) ? defaultMaskedError; + + /** GLOBAL_FIR[13] + * Attention from EX3 (Venice only) + */ + (GlobalFir, bit(13)) ? defaultMaskedError; + + /** GLOBAL_FIR[14] + * Attention from EX4 + */ + (GlobalFir, bit(14)) ? analyzeEx4; + + /** GLOBAL_FIR[15] + * Attention from EX5 + */ + (GlobalFir, bit(15)) ? analyzeEx5; + + /** GLOBAL_FIR[16] + * Attention from EX6 + */ + (GlobalFir, bit(16)) ? analyzeEx6; + + /** GLOBAL_FIR[19] + * Attention from EX9 (Venice only) + */ + (GlobalFir, bit(19)) ? defaultMaskedError; + + /** GLOBAL_FIR[20] + * Attention from EX10 (Venice only) + */ + (GlobalFir, bit(20)) ? defaultMaskedError; + + /** GLOBAL_FIR[21] + * Attention from EX11 (Venice only) + */ + (GlobalFir, bit(21)) ? defaultMaskedError; + + /** GLOBAL_FIR[22] + * Attention from EX12 + */ + (GlobalFir, bit(22)) ? analyzeEx12; + + /** GLOBAL_FIR[23] + * Attention from EX13 + */ + (GlobalFir, bit(23)) ? analyzeEx13; + + /** GLOBAL_FIR[24] + * Attention from EX14 + */ + (GlobalFir, bit(24)) ? analyzeEx14; +}; + +rule GlobalSpa +{ + SPECIAL: GLOBAL_SPA; +}; + +group gGlobalSpa attntype SPECIAL filter singlebit +{ + /** GLOBAL_SPA[1] + * Attention from TP chiplet + */ + (GlobalSpa, bit(1)) ? analyze(gTpChipletSpa); + + /** GLOBAL_SPA[2] + * Attention from PB chiplet + */ + (GlobalSpa, bit(2)) ? analyze(gPbChipletSpa); + + /** GLOBAL_SPA[9] + * Attention from PCIE + */ + (GlobalSpa, bit(9)) ? analyze(gPcieChipletSpa); + + /** GLOBAL_SPA[11] + * Attention from EX1 (Venice only) + */ + (GlobalSpa, bit(11)) ? defaultMaskedError; + + /** GLOBAL_SPA[12] + * Attention from EX2 (Venice only) + */ + (GlobalSpa, bit(12)) ? defaultMaskedError; + + /** GLOBAL_SPA[13] + * Attention from EX3 (Venice only) + */ + (GlobalSpa, bit(13)) ? defaultMaskedError; + + /** GLOBAL_SPA[14] + * Attention from EX4 + */ + (GlobalSpa, bit(14)) ? analyzeEx4; + + /** GLOBAL_SPA[15] + * Attention from EX5 + */ + (GlobalSpa, bit(15)) ? analyzeEx5; + + /** GLOBAL_SPA[16] + * Attention from EX6 + */ + (GlobalSpa, bit(16)) ? analyzeEx6; + + /** GLOBAL_SPA[19] + * Attention from EX9 (Venice only) + */ + (GlobalSpa, bit(19)) ? defaultMaskedError; + + /** GLOBAL_SPA[20] + * Attention from EX10 (Venice only) + */ + (GlobalSpa, bit(20)) ? defaultMaskedError; + + /** GLOBAL_SPA[21] + * Attention from EX11 (Venice only) + */ + (GlobalSpa, bit(21)) ? defaultMaskedError; + + /** GLOBAL_SPA[22] + * Attention from EX12 + */ + (GlobalSpa, bit(22)) ? analyzeEx12; + + /** GLOBAL_SPA[23] + * Attention from EX13 + */ + (GlobalSpa, bit(23)) ? analyzeEx13; + + /** GLOBAL_SPA[24] + * Attention from EX14 + */ + (GlobalSpa, bit(24)) ? analyzeEx14; +}; + +# Import all of the chiplet rules and actions +# NOTE: Some of PB local FIRs are handled through the TP chiplet FIRs +.include "Proc_acts_TP.rule" +.include "Proc_acts_PB.rule" +.include "Proc_acts_XBUS.rule" +.include "Proc_acts_ABUS.rule" +.include "Proc_acts_PCIE.rule" + + ############################################################################## + # # + # # ### # + # # # ## ##### ### ### # # # # # # ### ### ### ### # + # # # # # # # # # ## # # # # # # # # # # + # ####### # # # # # # # # # # ##### ### ### ## ### # + # # # # # # # # # # ## # # # # # # # # # # + # # # ## # ### ### # # ### ### # # ### ### ### ### # + # # + ############################################################################## + +# Include the common action set. +.include "CommonActions.rule" + +################################################################################ +# Analyze Connected Parts # +################################################################################ + +/** Analyze connected EX4 */ +actionclass analyzeEx4 { analyze(connected(TYPE_EX, 4)); }; + +/** Analyze connected EX5 */ +actionclass analyzeEx5 { analyze(connected(TYPE_EX, 5)); }; + +/** Analyze connected EX6 */ +actionclass analyzeEx6 { analyze(connected(TYPE_EX, 6)); }; + +/** Analyze connected EX12 */ +actionclass analyzeEx12 { analyze(connected(TYPE_EX, 12)); }; + +/** Analyze connected EX13 */ +actionclass analyzeEx13 { analyze(connected(TYPE_EX, 13)); }; + +/** Analyze connected EX14 */ +actionclass analyzeEx14 { analyze(connected(TYPE_EX, 14)); }; + |
