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-rwxr-xr-xsrc/usr/diag/prdf/common/plat/prdfPlatServices_common.H65
1 files changed, 34 insertions, 31 deletions
diff --git a/src/usr/diag/prdf/common/plat/prdfPlatServices_common.H b/src/usr/diag/prdf/common/plat/prdfPlatServices_common.H
index 30ec6a103..97cf0a5b5 100755
--- a/src/usr/diag/prdf/common/plat/prdfPlatServices_common.H
+++ b/src/usr/diag/prdf/common/plat/prdfPlatServices_common.H
@@ -226,44 +226,47 @@ int32_t setBadDqBitmap( TARGETING::TargetHandle_t i_trgt,
const MemDqBitmap<T> & i_bitmap );
/**
- * @brief Invokes the get mark store hardware procedure.
- * @param i_mba Target MBA.
- * @param i_rank Target rank.
- * @param o_mark The returned mark.
+ * @brief Invokes the get steer mux hardware procedure.
+ * @param i_mba Target MBA/MCA
+ * @param i_rank Target rank.
+ * @param o_port0Spare A symbol associated with the spare on port 0.
+ * @param o_port1Spare A symbol associated with the spare on port 1.
+ * @param o_eccSpare A symbol associated with the ECC spare (x4 mode only).
* @return Non-SUCCESS in internal function fails, SUCCESS otherwise.
*/
-/*
-int32_t mssGetMarkStore( TARGETING::TargetHandle_t i_mba,
- const CenRank & i_rank, CenMark & o_mark );
-*/
+template<TARGETING::TYPE T>
+int32_t mssGetSteerMux( TARGETING::TargetHandle_t i_mba, const MemRank & i_rank,
+ MemSymbol & o_port0Spare, MemSymbol & o_port1Spare,
+ MemSymbol & o_eccSpare );
/**
- * @brief Invokes the set mark store hardware procedure.
- * @param i_mba Target MBA.
- * @param i_rank Target rank.
- * @param io_mark The mark to write. If hardware blocks the write
- * to markstore and the block is allowed, io_mark
- * will be updated with the new chip mark set by
- * hardware.
- * @param o_writeBlocked TRUE if a blocke write is allowed and hardware
- * blocked the write to markstore.
- * @param i_allowWriteBlocked TRUE if a blocked write is allowed. This means
- * the user will need to read what hardware just
- * placed in the markstore and retry. If FALSE and
- * the write was blocked, this function will commit
- * the FAPI error log and return a non-SUCCESS. The
- * default value is FALSE.
- * @note Both the chip mark and the symbol mark will be written at the same
- * time, so do a RMW operation to avoid overwritting a previous mark.
+ * @brief Invokes the set steer mux hardware procedure.
+ * @param i_mba Target MBA.
+ * @param i_rank Target rank.
+ * @param i_symbol A symbol associated with the DRAM to be spared.
+ * @param i_x4EccSpare If true, will set ECC spare instead (x4 mode only).
+ * @note The procedure will be able to derive the port from the given symbol.
* @return Non-SUCCESS in internal function fails, SUCCESS otherwise.
*/
-/* TODO RTC 157888
-int32_t mssSetMarkStore( TARGETING::TargetHandle_t i_mba,
- const CenRank & i_rank, CenMark & io_mark,
- bool & o_writeBlocked,
- bool i_allowWriteBlocked = false );
-*/
+template<TARGETING::TYPE T>
+int32_t mssSetSteerMux( TARGETING::TargetHandle_t i_mba, const MemRank & i_rank,
+ const MemSymbol & i_symbol, bool i_x4EccSpare );
+
+/**
+ * @brief Get spare DRAM information on a DIMM.
+ * @param i_mba MBA/MCA target.
+ * @param i_rank Rank.
+ * @param i_ps MBA port select.
+ * @param o_spareConfig Spare DRAM config information.
+ * @return Non-SUCCESS if an internal function fails, SUCCESS otherwise.
+ * @note On a DIMM its possible that spare is not present. Also on X4 DRAM
+ * spare can be on High nibble or low nibble. This function will
+ * populate spare config information in o_spareConfig.
+ */
+template<TARGETING::TYPE T>
+int32_t getDimmSpareConfig( TARGETING::TargetHandle_t i_mba, MemRank i_rank,
+ uint8_t i_ps, uint8_t & o_spareConfig );
/**
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