diff options
Diffstat (limited to 'src/kernel')
| -rw-r--r-- | src/kernel/exception.C | 10 | ||||
| -rw-r--r-- | src/kernel/makefile | 4 | ||||
| -rw-r--r-- | src/kernel/softpatch_p8.S (renamed from src/kernel/softpatch_p7.S) | 50 |
3 files changed, 32 insertions, 32 deletions
diff --git a/src/kernel/exception.C b/src/kernel/exception.C index d1b365535..80e04fc34 100644 --- a/src/kernel/exception.C +++ b/src/kernel/exception.C @@ -5,7 +5,7 @@ /* */ /* IBM CONFIDENTIAL */ /* */ -/* COPYRIGHT International Business Machines Corp. 2010,2012 */ +/* COPYRIGHT International Business Machines Corp. 2010,2013 */ /* */ /* p1 */ /* */ @@ -207,7 +207,7 @@ void kernel_execute_fp_unavail() const uint64_t EXCEPTION_HSRR1_SOFTPATCH_MASK = 0x0000000000100000; const uint64_t EXCEPTION_HSRR1_SOFTPATCH_DENORM = 0x0000000000100000; -extern "C" void p7_softpatch_denorm_assist(context_fp_t*); +extern "C" void p8_softpatch_denorm_assist(context_fp_t*); extern "C" void kernel_execute_softpatch() @@ -225,10 +225,10 @@ void kernel_execute_softpatch() switch (CpuID::getCpuType()) { - case CORE_POWER8_MURANO: // @TODO: Verify same procedure. - case CORE_POWER8_VENICE: // @TODO: Verify same procedure. + case CORE_POWER8_MURANO: + case CORE_POWER8_VENICE: case CORE_UNKNOWN: - p7_softpatch_denorm_assist(t->fp_context); + p8_softpatch_denorm_assist(t->fp_context); break; } } diff --git a/src/kernel/makefile b/src/kernel/makefile index 67766b2b8..a3a750dcb 100644 --- a/src/kernel/makefile +++ b/src/kernel/makefile @@ -5,7 +5,7 @@ # # IBM CONFIDENTIAL # -# COPYRIGHT International Business Machines Corp. 2010,2012 +# COPYRIGHT International Business Machines Corp. 2010,2013 # # p1 # @@ -26,7 +26,7 @@ OBJS = start.o kernel.o console.o pagemgr.o heapmgr.o taskmgr.o cpumgr.o OBJS += syscall.o scheduler.o spinlock.o exception.o vmmmgr.o timemgr.o OBJS += futexmgr.o ptmgr.o segmentmgr.o devicesegment.o basesegment.o OBJS += block.o cpuid.o misc.o msghandler.o blockmsghdlr.o stacksegment.o -OBJS += softpatch_p7.o barrier.o idebug.o intmsghandler.o deferred.o +OBJS += softpatch_p8.o barrier.o idebug.o intmsghandler.o deferred.o OBJS += shutdown.o forceattn_p8.o terminate.o include ${ROOTPATH}/config.mk diff --git a/src/kernel/softpatch_p7.S b/src/kernel/softpatch_p8.S index 3e1da328a..e28eb2eb2 100644 --- a/src/kernel/softpatch_p7.S +++ b/src/kernel/softpatch_p8.S @@ -1,28 +1,28 @@ -# IBM_PROLOG_BEGIN_TAG -# This is an automatically generated prolog. -# -# $Source: src/kernel/softpatch_p7.S $ -# -# IBM CONFIDENTIAL -# -# COPYRIGHT International Business Machines Corp. 2011 -# -# p1 -# -# Object Code Only (OCO) source materials -# Licensed Internal Code Source Materials -# IBM HostBoot Licensed Internal Code -# -# The source code for this program is not published or other- -# wise divested of its trade secrets, irrespective of what has -# been deposited with the U.S. Copyright Office. -# -# Origin: 30 -# -# IBM_PROLOG_END +# IBM_PROLOG_BEGIN_TAG +# This is an automatically generated prolog. +# +# $Source: src/kernel/softpatch_p8.S $ +# +# IBM CONFIDENTIAL +# +# COPYRIGHT International Business Machines Corp. 2011,2013 +# +# p1 +# +# Object Code Only (OCO) source materials +# Licensed Internal Code Source Materials +# IBM HostBoot Licensed Internal Code +# +# The source code for this program is not published or otherwise +# divested of its trade secrets, irrespective of what has been +# deposited with the U.S. Copyright Office. +# +# Origin: 30 +# +# IBM_PROLOG_END_TAG .include "kernel/ppcconsts.S" -/** @fn p7_softpatch_denorm_assist +/** @fn p8_softpatch_denorm_assist * @brief Performs denormalization assistance for floating point operations. * * Called by the softpatch exception when a denormalization assistance is @@ -35,8 +35,8 @@ * Destroys the data in r4/r5. This is safe by the ABI since these are * parameter registers which are otherwise unused by this function. */ -.global p7_softpatch_denorm_assist -p7_softpatch_denorm_assist: +.global p8_softpatch_denorm_assist +p8_softpatch_denorm_assist: mfmsr r4 # Load the MSR oris r5,r4,0x2080 # Turn on FP,VSX available mtmsrd r5 # Set the MSR |
