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-rw-r--r--src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_background_scrub.C34
-rw-r--r--src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_background_scrub.H31
-rw-r--r--src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_background_scrub.mk7
-rw-r--r--src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_scrub.C34
-rw-r--r--src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_scrub.H31
-rw-r--r--src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_scrub.mk7
-rw-r--r--src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/fir/exp_fir.H24
-rw-r--r--src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/fir/exp_unmask.C95
-rw-r--r--src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/fir/exp_unmask.H24
-rw-r--r--src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mcbist/exp_mcbist.C2
-rw-r--r--src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mcbist/exp_mcbist_traits.H13
-rw-r--r--src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mcbist/exp_memdiags.C1
-rw-r--r--src/import/chips/ocmb/explorer/procedures/xml/attribute_info/exp_attributes.xml15
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/fir/memdiags_fir.C175
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/fir/memdiags_fir.H68
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/fir/unmask.C122
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/fir/unmask.H52
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/mss.mk3
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/p9_mss_background_scrub.C45
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/p9_mss_ddr_phy_reset.C5
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit_mc.C3
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit_training.C3
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/p9_mss_memdiag.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/p9_mss_scominit.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/p9_mss_scrub.C98
-rw-r--r--src/import/generic/memory/lib/utils/fir/gen_mss_unmask.H39
-rw-r--r--src/import/generic/memory/lib/utils/mc/gen_mss_port.H1
-rw-r--r--src/import/generic/memory/lib/utils/mcbist/gen_mss_memdiags.H146
28 files changed, 676 insertions, 406 deletions
diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_background_scrub.C b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_background_scrub.C
index 45d6c535c..e451cc669 100644
--- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_background_scrub.C
+++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_background_scrub.C
@@ -22,3 +22,37 @@
/* permissions and limitations under the License. */
/* */
/* IBM_PROLOG_END_TAG */
+
+///
+/// @file exp_background_scrub.C
+/// @brief Begin background scrub
+///
+// *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com>
+// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com>
+// *HWP Team: Memory
+// *HWP Level: 2
+// *HWP Consumed by: FSP:HB
+
+#include <lib/shared/exp_defaults.H>
+#include <exp_background_scrub.H>
+#include <lib/mcbist/exp_memdiags.H>
+
+extern "C"
+{
+
+ ///
+ /// @brief Begin background scrub
+ /// @param[in] i_target OCMB chip
+ /// @return FAPI2_RC_SUCCESS iff ok
+ ///
+ fapi2::ReturnCode exp_background_scrub(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target)
+ {
+ FAPI_INF("Start exp background scrub for %s", mss::c_str(i_target));
+ FAPI_TRY(mss::memdiags::mss_background_scrub_helper(i_target));
+
+ fapi_try_exit:
+ FAPI_INF("End exp background scrub for %s", mss::c_str(i_target));
+ return fapi2::current_err;
+ }
+
+}
diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_background_scrub.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_background_scrub.H
index fa218e3ec..2e95cf6f9 100644
--- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_background_scrub.H
+++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_background_scrub.H
@@ -22,3 +22,34 @@
/* permissions and limitations under the License. */
/* */
/* IBM_PROLOG_END_TAG */
+
+///
+/// @file exp_background_scrub.H
+/// @brief Procedure declaration to begin background scrub
+///
+// *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com>
+// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com>
+// *HWP Team: Memory
+// *HWP Level: 2
+// *HWP Consumed by: FSP:HB
+
+#ifndef __MSS_EXP_BACKGROUND_SCRUB__
+#define __MSS_EXP_BACKGROUND_SCRUB__
+
+#include <fapi2.H>
+
+// Required for Cronus
+typedef fapi2::ReturnCode (*exp_background_scrub_FP_t) (const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>&);
+
+extern "C"
+{
+
+ ///
+ /// @brief Begin background scrub
+ /// @param[in] i_target the controller
+ /// @return FAPI2_RC_SUCCESS iff ok
+ ///
+ fapi2::ReturnCode exp_background_scrub(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target);
+
+}// extern C
+#endif
diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_background_scrub.mk b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_background_scrub.mk
index b6bdf9998..bf8e5f44a 100644
--- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_background_scrub.mk
+++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_background_scrub.mk
@@ -22,3 +22,10 @@
# permissions and limitations under the License.
#
# IBM_PROLOG_END_TAG
+
+# Include the macros and things for MSS EXP procedures
+-include 00exp_common.mk
+
+PROCEDURE=exp_background_scrub
+$(eval $(call ADD_EXP_MEMORY_INCDIRS,$(PROCEDURE)))
+$(call BUILD_PROCEDURE)
diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_scrub.C b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_scrub.C
index 6f6ee8caf..45cd07ee0 100644
--- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_scrub.C
+++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_scrub.C
@@ -22,3 +22,37 @@
/* permissions and limitations under the License. */
/* */
/* IBM_PROLOG_END_TAG */
+
+///
+/// @file exp_scrub.C
+/// @brief Begin background scrub
+///
+// *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com>
+// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com>
+// *HWP Team: Memory
+// *HWP Level: 2
+// *HWP Consumed by: FSP:HB
+
+#include <lib/shared/exp_defaults.H>
+#include <exp_scrub.H>
+#include <lib/mcbist/exp_memdiags.H>
+
+extern "C"
+{
+
+ ///
+ /// @brief Begin background scrub
+ /// @param[in] i_target OCMB chip
+ /// @return FAPI2_RC_SUCCESS iff ok
+ ///
+ fapi2::ReturnCode exp_scrub(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target)
+ {
+ FAPI_INF("Start exp scrub for %s", mss::c_str(i_target));
+ FAPI_TRY(mss::memdiags::mss_scrub_helper(i_target));
+
+ fapi_try_exit:
+ FAPI_INF("End exp scrub for %s", mss::c_str(i_target));
+ return fapi2::current_err;
+ }
+
+}
diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_scrub.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_scrub.H
index d3e650254..73affcb60 100644
--- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_scrub.H
+++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_scrub.H
@@ -22,3 +22,34 @@
/* permissions and limitations under the License. */
/* */
/* IBM_PROLOG_END_TAG */
+
+///
+/// @file exp_scrub.H
+/// @brief Procedure declaration to begin background scrub
+///
+// *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com>
+// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com>
+// *HWP Team: Memory
+// *HWP Level: 2
+// *HWP Consumed by: FSP:HB
+
+#ifndef __MSS_EXP_SCRUB__
+#define __MSS_EXP_SCRUB__
+
+#include <fapi2.H>
+
+// Required for Cronus
+typedef fapi2::ReturnCode (*exp_scrub_FP_t) (const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>&);
+
+extern "C"
+{
+
+ ///
+ /// @brief Begin background scrub
+ /// @param[in] i_target the controller
+ /// @return FAPI2_RC_SUCCESS iff ok
+ ///
+ fapi2::ReturnCode exp_scrub(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target);
+
+}// extern C
+#endif
diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_scrub.mk b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_scrub.mk
index ef1c8a17d..9067611e3 100644
--- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_scrub.mk
+++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_scrub.mk
@@ -22,3 +22,10 @@
# permissions and limitations under the License.
#
# IBM_PROLOG_END_TAG
+
+# Include the macros and things for MSS EXP procedures
+-include 00exp_common.mk
+
+PROCEDURE=exp_scrub
+$(eval $(call ADD_EXP_MEMORY_INCDIRS,$(PROCEDURE)))
+$(call BUILD_PROCEDURE)
diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/fir/exp_fir.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/fir/exp_fir.H
index 182dad7e6..905013b66 100644
--- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/fir/exp_fir.H
+++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/fir/exp_fir.H
@@ -22,3 +22,27 @@
/* permissions and limitations under the License. */
/* */
/* IBM_PROLOG_END_TAG */
+///
+/// @file exp_fir.H
+/// @brief Memory subsystem FIR support
+///
+// *HWP HWP Owner: Stephen Glancy <sglancy@us.ibm.com>
+// *HWP HWP Backup: Andre Marin <aamarin@us.ibm.com>
+// *HWP Team: Memory
+// *HWP Level: 3
+// *HWP Consumed by: FSP:HB
+
+#ifndef _MSS_EXP_FIR_H_
+#define _MSS_EXP_FIR_H_
+
+#include <fapi2.H>
+#include <generic/memory/lib/utils/fir/gen_mss_fir.H>
+#include <generic/memory/lib/utils/shared/mss_generic_consts.H>
+
+namespace mss
+{
+
+// FIR Register Traits for Explorer will be here sooner or later.
+
+}
+#endif
diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/fir/exp_unmask.C b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/fir/exp_unmask.C
index 701a0d87e..2d35dd256 100644
--- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/fir/exp_unmask.C
+++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/fir/exp_unmask.C
@@ -22,3 +22,98 @@
/* permissions and limitations under the License. */
/* */
/* IBM_PROLOG_END_TAG */
+///
+/// @file unmask.C
+/// @brief Subroutines for unmasking and setting up MSS FIR
+///
+// *HWP HWP Owner: Stephen Glancy <sglancy@us.ibm.com>
+// *HWP HWP Backup: Andre Marin <aamarin@us.ibm.com>
+// *HWP Team: Memory
+// *HWP Level: 3
+// *HWP Consumed by: FSP:HB
+
+#include <lib/shared/exp_defaults.H>
+#include <fapi2.H>
+#include <explorer_scom_addresses.H>
+#include <explorer_scom_addresses_fld.H>
+#include <generic/memory/lib/utils/scom.H>
+#include <lib/fir/exp_fir.H>
+#include <generic/memory/lib/utils/fir/gen_mss_unmask.H>
+
+namespace mss
+{
+
+namespace unmask
+{
+
+///
+/// @brief Unmask and setup actions performed after draminit_mc
+/// @param[in] i_target the fapi2::Target
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff ok
+/// TODO: Need to implement this function
+template<>
+fapi2::ReturnCode after_draminit_mc<mss::mc_type::EXPLORER>( const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>&
+ i_target )
+{
+ return fapi2::FAPI2_RC_SUCCESS;
+}
+
+///
+/// @brief Unmask and setup actions performed after draminit_training
+/// @param[in] i_target the fapi2::Target
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff ok
+/// TODO: Need to implement this function
+template<>
+fapi2::ReturnCode after_draminit_training<mss::mc_type::EXPLORER>( const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>&
+ i_target )
+{
+ return fapi2::FAPI2_RC_SUCCESS;
+}
+
+///
+/// @brief Unmask and setup actions performed after mss_scominit
+/// @param[in] i_target the fapi2::Target
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff ok
+/// TODO: Need to implement this function
+template<>
+fapi2::ReturnCode after_scominit<mss::mc_type::EXPLORER>( const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target )
+{
+ return fapi2::FAPI2_RC_SUCCESS;
+}
+
+///
+/// @brief Unmask and setup actions performed after mss_ddr_phy_reset
+/// @param[in] i_target the fapi2::Target
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff ok
+/// TODO: Need to implement this function
+template<>
+fapi2::ReturnCode after_phy_reset<mss::mc_type::EXPLORER>( const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target )
+{
+ return fapi2::FAPI2_RC_SUCCESS;
+}
+
+///
+/// @brief Unmask and setup actions for memdiags related FIR
+/// @param[in] i_target the fapi2::Target
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff ok
+/// TODO: Need to implement this function
+template<>
+fapi2::ReturnCode after_memdiags<mss::mc_type::EXPLORER>( const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target )
+{
+ return fapi2::FAPI2_RC_SUCCESS;
+}
+
+///
+/// @brief Unmask and setup actions for scrub related FIR
+/// @param[in] i_target the fapi2::Target
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff ok
+/// TODO: Need to implement this function
+template<>
+fapi2::ReturnCode after_background_scrub<mss::mc_type::EXPLORER>( const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>&
+ i_target )
+{
+ return fapi2::FAPI2_RC_SUCCESS;
+}
+
+}
+}
diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/fir/exp_unmask.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/fir/exp_unmask.H
deleted file mode 100644
index d147a4096..000000000
--- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/fir/exp_unmask.H
+++ /dev/null
@@ -1,24 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG */
-/* This is an automatically generated prolog. */
-/* */
-/* $Source: src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/fir/exp_unmask.H $ */
-/* */
-/* OpenPOWER HostBoot Project */
-/* */
-/* Contributors Listed Below - COPYRIGHT 2019 */
-/* [+] International Business Machines Corp. */
-/* */
-/* */
-/* Licensed under the Apache License, Version 2.0 (the "License"); */
-/* you may not use this file except in compliance with the License. */
-/* You may obtain a copy of the License at */
-/* */
-/* http://www.apache.org/licenses/LICENSE-2.0 */
-/* */
-/* Unless required by applicable law or agreed to in writing, software */
-/* distributed under the License is distributed on an "AS IS" BASIS, */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
-/* implied. See the License for the specific language governing */
-/* permissions and limitations under the License. */
-/* */
-/* IBM_PROLOG_END_TAG */
diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mcbist/exp_mcbist.C b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mcbist/exp_mcbist.C
index a02d4445e..946334c78 100644
--- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mcbist/exp_mcbist.C
+++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mcbist/exp_mcbist.C
@@ -62,7 +62,7 @@ fapi2::ReturnCode freq<mss::mc_type::EXPLORER, fapi2::TARGET_TYPE_OCMB_CHIP>(
return attr::get_freq(l_port, o_value);
}
- // Should never reach here
+ o_value = 0;
return ~fapi2::FAPI2_RC_SUCCESS;
}
diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mcbist/exp_mcbist_traits.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mcbist/exp_mcbist_traits.H
index 5fb590f23..4edee3caf 100644
--- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mcbist/exp_mcbist_traits.H
+++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mcbist/exp_mcbist_traits.H
@@ -77,7 +77,7 @@ class mcbistTraits< mss::mc_type::EXPLORER, fapi2::TARGET_TYPE_OCMB_CHIP>
// Multi-ports, dimms
static constexpr mss::states MULTI_PORTS = mss::states::NO;
- static constexpr mss::states MULTI_DIMMS = mss::states::NO;
+ static constexpr mss::states MULTI_DIMMS = mss::states::YES;
// Subtest
static constexpr size_t SUBTEST_PER_REG = 4;
@@ -85,8 +85,8 @@ class mcbistTraits< mss::mc_type::EXPLORER, fapi2::TARGET_TYPE_OCMB_CHIP>
static constexpr size_t BITS_IN_SUBTEST = 16; // 2 Bytes
static constexpr size_t LEFT_SHIFT = (sizeof(uint64_t) * 8) - BITS_IN_SUBTEST;
- // LARGEST_ADDRESS. port select (bit0~1) and dimm select (bit2) are always 0 so shift 3 more bits.
- static constexpr uint64_t LARGEST_ADDRESS = ~0 >> (mss::mcbist::address::MAGIC_PAD + 3);
+ // LARGEST_ADDRESS. port select (bit0~1) are always 0 so shift 2 more bits.
+ static constexpr uint64_t LARGEST_ADDRESS = ~0 >> (mss::mcbist::address::MAGIC_PAD + 2);
/// MCBIST "memory registers" - config for subtests.
static constexpr uint64_t MCBMR0_REG = EXPLR_MCBIST_MCBMR0Q;
@@ -134,6 +134,7 @@ class mcbistTraits< mss::mc_type::EXPLORER, fapi2::TARGET_TYPE_OCMB_CHIP>
static constexpr uint64_t RANDOM_DATA_SEED0 = EXPLR_MCBIST_MCBRDS0Q;
static constexpr uint64_t RANDOM_DATA_SEED1 = EXPLR_MCBIST_MCBRDS1Q;
+ static constexpr uint64_t MBSTRQ_CFG_PAUSE_ON_MPE = EXPLR_MCBIST_MBSTRQ_CFG_PAUSE_ON_MPE;
// MCBIST Compare Masks, used to setup the ECC traps
static constexpr uint64_t COMPARE_MASK = EXPLR_RDF_MCBCM;
@@ -250,6 +251,8 @@ class mcbistTraits< mss::mc_type::EXPLORER, fapi2::TARGET_TYPE_OCMB_CHIP>
UE_COUNT = EXPLR_MCBIST_MBSEC1Q_UE_COUNT,
UE_COUNT_LEN = EXPLR_MCBIST_MBSEC1Q_UE_COUNT_LEN,
+ MBSTRQ_CFG_MAINT_RCE_WITH_CE = EXPLR_MCBIST_MBSTRQ_CFG_MAINT_RCE_WITH_CE,
+
CFG_AMAP_DIMM_SELECT = EXPLR_MCBIST_MCBAMR0A0Q_CFG_AMAP_DIMM_SELECT,
CFG_AMAP_DIMM_SELECT_LEN = EXPLR_MCBIST_MCBAMR0A0Q_CFG_AMAP_DIMM_SELECT_LEN,
CFG_AMAP_MRANK0 = EXPLR_MCBIST_MCBAMR0A0Q_CFG_AMAP_MRANK0,
@@ -407,6 +410,10 @@ class mcbistTraits< mss::mc_type::EXPLORER, fapi2::TARGET_TYPE_OCMB_CHIP>
ERROR_LOG_BEAT_LEN = 2,
ERROR_LOG_TYPE = 46,
ERROR_LOG_TYPE_LEN = 2,
+
+ //MCBIST FIR mask
+ MCB_PROGRAM_COMPLETE = EXPLR_MCBIST_MCBISTFIRQ_MCBIST_PROGRAM_COMPLETE,
+ MCB_WAT_DEBUG_ATTN = EXPLR_MCBIST_MCBISTFIRQ_WAT_DEBUG_ATTN,
};
// MCBIST error log related registers
diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mcbist/exp_memdiags.C b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mcbist/exp_memdiags.C
index 9fd173ca6..ba40143c5 100644
--- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mcbist/exp_memdiags.C
+++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mcbist/exp_memdiags.C
@@ -39,6 +39,7 @@
#include <p9_mc_scom_addresses.H>
#include <p9_mc_scom_addresses_fld.H>
+#include <lib/dimm/exp_rank.H>
#include <lib/mcbist/exp_memdiags.H>
#include <lib/mcbist/exp_mcbist.H>
#include <generic/memory/lib/utils/count_dimm.H>
diff --git a/src/import/chips/ocmb/explorer/procedures/xml/attribute_info/exp_attributes.xml b/src/import/chips/ocmb/explorer/procedures/xml/attribute_info/exp_attributes.xml
index c8a72cb0a..06da415d4 100644
--- a/src/import/chips/ocmb/explorer/procedures/xml/attribute_info/exp_attributes.xml
+++ b/src/import/chips/ocmb/explorer/procedures/xml/attribute_info/exp_attributes.xml
@@ -259,6 +259,21 @@
<mssAccessorName>exp_firmware_emulation_mode</mssAccessorName>
</attribute>
+ <attribute>
+ <id>ATTR_MSS_EXP_REORDER_QUEUE_SETTING</id>
+ <targetType>TARGET_TYPE_OCMB_CHIP</targetType>
+ <description>
+ Contains the settings for write/read reorder queue
+ </description>
+ <default>REORDER</default>
+ <initToZero></initToZero>
+ <writeable/>
+ <enum>REORDER = 0, FIFO = 1</enum>
+ <valueType>uint8</valueType>
+ <writeable/>
+ <mssAccessorName>exp_reorder_queue_setting</mssAccessorName>
+ </attribute>
+
<attribute>
<id>ATTR_MSS_OCMB_EXP_STRUCT_MMIO_ENDIAN_CTRL</id>
<targetType>TARGET_TYPE_SYSTEM</targetType>
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/fir/memdiags_fir.C b/src/import/chips/p9/procedures/hwp/memory/lib/fir/memdiags_fir.C
deleted file mode 100644
index f4ab6727c..000000000
--- a/src/import/chips/p9/procedures/hwp/memory/lib/fir/memdiags_fir.C
+++ /dev/null
@@ -1,175 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG */
-/* This is an automatically generated prolog. */
-/* */
-/* $Source: src/import/chips/p9/procedures/hwp/memory/lib/fir/memdiags_fir.C $ */
-/* */
-/* OpenPOWER HostBoot Project */
-/* */
-/* Contributors Listed Below - COPYRIGHT 2016,2019 */
-/* [+] International Business Machines Corp. */
-/* */
-/* */
-/* Licensed under the Apache License, Version 2.0 (the "License"); */
-/* you may not use this file except in compliance with the License. */
-/* You may obtain a copy of the License at */
-/* */
-/* http://www.apache.org/licenses/LICENSE-2.0 */
-/* */
-/* Unless required by applicable law or agreed to in writing, software */
-/* distributed under the License is distributed on an "AS IS" BASIS, */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
-/* implied. See the License for the specific language governing */
-/* permissions and limitations under the License. */
-/* */
-/* IBM_PROLOG_END_TAG */
-
-///
-/// @file memdiags_fir.C
-/// @brief Subroutines for memdiags/prd FIR
-///
-// *HWP HWP Owner: Stephen Glancy <sglancy@us.ibm.com>
-// *HWP HWP Backup: Marc Gollub <gollub@us.ibm.com>
-// *HWP Team: Memory
-// *HWP Level: 3
-// *HWP Consumed by: FSP:HB
-
-#include <lib/shared/nimbus_defaults.H>
-#include <fapi2.H>
-#include <p9_mc_scom_addresses.H>
-#include <p9_mc_scom_addresses_fld.H>
-
-#include <generic/memory/lib/utils/scom.H>
-#include <generic/memory/lib/utils/find.H>
-#include <lib/fir/fir.H>
-#include <lib/fir/memdiags_fir.H>
-#include <lib/mc/port.H>
-#include <lib/workarounds/mcbist_workarounds.H>
-
-using fapi2::TARGET_TYPE_MCBIST;
-using fapi2::TARGET_TYPE_MCA;
-
-namespace mss
-{
-
-namespace unmask
-{
-
-///
-/// @brief Unmask and setup actions for memdiags related FIR
-/// @param[in] i_target the fapi2::Target MCBIST
-/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff ok
-///
-template<>
-fapi2::ReturnCode after_memdiags( const fapi2::Target<TARGET_TYPE_MCBIST>& i_target )
-{
- fapi2::ReturnCode l_rc;
- fapi2::buffer<uint64_t> dsm0_buffer;
- fapi2::buffer<uint64_t> l_mnfg_buffer;
- uint64_t rd_tag_delay = 0;
- uint64_t wr_done_delay = 0;
- fapi2::buffer<uint64_t> l_aue_buffer;
- fapi2::ATTR_CHIP_EC_FEATURE_HW414700_Type l_checkstop_flag;
- constexpr uint64_t MNFG_THRESHOLDS_ATTR = 63;
-
- // Broadcast mode workaround for UEs causing out of sync
- FAPI_TRY(mss::workarounds::mcbist::broadcast_out_of_sync(i_target, mss::ON));
-
- for (const auto& p : mss::find_targets<TARGET_TYPE_MCA>(i_target))
- {
- fir::reg<MCA_FIR> l_ecc64_fir_reg(p, l_rc);
- FAPI_TRY(l_rc, "unable to create fir::reg for %d", MCA_FIR);
-
- fir::reg<MCA_MBACALFIRQ> l_cal_fir_reg(p, l_rc);
- FAPI_TRY(l_rc, "unable to create fir::reg for %d", MCA_MBACALFIRQ);
-
- // Read out the wr_done and rd_tag delays and find min
- // and set the RCD Protect Time to this value
- FAPI_TRY (mss::read_dsm0q_register(p, dsm0_buffer) );
- mss::get_wrdone_delay(dsm0_buffer, wr_done_delay);
- mss::get_rdtag_delay(dsm0_buffer, rd_tag_delay);
- const auto rcd_protect_time = std::min(wr_done_delay, rd_tag_delay);
- FAPI_TRY (mss::change_rcd_protect_time(p, rcd_protect_time) );
-
- l_ecc64_fir_reg.checkstop<MCA_FIR_MAINLINE_AUE>()
- .recoverable_error<MCA_FIR_MAINLINE_UE>()
- .checkstop<MCA_FIR_MAINLINE_IAUE>()
- .recoverable_error<MCA_FIR_MAINLINE_IUE>();
-
- l_cal_fir_reg.recoverable_error<MCA_MBACALFIRQ_PORT_FAIL>();
-
- // If ATTR_CHIP_EC_FEATURE_HW414700 is enabled set checkstops
- auto l_chip_target = mss::find_target<fapi2::TARGET_TYPE_PROC_CHIP>(i_target);
- FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_HW414700, l_chip_target, l_checkstop_flag) );
-
- // If the system is running DD2 chips override some recoverable firs with checkstop
- // Due to a known hardware defect with DD2 certain errors are not handled properly
- // As a result, these firs are marked as checkstop for DD2 to avoid any mishandling
- if (l_checkstop_flag)
- {
- l_ecc64_fir_reg.checkstop<MCA_FIR_MAINLINE_UE>()
- .checkstop<MCA_FIR_MAINLINE_RCD>();
- l_cal_fir_reg.checkstop<MCA_MBACALFIRQ_PORT_FAIL>();
- }
-
- // If MNFG FLAG Threshhold is enabled skip IUE unflagging
- FAPI_TRY ( mss::mnfg_flags(l_mnfg_buffer) );
-
- if ( !(l_mnfg_buffer.getBit<MNFG_THRESHOLDS_ATTR>()) )
- {
- l_ecc64_fir_reg.recoverable_error<MCA_FIR_MAINTENANCE_IUE>();
- }
-
- FAPI_TRY(l_ecc64_fir_reg.write(), "unable to write fir::reg %d", MCA_FIR);
- FAPI_TRY(l_cal_fir_reg.write(), "unable to write fir::reg %d", MCA_MBACALFIRQ);
-
- // Change Maint AUE and IAUE to checkstop without unmasking
- // Normal setup modifies masked bits in addition to setting checkstop
- // This causes issues if error has occured, manually scoming to avoid this
- FAPI_TRY( mss::getScom(p, MCA_ACTION1, l_aue_buffer) );
- l_aue_buffer.clearBit<MCA_FIR_MAINTENANCE_AUE>();
- l_aue_buffer.clearBit<MCA_FIR_MAINTENANCE_IAUE>();
- FAPI_TRY( mss::putScom(p, MCA_ACTION1, l_aue_buffer) );
-
- // Note: We also want to include the following setup RCD recovery and port fail
- FAPI_TRY( mss::change_port_fail_disable(p, mss::LOW) );
- FAPI_TRY( mss::change_rcd_recovery_disable(p, mss::LOW) );
- }
-
- return fapi2::FAPI2_RC_SUCCESS;
-
-fapi_try_exit:
- return fapi2::current_err;
-}
-
-///
-/// @brief Unmask and setup actions for scrub related FIR
-/// @param[in] i_target the fapi2::Target MCBIST
-/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff ok
-///
-template<>
-fapi2::ReturnCode after_background_scrub( const fapi2::Target<TARGET_TYPE_MCBIST>& i_target )
-{
- for (const auto& p : mss::find_targets<TARGET_TYPE_MCA>(i_target))
- {
- fapi2::ReturnCode l_rc;
- fir::reg<MCA_FIR> l_ecc64_fir_reg(p, l_rc);
- FAPI_TRY(l_rc, "unable to create fir::reg for %d", MCA_FIR);
-
- l_ecc64_fir_reg.recoverable_error<MCA_FIR_MAINLINE_MPE_RANK_0_TO_7,
- MCA_FIR_MAINLINE_MPE_RANK_0_TO_7_LEN>()
- .recoverable_error<MCA_FIR_MAINLINE_NCE>()
- .recoverable_error<MCA_FIR_MAINLINE_TCE>()
- .recoverable_error<MCA_FIR_MAINLINE_IMPE>()
- .recoverable_error<MCA_FIR_MAINTENANCE_IMPE>();
-
- FAPI_TRY(l_ecc64_fir_reg.write(), "unable to write fir::reg %d", MCA_FIR);
- }
-
- return fapi2::FAPI2_RC_SUCCESS;
-
-fapi_try_exit:
- return fapi2::current_err;
-}
-
-}
-}
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/fir/memdiags_fir.H b/src/import/chips/p9/procedures/hwp/memory/lib/fir/memdiags_fir.H
deleted file mode 100644
index c3a8e6c8c..000000000
--- a/src/import/chips/p9/procedures/hwp/memory/lib/fir/memdiags_fir.H
+++ /dev/null
@@ -1,68 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG */
-/* This is an automatically generated prolog. */
-/* */
-/* $Source: src/import/chips/p9/procedures/hwp/memory/lib/fir/memdiags_fir.H $ */
-/* */
-/* OpenPOWER HostBoot Project */
-/* */
-/* Contributors Listed Below - COPYRIGHT 2016,2017 */
-/* [+] International Business Machines Corp. */
-/* */
-/* */
-/* Licensed under the Apache License, Version 2.0 (the "License"); */
-/* you may not use this file except in compliance with the License. */
-/* You may obtain a copy of the License at */
-/* */
-/* http://www.apache.org/licenses/LICENSE-2.0 */
-/* */
-/* Unless required by applicable law or agreed to in writing, software */
-/* distributed under the License is distributed on an "AS IS" BASIS, */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
-/* implied. See the License for the specific language governing */
-/* permissions and limitations under the License. */
-/* */
-/* IBM_PROLOG_END_TAG */
-
-///
-/// @file memdiags_fir.H
-/// @brief Subroutines for memdiags/prd FIR
-///
-// *HWP HWP Owner: Stephen Glancy <sglancy@us.ibm.com>
-// *HWP HWP Backup: Marc Gollub <gollub@us.ibm.com>
-// *HWP Team: Memory
-// *HWP Level: 3
-// *HWP Consumed by: FSP:HB
-
-#ifndef _MSS_MEMDIAGS_FIR_H_
-#define _MSS_MEMDIAGS_FIR_H_
-
-#include <fapi2.H>
-#include <lib/fir/fir.H>
-
-namespace mss
-{
-
-namespace unmask
-{
-
-///
-/// @brief Unmask and setup actions for memdiags related FIR
-/// @tparam T the fapi2::TargetType which hold the FIR bits
-/// @param[in] i_target the fapi2::Target
-/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff ok
-///
-template< fapi2::TargetType T >
-fapi2::ReturnCode after_memdiags( const fapi2::Target<T>& i_target );
-
-///
-/// @brief Unmask and setup actions for scrub related FIR
-/// @tparam T the fapi2::TargetType which hold the FIR bits
-/// @param[in] i_target the fapi2::Target
-/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff ok
-///
-template< fapi2::TargetType T >
-fapi2::ReturnCode after_background_scrub( const fapi2::Target<T>& i_target );
-
-}
-}
-#endif
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/fir/unmask.C b/src/import/chips/p9/procedures/hwp/memory/lib/fir/unmask.C
index 3d28935f8..800291aea 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/fir/unmask.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/fir/unmask.C
@@ -39,7 +39,9 @@
#include <p9_mc_scom_addresses_fld.H>
#include <generic/memory/lib/utils/find_magic.H>
#include <generic/memory/lib/utils/scom.H>
+#include <generic/memory/lib/utils/find.H>
#include <lib/fir/fir.H>
+#include <lib/mc/port.H>
#include <lib/fir/unmask.H>
#include <lib/workarounds/mcbist_workarounds.H>
@@ -252,5 +254,125 @@ fapi_try_exit:
}
+
+///
+/// @brief Unmask and setup actions for memdiags related FIR
+/// @param[in] i_target the fapi2::Target MCBIST
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff ok
+///
+template<>
+fapi2::ReturnCode after_memdiags<mss::mc_type::NIMBUS>( const fapi2::Target<fapi2::TARGET_TYPE_MCBIST>& i_target )
+{
+ fapi2::ReturnCode l_rc1, l_rc2;
+ fapi2::buffer<uint64_t> dsm0_buffer;
+ fapi2::buffer<uint64_t> l_mnfg_buffer;
+ uint64_t rd_tag_delay = 0;
+ uint64_t wr_done_delay = 0;
+ fapi2::buffer<uint64_t> l_aue_buffer;
+ fapi2::ATTR_CHIP_EC_FEATURE_HW414700_Type l_checkstop_flag;
+ constexpr uint64_t MNFG_THRESHOLDS_ATTR = 63;
+
+ // Broadcast mode workaround for UEs causing out of sync
+ FAPI_TRY(mss::workarounds::mcbist::broadcast_out_of_sync(i_target, mss::ON));
+
+ for (const auto& p : mss::find_targets<TARGET_TYPE_MCA>(i_target))
+ {
+ fir::reg<MCA_FIR> l_ecc64_fir_reg(p, l_rc1);
+ fir::reg<MCA_MBACALFIRQ> l_cal_fir_reg(p, l_rc2);
+ uint64_t rcd_protect_time = 0;
+ const auto l_chip_target = mss::find_target<fapi2::TARGET_TYPE_PROC_CHIP>(i_target);
+
+ FAPI_TRY(l_rc1, "unable to create fir::reg for %d", MCA_FIR);
+ FAPI_TRY(l_rc2, "unable to create fir::reg for %d", MCA_MBACALFIRQ);
+
+ // Read out the wr_done and rd_tag delays and find min
+ // and set the RCD Protect Time to this value
+ FAPI_TRY (mss::read_dsm0q_register(p, dsm0_buffer) );
+ mss::get_wrdone_delay(dsm0_buffer, wr_done_delay);
+ mss::get_rdtag_delay(dsm0_buffer, rd_tag_delay);
+ rcd_protect_time = std::min(wr_done_delay, rd_tag_delay);
+ FAPI_TRY (mss::change_rcd_protect_time(p, rcd_protect_time) );
+
+ l_ecc64_fir_reg.checkstop<MCA_FIR_MAINLINE_AUE>()
+ .recoverable_error<MCA_FIR_MAINLINE_UE>()
+ .checkstop<MCA_FIR_MAINLINE_IAUE>()
+ .recoverable_error<MCA_FIR_MAINLINE_IUE>();
+
+ l_cal_fir_reg.recoverable_error<MCA_MBACALFIRQ_PORT_FAIL>();
+
+ // If ATTR_CHIP_EC_FEATURE_HW414700 is enabled set checkstops
+ FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_HW414700, l_chip_target, l_checkstop_flag) );
+
+ // If the system is running DD2 chips override some recoverable firs with checkstop
+ // Due to a known hardware defect with DD2 certain errors are not handled properly
+ // As a result, these firs are marked as checkstop for DD2 to avoid any mishandling
+ if (l_checkstop_flag)
+ {
+ l_ecc64_fir_reg.checkstop<MCA_FIR_MAINLINE_UE>()
+ .checkstop<MCA_FIR_MAINLINE_RCD>();
+ l_cal_fir_reg.checkstop<MCA_MBACALFIRQ_PORT_FAIL>();
+ }
+
+ // If MNFG FLAG Threshhold is enabled skip IUE unflagging
+ FAPI_TRY ( mss::mnfg_flags(l_mnfg_buffer) );
+
+ if ( !(l_mnfg_buffer.getBit<MNFG_THRESHOLDS_ATTR>()) )
+ {
+ l_ecc64_fir_reg.recoverable_error<MCA_FIR_MAINTENANCE_IUE>();
+ }
+
+ FAPI_TRY(l_ecc64_fir_reg.write(), "unable to write fir::reg %d", MCA_FIR);
+ FAPI_TRY(l_cal_fir_reg.write(), "unable to write fir::reg %d", MCA_MBACALFIRQ);
+
+ // Change Maint AUE and IAUE to checkstop without unmasking
+ // Normal setup modifies masked bits in addition to setting checkstop
+ // This causes issues if error has occured, manually scoming to avoid this
+ FAPI_TRY( mss::getScom(p, MCA_ACTION1, l_aue_buffer) );
+ l_aue_buffer.clearBit<MCA_FIR_MAINTENANCE_AUE>();
+ l_aue_buffer.clearBit<MCA_FIR_MAINTENANCE_IAUE>();
+ FAPI_TRY( mss::putScom(p, MCA_ACTION1, l_aue_buffer) );
+
+ // Note: We also want to include the following setup RCD recovery and port fail
+ FAPI_TRY( mss::change_port_fail_disable(p, mss::LOW) );
+ FAPI_TRY( mss::change_rcd_recovery_disable(p, mss::LOW) );
+ }
+
+ return fapi2::FAPI2_RC_SUCCESS;
+
+fapi_try_exit:
+ return fapi2::current_err;
+}
+
+///
+/// @brief Unmask and setup actions for scrub related FIR
+/// @param[in] i_target the fapi2::Target MCBIST
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff ok
+///
+template<>
+fapi2::ReturnCode after_background_scrub<mss::mc_type::NIMBUS>( const fapi2::Target<fapi2::TARGET_TYPE_MCBIST>&
+ i_target )
+{
+ for (const auto& p : mss::find_targets<TARGET_TYPE_MCA>(i_target))
+ {
+ fapi2::ReturnCode l_rc;
+ fir::reg<MCA_FIR> l_ecc64_fir_reg(p, l_rc);
+ FAPI_TRY(l_rc, "unable to create fir::reg 0x%016lx for %s", MCA_FIR, mss::c_str(p));
+
+ l_ecc64_fir_reg.recoverable_error<MCA_FIR_MAINLINE_MPE_RANK_0_TO_7,
+ MCA_FIR_MAINLINE_MPE_RANK_0_TO_7_LEN>()
+ .recoverable_error<MCA_FIR_MAINLINE_NCE>()
+ .recoverable_error<MCA_FIR_MAINLINE_TCE>()
+ .recoverable_error<MCA_FIR_MAINLINE_IMPE>()
+ .recoverable_error<MCA_FIR_MAINTENANCE_IMPE>();
+
+ FAPI_TRY(l_ecc64_fir_reg.write(), "unable to write fir::reg 0x%016lx for %s", MCA_FIR, mss::c_str(p));
+ }
+
+ return fapi2::FAPI2_RC_SUCCESS;
+
+fapi_try_exit:
+ return fapi2::current_err;
+}
+
}
}
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/fir/unmask.H b/src/import/chips/p9/procedures/hwp/memory/lib/fir/unmask.H
index 7a4d271bc..a6ae3863f 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/fir/unmask.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/fir/unmask.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2016,2018 */
+/* Contributors Listed Below - COPYRIGHT 2016,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -45,7 +45,57 @@ namespace mss
namespace unmask
{
+///
+/// @brief Unmask and setup actions performed after draminit_mc
+/// @param[in] i_target the fapi2::Target of the MCBIST
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff ok
+///
+template<>
+fapi2::ReturnCode after_draminit_mc<mss::mc_type::NIMBUS>( const fapi2::Target<fapi2::TARGET_TYPE_MCBIST>& i_target );
+
+///
+/// @brief Unmask and setup actions performed after draminit_training
+/// @param[in] i_target the fapi2::Target of the MCBIST
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff ok
+///
+template<>
+fapi2::ReturnCode after_draminit_training<mss::mc_type::NIMBUS>( const fapi2::Target<fapi2::TARGET_TYPE_MCBIST>&
+ i_target );
+///
+/// @brief Unmask and setup actions performed after mss_scominit
+/// (yeah, it's clearing bits - it's ok)
+/// @param[in] i_target the fapi2::Target of the MCBIST
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff ok
+///
+template<>
+fapi2::ReturnCode after_scominit<mss::mc_type::NIMBUS>( const fapi2::Target<fapi2::TARGET_TYPE_MCBIST>& i_target );
+
+///
+/// @brief Unmask and setup actions performed after mss_ddr_phy_reset
+/// @param[in] i_target the fapi2::Target of the MCBIST
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff ok
+///
+template<>
+fapi2::ReturnCode after_phy_reset<mss::mc_type::NIMBUS>( const fapi2::Target<fapi2::TARGET_TYPE_MCBIST>& i_target );
+
+
+///
+/// @brief Unmask and setup actions for memdiags related FIR
+/// @param[in] i_target the fapi2::Target
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff ok
+///
+template<>
+fapi2::ReturnCode after_memdiags<mss::mc_type::NIMBUS>( const fapi2::Target<fapi2::TARGET_TYPE_MCBIST>& i_target );
+
+///
+/// @brief Unmask and setup actions for scrub related FIR
+/// @param[in] i_target the fapi2::Target
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff ok
+///
+template<>
+fapi2::ReturnCode after_background_scrub<mss::mc_type::NIMBUS>( const fapi2::Target<fapi2::TARGET_TYPE_MCBIST>&
+ i_target );
}
}
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mss.mk b/src/import/chips/p9/procedures/hwp/memory/lib/mss.mk
index 2b07ee18c..878c51e37 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/mss.mk
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/mss.mk
@@ -5,7 +5,7 @@
#
# OpenPOWER HostBoot Project
#
-# Contributors Listed Below - COPYRIGHT 2015,2017
+# Contributors Listed Below - COPYRIGHT 2015,2019
# [+] International Business Machines Corp.
#
#
@@ -44,6 +44,7 @@ $(call ADD_MODULE_INCDIR,$(1),$(FAPI2_PATH)/include)
$(call ADD_MODULE_INCDIR,$(1),$(GENPATH))
$(call ADD_MODULE_INCDIR,$(1),$(FAPI2_PLAT_INCLUDE))
$(call ADD_MODULE_INCDIR,$(1),$(ROOTPATH))
+$(call ADD_MODULE_INCDIR,$(1),$(ROOTPATH)/generic/memory/lib)
endef
MODULE = mss
OBJS += $(MSS_MODULE_OBJS)
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_background_scrub.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_background_scrub.C
index 06e15b95b..7f02e7cf6 100644
--- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_background_scrub.C
+++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_background_scrub.C
@@ -43,48 +43,29 @@
#include <generic/memory/lib/utils/mcbist/gen_patterns.H>
#include <lib/mcbist/memdiags.H>
#include <generic/memory/lib/utils/count_dimm.H>
-#include <lib/fir/memdiags_fir.H>
+#include <lib/fir/unmask.H>
using fapi2::TARGET_TYPE_MCBIST;
using fapi2::TARGET_TYPE_MCA;
using fapi2::TARGET_TYPE_SYSTEM;
using fapi2::FAPI2_RC_SUCCESS;
-///
-/// @brief Begin background scrub
-/// @param[in] i_target MCBIST
-/// @return FAPI2_RC_SUCCESS iff ok
-///
-fapi2::ReturnCode p9_mss_background_scrub( const fapi2::Target<TARGET_TYPE_MCBIST>& i_target )
-{
- FAPI_INF("Start mss background scrub on: %s", mss::c_str( i_target ));
- // If there are no DIMM we don't need to bother. In fact, we can't as we didn't setup
- // attributes for the PHY, etc.
- if (mss::count_dimm(i_target) == 0)
- {
- FAPI_INF("... skipping background scrub for %s - no DIMM ...", mss::c_str(i_target));
- return fapi2::FAPI2_RC_SUCCESS;
- }
-
- // If we're running in the simulator, we want to only touch the addresses which training touched
- uint8_t l_sim = 0;
- FAPI_TRY( mss::is_simulation(l_sim) );
+extern "C"
+{
- // Kick off background scrub if we are not running in sim
- if (!(l_sim))
+ ///
+ /// @brief Begin background scrub
+ /// @param[in] i_target MCBIST
+ /// @return FAPI2_RC_SUCCESS iff ok
+ ///
+ fapi2::ReturnCode p9_mss_background_scrub( const fapi2::Target<TARGET_TYPE_MCBIST>& i_target )
{
- // Start background scrub
- FAPI_TRY ( mss::memdiags::background_scrub( i_target,
- mss::mcbist::stop_conditions<>(),
- mss::mcbist::speed::BG_SCRUB,
- mss::mcbist::address() ) );
+ FAPI_INF("Start mss background scrub on: %s", mss::c_str( i_target ));
+ FAPI_TRY(mss::memdiags::mss_background_scrub_helper(i_target));
+ fapi_try_exit:
+ return fapi2::current_err;
}
- // Unmask firs after background scrub is started
- FAPI_TRY ( mss::unmask::after_background_scrub( i_target ) );
-
-fapi_try_exit:
- return fapi2::current_err;
}
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_ddr_phy_reset.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_ddr_phy_reset.C
index 27b616a72..8d439b9d8 100644
--- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_ddr_phy_reset.C
+++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_ddr_phy_reset.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2018 */
+/* Contributors Listed Below - COPYRIGHT 2015,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -33,6 +33,7 @@
// *HWP Level: 3
// *HWP Consumed by: FSP:HB
+#include <lib/shared/nimbus_defaults.H>
#include <stdint.h>
#include <string.h>
@@ -198,7 +199,7 @@ extern "C"
// The algorithm is 'good path do after_phy_reset, all paths (error or not) perform the checks
// which are defined in during_phy_reset'. We won't run after_phy_reset (unmask of FIR) unless
// we're done with a success.
- FAPI_TRY( mss::unmask::after_phy_reset<mss::mc_type::NIMBUS>(i_target), "%s Error in p9_mss_ddr_phy_reset.C",
+ FAPI_TRY( mss::unmask::after_phy_reset(i_target), "%s Error in p9_mss_ddr_phy_reset.C",
mss::c_str(i_target) );
// Leave as we're all good and checked the FIR already ...
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit_mc.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit_mc.C
index 66892c8bd..076f2396b 100644
--- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit_mc.C
+++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit_mc.C
@@ -33,6 +33,7 @@
// *HWP Level: 3
// *HWP Consumed by: FSP:HB
+#include <lib/shared/nimbus_defaults.H>
#include <fapi2.H>
#include <mss.H>
@@ -147,7 +148,7 @@ extern "C"
}
// At this point the DDR interface must be monitored for memory errors. Memory related FIRs should be unmasked.
- FAPI_TRY( mss::unmask::after_draminit_mc<mss::mc_type::NIMBUS>(i_target), "%s Failed after_draminit_mc",
+ FAPI_TRY( mss::unmask::after_draminit_mc(i_target), "%s Failed after_draminit_mc",
mss::c_str(i_target) );
fapi_try_exit:
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit_training.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit_training.C
index e4084b461..0a13ac90c 100644
--- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit_training.C
+++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit_training.C
@@ -33,6 +33,7 @@
// *HWP Level: 3
// *HWP Consumed by: FSP:HB
+#include <lib/shared/nimbus_defaults.H>
#include <fapi2.H>
#include <mss.H>
#include <vector>
@@ -212,7 +213,7 @@ extern "C"
// We do it here in order to train every port
FAPI_TRY( mss::draminit_training_error_handler(l_fails) );
// Unmask FIR
- FAPI_TRY( mss::unmask::after_draminit_training<mss::mc_type::NIMBUS>(i_target), "Error in p9_mss_draminit" );
+ FAPI_TRY( mss::unmask::after_draminit_training(i_target), "Error in p9_mss_draminit" );
fapi_try_exit:
FAPI_INF("End draminit training");
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_memdiag.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_memdiag.C
index 33efe93b5..b04d66c20 100644
--- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_memdiag.C
+++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_memdiag.C
@@ -47,7 +47,7 @@
#include <lib/mcbist/mcbist.H>
#include <lib/mc/port.H>
#include <lib/ecc/ecc.H>
-#include <lib/fir/memdiags_fir.H>
+#include <lib/fir/unmask.H>
using fapi2::TARGET_TYPE_MCBIST;
using fapi2::TARGET_TYPE_SYSTEM;
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_scominit.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_scominit.C
index 3ee15dc3b..d2f58b0bc 100644
--- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_scominit.C
+++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_scominit.C
@@ -119,7 +119,7 @@ fapi2::ReturnCode p9_mss_scominit( const fapi2::Target<TARGET_TYPE_MCBIST>& i_ta
FAPI_TRY( mss::phy_scominit(i_target), "%s failed phy_scominit", mss::c_str(i_target) );
// Do FIRry things
- FAPI_TRY( mss::unmask::after_scominit<mss::mc_type::NIMBUS>(i_target), "%s failed after_scominit",
+ FAPI_TRY( mss::unmask::after_scominit(i_target), "%s failed after_scominit",
mss::c_str(i_target) );
fapi_try_exit:
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_scrub.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_scrub.C
index 6ba472549..0fb902ac2 100644
--- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_scrub.C
+++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_scrub.C
@@ -43,102 +43,28 @@
#include <generic/memory/lib/utils/mcbist/gen_patterns.H>
#include <lib/mcbist/memdiags.H>
#include <generic/memory/lib/utils/count_dimm.H>
-#include <lib/fir/memdiags_fir.H>
+#include <lib/fir/unmask.H>
using fapi2::TARGET_TYPE_MCBIST;
using fapi2::TARGET_TYPE_MCA;
using fapi2::TARGET_TYPE_SYSTEM;
using fapi2::FAPI2_RC_SUCCESS;
-///
-/// @brief Begin background scrub
-/// @param[in] i_target MCBIST
-/// @return FAPI2_RC_SUCCESS iff ok
-///
-fapi2::ReturnCode p9_mss_scrub( const fapi2::Target<TARGET_TYPE_MCBIST>& i_target )
+extern "C"
{
- FAPI_INF("Start mss scrub");
- // If there are no DIMM we don't need to bother. In fact, we can't as we didn't setup
- // attributes for the PHY, etc.
- if (mss::count_dimm(i_target) == 0)
+ ///
+ /// @brief Begin background scrub
+ /// @param[in] i_target MCBIST
+ /// @return FAPI2_RC_SUCCESS iff ok
+ ///
+ fapi2::ReturnCode p9_mss_scrub( const fapi2::Target<TARGET_TYPE_MCBIST>& i_target )
{
- FAPI_INF("... skipping scrub for %s - no DIMM ...", mss::c_str(i_target));
- return fapi2::FAPI2_RC_SUCCESS;
- }
-
- // If we're running in the simulator, we want to only touch the addresses which training touched
- uint8_t l_sim = 0;
- bool l_poll_results = false;
- fapi2::buffer<uint64_t> l_status;
+ FAPI_INF("Start mss scrub for %s", mss::c_str(i_target));
+ FAPI_TRY(mss::memdiags::mss_scrub_helper(i_target));
- // A small vector of addresses to poll during the polling loop
- const std::vector<mss::poll_probe<fapi2::TARGET_TYPE_MCBIST>> l_probes =
- {
- {i_target, "mcbist current address", MCBIST_MCBMCATQ},
- };
-
- // We'll fill in the initial delay below
- mss::poll_parameters l_poll_parameters(0, 200, 100 * mss::DELAY_1MS, 200, 10000);
- uint64_t l_memory_size = 0;
-
- FAPI_TRY( mss::eff_memory_size<mss::mc_type::NIMBUS>(i_target, l_memory_size) );
- l_poll_parameters.iv_initial_delay = mss::calculate_initial_delay(i_target, (l_memory_size * mss::BYTES_PER_GB));
-
- FAPI_TRY( mss::is_simulation( l_sim) );
-
- if (l_sim)
- {
- fapi2::ReturnCode l_rc;
-
- // Use some sort of pattern in sim in case the verification folks need to look for something
- // TK. Need a verification pattern. This is a not-good pattern for verification ... We don't really
- // have a good pattern for verification defined.
- FAPI_INF("running mss sim init in place of scrub");
- l_rc = mss::mcbist::sim::sf_init(i_target, mss::mcbist::PATTERN_0);
-
- // Unmask firs and turn off FIFO mode before returning
- FAPI_TRY ( mss::unmask::after_memdiags( i_target ) );
- FAPI_TRY ( mss::unmask::after_background_scrub( i_target ) );
- FAPI_TRY ( mss::reset_reorder_queue_settings(i_target) );
-
- return l_rc;
+ fapi_try_exit:
+ return fapi2::current_err;
}
- // In Cronus on hardware (which is how we got here - f/w doesn't call this) we want
- // to call sf_init (0's)
- // TK we need to check FIR given the way this is right now, we should adjust with better stop
- // conditions when we learn more about what we want to find in the lab
- FAPI_TRY( mss::memdiags::sf_init(i_target, mss::mcbist::PATTERN_0) );
-
- // Poll for completion.
- l_poll_results = mss::poll(i_target, MCBIST_MCBISTFIRQ, l_poll_parameters,
- [&l_status](const size_t poll_remaining,
- const fapi2::buffer<uint64_t>& stat_reg) -> bool
- {
- FAPI_DBG("mcbist firq 0x%llx, remaining: %d", stat_reg, poll_remaining);
- l_status = stat_reg;
- return l_status.getBit<MCBIST_MCBISTFIRQ_MCBIST_PROGRAM_COMPLETE>() == true;
- },
- l_probes);
-
- FAPI_ASSERT( l_poll_results == true,
- fapi2::MSS_MEMDIAGS_SUPERFAST_INIT_FAILED_TO_INIT().set_MCBIST_TARGET(i_target),
- "p9_mss_scrub (init) timedout %s", mss::c_str(i_target) );
-
- // Unmask firs after memdiags and turn off FIFO mode
- FAPI_TRY ( mss::unmask::after_memdiags( i_target ) );
- FAPI_TRY ( mss::reset_reorder_queue_settings(i_target) );
-
- // Start background scrub
- FAPI_TRY ( mss::memdiags::background_scrub( i_target,
- mss::mcbist::stop_conditions<>(),
- mss::mcbist::speed::BG_SCRUB,
- mss::mcbist::address() ) );
-
- // Unmask firs after background scrub is started
- FAPI_TRY ( mss::unmask::after_background_scrub( i_target ) );
-
-fapi_try_exit:
- return fapi2::current_err;
}
diff --git a/src/import/generic/memory/lib/utils/fir/gen_mss_unmask.H b/src/import/generic/memory/lib/utils/fir/gen_mss_unmask.H
index fa14534e5..a45b48202 100644
--- a/src/import/generic/memory/lib/utils/fir/gen_mss_unmask.H
+++ b/src/import/generic/memory/lib/utils/fir/gen_mss_unmask.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2018 */
+/* Contributors Listed Below - COPYRIGHT 2018,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -38,6 +38,8 @@
#include <fapi2.H>
+#include <generic/memory/lib/utils/shared/mss_generic_consts.H>
+
namespace mss
{
@@ -46,40 +48,63 @@ namespace unmask
///
/// @brief Unmask and setup actions performed after draminit_mc
+/// @tparam MC the memory controller type
/// @tparam T the fapi2::TargetType which hold the FIR bits
/// @param[in] i_target the fapi2::Target
/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff ok
///
-template< mss::mc_type MC, fapi2::TargetType T >
+template< mss::mc_type MC = DEFAULT_MC_TYPE, fapi2::TargetType T >
fapi2::ReturnCode after_draminit_mc( const fapi2::Target<T>& i_target );
///
/// @brief Unmask and setup actions performed after draminit_training
+/// @tparam MC the memory controller type
/// @tparam T the fapi2::TargetType which hold the FIR bits
/// @param[in] i_target the fapi2::Target
/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff ok
///
-template< mss::mc_type MC, fapi2::TargetType T >
+template< mss::mc_type MC = DEFAULT_MC_TYPE, fapi2::TargetType T >
fapi2::ReturnCode after_draminit_training( const fapi2::Target<T>& i_target );
///
/// @brief Unmask and setup actions performed after mss_scominit
+/// @tparam MC the memory controller type
/// @tparam T the fapi2::TargetType which hold the FIR bits
-/// @param[in] i_target the fapi2::Target of the MCBIST
+/// @param[in] i_target the fapi2::Target
/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff ok
///
-template< mss::mc_type MC, fapi2::TargetType T >
+template< mss::mc_type MC = DEFAULT_MC_TYPE, fapi2::TargetType T >
fapi2::ReturnCode after_scominit( const fapi2::Target<T>& i_target );
///
/// @brief Unmask and setup actions performed after mss_ddr_phy_reset
+/// @tparam MC the memory controller type
/// @tparam T the fapi2::TargetType which hold the FIR bits
-/// @param[in] i_target the fapi2::Target of the MCBIST
+/// @param[in] i_target the fapi2::Target
/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff ok
///
-template< mss::mc_type MC, fapi2::TargetType T >
+template< mss::mc_type MC = DEFAULT_MC_TYPE, fapi2::TargetType T >
fapi2::ReturnCode after_phy_reset( const fapi2::Target<T>& i_target );
+///
+/// @brief Unmask and setup actions for memdiags related FIR
+/// @tparam MC the memory controller type
+/// @tparam T the fapi2::TargetType which hold the FIR bits
+/// @param[in] i_target the fapi2::Target
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff ok
+///
+template< mss::mc_type MC = DEFAULT_MC_TYPE, fapi2::TargetType T >
+fapi2::ReturnCode after_memdiags( const fapi2::Target<T>& i_target );
+
+///
+/// @brief Unmask and setup actions for scrub related FIR
+/// @tparam MC the memory controller type
+/// @tparam T the fapi2::TargetType which hold the FIR bits
+/// @param[in] i_target the fapi2::Target
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff ok
+///
+template< mss::mc_type MC = DEFAULT_MC_TYPE, fapi2::TargetType T >
+fapi2::ReturnCode after_background_scrub( const fapi2::Target<T>& i_target );
}
}
diff --git a/src/import/generic/memory/lib/utils/mc/gen_mss_port.H b/src/import/generic/memory/lib/utils/mc/gen_mss_port.H
index f5e822f8f..94e3fa6bf 100644
--- a/src/import/generic/memory/lib/utils/mc/gen_mss_port.H
+++ b/src/import/generic/memory/lib/utils/mc/gen_mss_port.H
@@ -38,6 +38,7 @@
#define _GEN_MSS_PORT_H_
#include <fapi2.H>
+#include <generic/memory/lib/mss_generic_attribute_getters.H>
#include <generic/memory/lib/utils/shared/mss_generic_consts.H>
#include <generic/memory/lib/utils/mc/gen_mss_port_traits.H>
#include <generic/memory/lib/utils/scom.H>
diff --git a/src/import/generic/memory/lib/utils/mcbist/gen_mss_memdiags.H b/src/import/generic/memory/lib/utils/mcbist/gen_mss_memdiags.H
index 294756dfa..6e3ceb03f 100644
--- a/src/import/generic/memory/lib/utils/mcbist/gen_mss_memdiags.H
+++ b/src/import/generic/memory/lib/utils/mcbist/gen_mss_memdiags.H
@@ -44,10 +44,14 @@
#include <generic/memory/lib/utils/mcbist/gen_address.H>
#include <generic/memory/lib/utils/mcbist/gen_patterns.H>
#include <generic/memory/lib/utils/mcbist/gen_settings.H>
+#include <generic/memory/lib/utils/fir/gen_mss_unmask.H>
#include <generic/memory/lib/utils/count_dimm.H>
#include <generic/memory/lib/utils/conversions.H>
#include <generic/memory/lib/utils/pos.H>
#include <generic/memory/lib/utils/find_magic.H>
+#include <generic/memory/lib/utils/count_dimm.H>
+#include <generic/memory/lib/utils/poll.H>
+
namespace mss
{
@@ -1103,7 +1107,145 @@ fapi_try_exit:
return fapi2::current_err;
}
-} // namespace
+///
+/// @brief Begin scrub helper
+/// @tparam MC the mc type of the T
+/// @tparam T fapi2::TargetType of the MCBIST engine
+/// @tparam TT the mcbistTraits associated with T
+/// @param[in] i_target MCBIST
+/// @return FAPI2_RC_SUCCESS iff ok
+///
+template< mss::mc_type MC = DEFAULT_MC_TYPE, fapi2::TargetType T, typename TT = mcbistTraits<MC, T> >
+fapi2::ReturnCode mss_scrub_helper(const fapi2::Target<T>& i_target )
+{
+ FAPI_INF("Start mss_scrub_helper for %s", mss::c_str(i_target));
+
+ // If there are no DIMM we don't need to bother. In fact, we can't as we didn't setup
+ // attributes for the PHY, etc.
+ if (mss::count_dimm(i_target) == 0)
+ {
+ FAPI_INF("... skipping scrub for %s - no DIMM ...", mss::c_str(i_target));
+ return fapi2::FAPI2_RC_SUCCESS;
+ }
+
+ // If we're running in the simulator, we want to only touch the addresses which training touched
+ uint8_t l_sim = 0;
+ bool l_poll_results = false;
+ fapi2::buffer<uint64_t> l_status;
+
+ // A small vector of addresses to poll during the polling loop
+ const std::vector<mss::poll_probe<T>> l_probes =
+ {
+ {i_target, "mcbist current address", TT::LAST_ADDR_REG},
+ };
+
+ // We'll fill in the initial delay below
+ mss::poll_parameters l_poll_parameters(0, 200, 100 * mss::DELAY_1MS, 200, 10000);
+ uint64_t l_memory_size = 0;
+
+ FAPI_TRY( mss::eff_memory_size<MC>(i_target, l_memory_size) );
+ l_poll_parameters.iv_initial_delay = mss::calculate_initial_delay<MC>(i_target, (l_memory_size * mss::BYTES_PER_GB));
+
+ FAPI_TRY( mss::attr::get_is_simulation( l_sim) );
+
+ if (l_sim)
+ {
+ FAPI_INF("running mss sim init in place of scrub for %s", mss::c_str(i_target));
+
+ // Use some sort of pattern in sim in case the verification folks need to look for something
+ // TK. Need a verification pattern. This is a not-good pattern for verification ... We don't really
+ // have a good pattern for verification defined.
+ auto l_rc = mss::mcbist::sim::sf_init<MC>(i_target, mss::mcbist::PATTERN_0);
+
+ // Unmask firs and turn off FIFO mode before returning
+ FAPI_TRY ( mss::unmask::after_memdiags<MC>( i_target ) );
+ FAPI_TRY ( mss::unmask::after_background_scrub<MC>( i_target ) );
+ FAPI_TRY ( mss::reset_reorder_queue_settings<MC>(i_target) );
+
+ return l_rc;
+ }
+
+ // In Cronus on hardware (which is how we got here - f/w doesn't call this) we want
+ // to call sf_init (0's)
+ // TK we need to check FIR given the way this is right now, we should adjust with better stop
+ // conditions when we learn more about what we want to find in the lab
+ FAPI_TRY( mss::memdiags::sf_init<MC>(i_target, mss::mcbist::PATTERN_0) );
+
+ // Poll for completion.
+ l_poll_results = mss::poll(i_target, TT::FIRQ_REG, l_poll_parameters,
+ [&l_status](const size_t poll_remaining,
+ const fapi2::buffer<uint64_t>& stat_reg) -> bool
+ {
+ FAPI_DBG("mcbist firq 0x%llx, remaining: %d", stat_reg, poll_remaining);
+ l_status = stat_reg;
+ return l_status.getBit<TT::MCB_PROGRAM_COMPLETE>() == true;
+ },
+ l_probes);
+
+ FAPI_ASSERT( l_poll_results == true,
+ fapi2::MSS_MEMDIAGS_SUPERFAST_INIT_FAILED_TO_INIT().set_MCBIST_TARGET(i_target),
+ "p9_mss_scrub (init) timedout %s", mss::c_str(i_target) );
+
+ // Unmask firs after memdiags and turn off FIFO mode
+ FAPI_TRY ( mss::unmask::after_memdiags<MC>( i_target ) );
+ FAPI_TRY ( mss::reset_reorder_queue_settings<MC>(i_target) );
+
+ // Start background scrub
+ FAPI_TRY ( mss::memdiags::background_scrub<MC>( i_target,
+ mss::mcbist::stop_conditions<MC>(),
+ mss::mcbist::speed::BG_SCRUB,
+ mss::mcbist::address() ) );
+
+ // Unmask firs after background scrub is started
+ FAPI_TRY ( mss::unmask::after_background_scrub<MC>( i_target ) );
+
+fapi_try_exit:
+ return fapi2::current_err;
+}
+
+///
+/// @brief Begin background scrub helper
+/// @tparam MC the mc type of the T
+/// @tparam T fapi2::TargetType of the MCBIST engine
+/// @tparam TT the mcbistTraits associated with T
+/// @param[in] i_target MCBIST
+/// @return FAPI2_RC_SUCCESS iff ok
+///
+template< mss::mc_type MC = DEFAULT_MC_TYPE, fapi2::TargetType T, typename TT = mcbistTraits<MC, T> >
+fapi2::ReturnCode mss_background_scrub_helper( const fapi2::Target<T>& i_target )
+{
+ FAPI_INF("Start mss_background_scrub_helper b on: %s", mss::c_str( i_target ));
+
+ // If there are no DIMM we don't need to bother. In fact, we can't as we didn't setup
+ // attributes for the PHY, etc.
+ if (mss::count_dimm(i_target) == 0)
+ {
+ FAPI_INF("... skipping background scrub for %s - no DIMM ...", mss::c_str(i_target));
+ return fapi2::FAPI2_RC_SUCCESS;
+ }
+
+ // If we're running in the simulator, we want to only touch the addresses which training touched
+ uint8_t l_sim = 0;
+ FAPI_TRY( mss::attr::get_is_simulation(l_sim) );
+
+ // Kick off background scrub if we are not running in sim
+ if (!(l_sim))
+ {
+ // Start background scrub
+ FAPI_TRY ( mss::memdiags::background_scrub<MC>( i_target,
+ mss::mcbist::stop_conditions<MC>(),
+ mss::mcbist::speed::BG_SCRUB,
+ mss::mcbist::address() ) );
+ }
+
+ // Unmask firs after background scrub is started
+ FAPI_TRY ( mss::unmask::after_background_scrub<MC>( i_target ) );
+
+fapi_try_exit:
+ return fapi2::current_err;
+}
+
+} // namespace memdiags
-} // namespace
+} // namespace mss
#endif
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