diff options
Diffstat (limited to 'src/import/generic')
6 files changed, 92 insertions, 16 deletions
diff --git a/src/import/generic/memory/lib/utils/dimm/mss_timing.H b/src/import/generic/memory/lib/utils/dimm/mss_timing.H index 8fd169508..2bc9805de 100644 --- a/src/import/generic/memory/lib/utils/dimm/mss_timing.H +++ b/src/import/generic/memory/lib/utils/dimm/mss_timing.H @@ -269,8 +269,8 @@ inline fapi2::ReturnCode calc_trfc_dlr(const fapi2::Target<fapi2::TARGET_TYPE_DI // which they "shouldn't" mess up as long as use "attribute" enums. // if openpower messes this up we can at least catch it FAPI_ASSERT( false, - fapi2::MSS_INVALID_FINE_REFRESH() - .set_REFRESH_MODE(i_refresh_mode), + fapi2::MSS_INVALID_FINE_REFRESH_MODE() + .set_FINE_REF_MODE(i_refresh_mode), "Incorrect Fine Refresh Mode received: %d ", i_refresh_mode); break; diff --git a/src/import/generic/memory/lib/utils/mc/gen_mss_port.H b/src/import/generic/memory/lib/utils/mc/gen_mss_port.H index c1dbe9175..d8351be54 100644 --- a/src/import/generic/memory/lib/utils/mc/gen_mss_port.H +++ b/src/import/generic/memory/lib/utils/mc/gen_mss_port.H @@ -524,7 +524,7 @@ inline fapi2::ReturnCode reset_reorder_queue_settings(const fapi2::Target<T>& i_ // Changes the reorder queue settings { // Two settings are FIFO and REORDER. FIFO is a 1 in the registers, while reorder is a 0 state - const mss::states l_state = ((l_reorder_queue == fapi2::ENUM_ATTR_MSS_REORDER_QUEUE_SETTING_FIFO) ? + const mss::states l_state = ((l_reorder_queue == fapi2::ENUM_ATTR_MEM_REORDER_QUEUE_SETTING_FIFO) ? mss::states::ON : mss::states::OFF); FAPI_TRY(configure_rrq(i_target, l_state), "%s failed to reset read reorder queue settings", mss::c_str(i_target)); FAPI_TRY(configure_wrq(i_target, l_state), "%s failed to reset read reorder queue settings", mss::c_str(i_target)); diff --git a/src/import/generic/memory/lib/utils/power_thermal/gen_decoder.H b/src/import/generic/memory/lib/utils/power_thermal/gen_decoder.H index e72173146..f2d6370be 100644 --- a/src/import/generic/memory/lib/utils/power_thermal/gen_decoder.H +++ b/src/import/generic/memory/lib/utils/power_thermal/gen_decoder.H @@ -272,7 +272,7 @@ fapi2::ReturnCode generate_wildcard_mask(const uint32_t i_hash, uint32_t& o_mask if(ANY_SIZE == l_uint32_buf) { - l_mask.setBit(TT::DIMM_SIZE_START, TT::DIMM_SIZE_LEN); + l_mask.setBit<TT::DIMM_SIZE_START, TT::DIMM_SIZE_LEN>(); } //DRAM_GEN wildcard @@ -283,7 +283,7 @@ fapi2::ReturnCode generate_wildcard_mask(const uint32_t i_hash, uint32_t& o_mask if(ANY_GEN == l_uint8_buf) { - l_mask.setBit(TT::DRAM_GEN_START, TT::DRAM_GEN_LEN); + l_mask.setBit<TT::DRAM_GEN_START, TT::DRAM_GEN_LEN>(); } //DIMM_TYPE wildcard @@ -294,7 +294,7 @@ fapi2::ReturnCode generate_wildcard_mask(const uint32_t i_hash, uint32_t& o_mask if(ANY_TYPE == l_uint8_buf) { - l_mask.setBit(TT::DIMM_TYPE_START, TT::DIMM_TYPE_LEN); + l_mask.setBit<TT::DIMM_TYPE_START, TT::DIMM_TYPE_LEN>(); } //DRAM_WIDTH wildcard @@ -305,7 +305,7 @@ fapi2::ReturnCode generate_wildcard_mask(const uint32_t i_hash, uint32_t& o_mask if(ANY_WIDTH == l_uint8_buf) { - l_mask.setBit(TT::DRAM_WIDTH_START, TT::DRAM_WIDTH_LEN); + l_mask.setBit<TT::DRAM_WIDTH_START, TT::DRAM_WIDTH_LEN>(); } //DRAM_DENSITY wildcard @@ -316,7 +316,7 @@ fapi2::ReturnCode generate_wildcard_mask(const uint32_t i_hash, uint32_t& o_mask if(ANY_DENSITY == l_uint8_buf) { - l_mask.setBit(TT::DRAM_DENSITY_START, TT::DRAM_DENSITY_LEN); + l_mask.setBit<TT::DRAM_DENSITY_START, TT::DRAM_DENSITY_LEN>(); } //DRAM_STACK_TYPE wildcard @@ -327,7 +327,7 @@ fapi2::ReturnCode generate_wildcard_mask(const uint32_t i_hash, uint32_t& o_mask if(ANY_STACK_TYPE == l_uint8_buf) { - l_mask.setBit(TT::DRAM_STACK_TYPE_START, TT::DRAM_STACK_TYPE_LEN); + l_mask.setBit<TT::DRAM_STACK_TYPE_START, TT::DRAM_STACK_TYPE_LEN>(); } //DRAM_MFGID wildcard @@ -338,7 +338,7 @@ fapi2::ReturnCode generate_wildcard_mask(const uint32_t i_hash, uint32_t& o_mask if(ANY_MFGID == l_uint16_buf) { - l_mask.setBit(TT::DRAM_MFGID_START, TT::DRAM_MFGID_LEN); + l_mask.setBit<TT::DRAM_MFGID_START, TT::DRAM_MFGID_LEN>(); } @@ -352,7 +352,7 @@ fapi2::ReturnCode generate_wildcard_mask(const uint32_t i_hash, uint32_t& o_mask if(ANY_PORT == l_uint8_buf) { - l_mask.setBit(TT::DIMMS_PER_PORT_START, TT::DIMMS_PER_PORT_LEN); + l_mask.setBit<TT::DIMMS_PER_PORT_START, TT::DIMMS_PER_PORT_LEN>(); } } @@ -366,7 +366,7 @@ fapi2::ReturnCode generate_wildcard_mask(const uint32_t i_hash, uint32_t& o_mask if(ANY_HEIGHT == l_uint8_buf) { - l_mask.setBit(TT::DIMM_MODULE_HEIGHT_START, TT::DIMM_MODULE_HEIGHT_LEN); + l_mask.setBit<TT::DIMM_MODULE_HEIGHT_START, TT::DIMM_MODULE_HEIGHT_LEN>(); } } diff --git a/src/import/generic/memory/lib/utils/power_thermal/gen_throttle.H b/src/import/generic/memory/lib/utils/power_thermal/gen_throttle.H index 893a7e37b..378643e4e 100644 --- a/src/import/generic/memory/lib/utils/power_thermal/gen_throttle.H +++ b/src/import/generic/memory/lib/utils/power_thermal/gen_throttle.H @@ -41,6 +41,7 @@ #include <generic/memory/lib/utils/power_thermal/gen_throttle_traits.H> #include <generic/memory/lib/utils/count_dimm.H> #include <generic/memory/lib/mss_generic_system_attribute_getters.H> +#include <generic/memory/lib/mss_generic_system_attribute_setters.H> #include <generic/memory/lib/mss_generic_attribute_setters.H> #include <generic/memory/lib/utils/mss_math.H> #include <generic/memory/lib/utils/pos.H> @@ -1110,6 +1111,7 @@ fapi2::ReturnCode equalize_throttles (const std::vector< fapi2::Target<T> >& i_t if (mss::count_dimm(l_port) == 0) { + FAPI_INF("Seeing no DIMMs on %s -- skipping", mss::c_str(l_port)); continue; } @@ -1140,6 +1142,7 @@ fapi2::ReturnCode equalize_throttles (const std::vector< fapi2::Target<T> >& i_t if (mss::count_dimm(l_port) == 0) { + FAPI_INF("Seeing no DIMMs on %s -- skipping", mss::c_str(l_port)); continue; } @@ -1149,7 +1152,7 @@ fapi2::ReturnCode equalize_throttles (const std::vector< fapi2::Target<T> >& i_t l_fin_slot = l_min_slot; l_fin_port = l_min_port; - //Need to create throttle object for each mca in order to get dimm configuration and power curves + //Need to create throttle object for each port in order to get dimm configuration and power curves //To calculate the slot/port utilization and total port power consumption fapi2::ReturnCode l_rc = fapi2::FAPI2_RC_SUCCESS; @@ -1179,10 +1182,9 @@ fapi2::ReturnCode equalize_throttles (const std::vector< fapi2::Target<T> >& i_t { //Need this because of pos traits and templating stuff uint64_t l_fail = mss::fapi_pos(l_port); + //Set the failing port. OCC just needs one failing port, doesn't need all of them - FAPI_TRY( FAPI_ATTR_SET( fapi2::ATTR_MSS_MEM_PORT_POS_OF_FAIL_THROTTLE, - fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>(), - l_fail) ); + FAPI_TRY( attr::set_port_pos_of_fail_throttle(l_fail) ); FAPI_ASSERT_NOEXIT( false, fapi2::MSS_CALC_PORT_POWER_EXCEEDS_MAX() diff --git a/src/import/generic/procedures/xml/attribute_info/generic_memory_mrw_attributes.xml b/src/import/generic/procedures/xml/attribute_info/generic_memory_mrw_attributes.xml index 9cca3fe16..e27e60de1 100644 --- a/src/import/generic/procedures/xml/attribute_info/generic_memory_mrw_attributes.xml +++ b/src/import/generic/procedures/xml/attribute_info/generic_memory_mrw_attributes.xml @@ -737,4 +737,18 @@ <initToZero/> <mssAccessorName>mrw_safemode_dram_databus_util</mssAccessorName> </attribute> + + <attribute> + <id>ATTR_MEM_PORT_POS_OF_FAIL_THROTTLE</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description> + This is the fapi position of the port that failed to calculate + memory throttles given the passed in watt target and or utilization + </description> + <initToZero></initToZero> + <valueType>uint64</valueType> + <mssAccessorName>port_pos_of_fail_throttle</mssAccessorName> + <writeable/> + </attribute> + </attributes> diff --git a/src/import/generic/procedures/xml/error_info/generic_error.xml b/src/import/generic/procedures/xml/error_info/generic_error.xml index 0c69a88e9..0b7e037d9 100644 --- a/src/import/generic/procedures/xml/error_info/generic_error.xml +++ b/src/import/generic/procedures/xml/error_info/generic_error.xml @@ -369,6 +369,20 @@ </hwpError> <hwpError> + <rc>RC_MSS_INVALID_FREQ_PASSED_IN</rc> + <description> + An invalid Freq value has been set + </description> + <ffdc>FREQ</ffdc> + <ffdc>FUNCTION</ffdc> + <ffdc>DIMM_TARGET</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + + <hwpError> <rc>RC_MSS_INVALID_FREQUENCY</rc> <description> An invalid frequency was passed to frequency to clock period @@ -1182,4 +1196,50 @@ </callout> </hwpError> + <hwpError> + <rc>RC_MSS_INVALID_DRAM_WIDTH</rc> + <description> + Code only supports x4 and x8 drams at this time + </description> + <ffdc>DRAM_WIDTH</ffdc> + <callout> + <procedure>MEMORY_PLUGGING_ERROR</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>DIMM_TARGET</target> + <priority>MEDIUM</priority> + </callout> + <deconfigure> + <target>DIMM_TARGET</target> + </deconfigure> + <callout> + <procedure>CODE</procedure> + <priority>MEDIUM</priority> + </callout> + </hwpError> + + <hwpError> + <rc>RC_MSS_INVALID_PAGE_SIZE</rc> + <description> + Invalid page size + </description> + <ffdc>DRAM_WIDTH</ffdc> + <callout> + <procedure>MEMORY_PLUGGING_ERROR</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>DIMM_TARGET</target> + <priority>MEDIUM</priority> + </callout> + <deconfigure> + <target>DIMM_TARGET</target> + </deconfigure> + <callout> + <procedure>CODE</procedure> + <priority>MEDIUM</priority> + </callout> + </hwpError> + </hwpErrors> |
