diff options
Diffstat (limited to 'src/import/chips')
-rw-r--r-- | src/import/chips/p9/utils/imageProcs/p9_ring_identification.C | 242 | ||||
-rw-r--r-- | src/import/chips/p9/utils/imageProcs/p9_ring_identification.H | 28 |
2 files changed, 143 insertions, 127 deletions
diff --git a/src/import/chips/p9/utils/imageProcs/p9_ring_identification.C b/src/import/chips/p9/utils/imageProcs/p9_ring_identification.C index 3b284aac8..01782596e 100644 --- a/src/import/chips/p9/utils/imageProcs/p9_ring_identification.C +++ b/src/import/chips/p9/utils/imageProcs/p9_ring_identification.C @@ -20,138 +20,142 @@ const RingIdList RING_ID_LIST_PG[] = { - /* ringName ringId chipletId mvpdKeyword */ + /* ringName ringId chipletId vpdKeyword */ /* min max */ - {"perv_gptr", 0x01, 0x01, 0x01, VPD_KEYWORD_PDG}, - {"perv_time", 0x02, 0x01, 0x01, VPD_KEYWORD_PDG}, - {"occ_gptr", 0x04, 0x01, 0x01, VPD_KEYWORD_PDG}, - {"occ_time", 0x05, 0x01, 0x01, VPD_KEYWORD_PDG}, - {"perv_ana_gptr", 0x07, 0x01, 0x01, VPD_KEYWORD_PDG}, - {"perv_pll_gptr", 0x08, 0x01, 0x01, VPD_KEYWORD_PDG}, - {"perv_pibnet_gptr", 0x10, 0x01, 0x01, VPD_KEYWORD_PDG}, - {"perv_pibnet_time", 0x11, 0x01, 0x01, VPD_KEYWORD_PDG}, - {"n0_gptr", 0x16, 0x02, 0x02, VPD_KEYWORD_PDG}, - {"n0_time", 0x17, 0x02, 0x02, VPD_KEYWORD_PDG}, - {"n0_nx_gptr", 0x19, 0x02, 0x02, VPD_KEYWORD_PDG}, - {"n0_nx_time", 0x1A, 0x02, 0x02, VPD_KEYWORD_PDG}, - {"n0_cxa0_gptr", 0x1C, 0x02, 0x02, VPD_KEYWORD_PDG}, - {"n0_cxa0_time", 0x1D, 0x02, 0x02, VPD_KEYWORD_PDG}, - {"n1_gptr", 0x22, 0x03, 0x03, VPD_KEYWORD_PDG}, - {"n1_time", 0x23, 0x03, 0x03, VPD_KEYWORD_PDG}, - {"n1_ioo0_gptr", 0x25, 0x03, 0x03, VPD_KEYWORD_PDG}, - {"n1_ioo0_time", 0x26, 0x03, 0x03, VPD_KEYWORD_PDG}, - {"n1_ioo1_gptr", 0x28, 0x03, 0x03, VPD_KEYWORD_PDG}, - {"n1_ioo1_time", 0x29, 0x03, 0x03, VPD_KEYWORD_PDG}, - {"n1_mcs23_gptr", 0x2B, 0x03, 0x03, VPD_KEYWORD_PDG}, - {"n1_mcs23_time", 0x2C, 0x03, 0x03, VPD_KEYWORD_PDG}, - {"n2_gptr", 0x32, 0x04, 0x04, VPD_KEYWORD_PDG}, - {"n2_time", 0x33, 0x04, 0x04, VPD_KEYWORD_PDG}, - {"n2_cxa1_gptr", 0x35, 0x04, 0x04, VPD_KEYWORD_PDG}, - {"n2_cxa1_time", 0x36, 0x04, 0x04, VPD_KEYWORD_PDG}, - {"n2_psi_gptr", 0x38, 0x04, 0x04, VPD_KEYWORD_PDG}, - {"n3_gptr", 0x3F, 0x05, 0x05, VPD_KEYWORD_PDG}, - {"n3_time", 0x40, 0x05, 0x05, VPD_KEYWORD_PDG}, - {"n3_mcs01_gptr", 0x42, 0x05, 0x05, VPD_KEYWORD_PDG}, - {"n3_mcs01_time", 0x43, 0x05, 0x05, VPD_KEYWORD_PDG}, - {"n3_np_gptr", 0x45, 0x05, 0x05, VPD_KEYWORD_PDG}, - {"n3_np_time", 0x46, 0x05, 0x05, VPD_KEYWORD_PDG}, - {"xb_gptr", 0x4C, 0x06, 0x06, VPD_KEYWORD_PDG}, - {"xb_time", 0x4D, 0x06, 0x06, VPD_KEYWORD_PDG}, - {"xb_io0_gptr", 0x4F, 0x06, 0x06, VPD_KEYWORD_PDG}, - {"xb_io0_time", 0x50, 0x06, 0x06, VPD_KEYWORD_PDG}, - {"xb_io1_gptr", 0x52, 0x06, 0x06, VPD_KEYWORD_PDG}, - {"xb_io1_time", 0x53, 0x06, 0x06, VPD_KEYWORD_PDG}, - {"xb_io2_gptr", 0x55, 0x06, 0x06, VPD_KEYWORD_PDG}, - {"xb_io2_time", 0x56, 0x06, 0x06, VPD_KEYWORD_PDG}, - {"xb_pll_gptr", 0x57, 0x06, 0x06, VPD_KEYWORD_PDG}, - {"mc_gptr", 0x66, 0x07, 0xFF, VPD_KEYWORD_PDG}, //0x07, 0x08: multicast group 2 - {"mc_time", 0x67, 0x07, 0xFF, VPD_KEYWORD_PDG}, //0x07, 0x08: multicast group 2 - {"mc_iom01_gptr", 0x69, 0x07, 0xFF, VPD_KEYWORD_PDG}, //0x07, 0x08: multicast group 2 - {"mc_iom23_gptr", 0x6C, 0x07, 0xFF, VPD_KEYWORD_PDG}, //0x07, 0x08: multicast group 2 - {"mc_pll_gptr", 0x6E, 0x07, 0xFF, VPD_KEYWORD_PDG}, //0x07, 0x08: multicast group 2 - {"ob0_gptr", 0x7C, 0x09, 0x09, VPD_KEYWORD_PDG}, - {"ob0_time", 0x7D, 0x09, 0x09, VPD_KEYWORD_PDG}, - {"ob0_pll_gptr", 0x7E, 0x09, 0x09, VPD_KEYWORD_PDG}, - {"ob1_gptr", 0x8A, 0x0A, 0x0A, VPD_KEYWORD_PDG}, - {"ob1_time", 0x8B, 0x0A, 0x0A, VPD_KEYWORD_PDG}, - {"ob1_pll_gptr", 0x8C, 0x0A, 0x0A, VPD_KEYWORD_PDG}, - {"ob2_gptr", 0x98, 0x0B, 0x0B, VPD_KEYWORD_PDG}, - {"ob2_time", 0x99, 0x0B, 0x0B, VPD_KEYWORD_PDG}, - {"ob2_pll_gptr", 0x9A, 0x0B, 0x0B, VPD_KEYWORD_PDG}, - {"ob3_gptr", 0xA6, 0x0C, 0x0C, VPD_KEYWORD_PDG}, - {"ob3_time", 0xA7, 0x0C, 0x0C, VPD_KEYWORD_PDG}, - {"ob3_pll_gptr", 0xA8, 0x0C, 0x0C, VPD_KEYWORD_PDG}, - {"pci0_gptr", 0xB4, 0x0D, 0x0D, VPD_KEYWORD_PDG}, - {"pci0_time", 0xB5, 0x0D, 0x0D, VPD_KEYWORD_PDG}, - {"pci0_pll_gptr", 0xB7, 0x0D, 0x0D, VPD_KEYWORD_PDG}, - {"pci1_gptr", 0xBA, 0x0E, 0x0E, VPD_KEYWORD_PDG}, - {"pci1_time", 0xBB, 0x0E, 0x0E, VPD_KEYWORD_PDG}, - {"pci1_pll_gptr", 0xBD, 0x0E, 0x0E, VPD_KEYWORD_PDG}, - {"pci2_gptr", 0xC0, 0x0F, 0x0F, VPD_KEYWORD_PDG}, - {"pci2_time", 0xC1, 0x0F, 0x0F, VPD_KEYWORD_PDG}, - {"pci2_pll_gptr", 0xC3, 0x0F, 0x0F, VPD_KEYWORD_PDG}, - {"eq_gptr", 0xC6, 0x10, 0xFF, VPD_KEYWORD_PDG}, // x10,x15: multicast group 4 - {"eq_time", 0xC7, 0x10, 0xFF, VPD_KEYWORD_PDG}, // x10,x15: multicast group 4 - {"ex_l3_gptr", 0xCA, 0x10, 0xFF, VPD_KEYWORD_PDG}, // x10,x1B: multicast groups 5 and 6 - {"ex_l3_time", 0xCB, 0x10, 0xFF, VPD_KEYWORD_PDG}, // x10,x1B: multicast groups 5 and 6 - {"ex_l2_gptr", 0xCE, 0x10, 0xFF, VPD_KEYWORD_PDG}, // x10,x1B: multicast groups 5 and 6 - {"ex_l2_time", 0xCF, 0x10, 0xFF, VPD_KEYWORD_PDG}, // x10,x1B: multicast groups 5 and 6 - {"ex_l3_refr_gptr", 0xD1, 0x10, 0xFF, VPD_KEYWORD_PDG}, // x10,x1B: multicast groups 5 and 6 - {"ex_l3_refr_time", 0xD2, 0x10, 0x15, VPD_KEYWORD_PDG}, - {"eq_ana_gptr", 0xD4, 0x10, 0xFF, VPD_KEYWORD_PDG}, // x10,x15: multicast group 4 - {"eq_dpll_gptr", 0xD6, 0x10, 0xFF, VPD_KEYWORD_PDG}, // x10,x15: multicast group 4 - {"ec_gptr", 0xDF, 0x20, 0xFF, VPD_KEYWORD_PDG}, // x20,x37: multicast group 1 - {"ec_time", 0xE0, 0x20, 0xFF, VPD_KEYWORD_PDG}, // x20,x37: multicast group 1 + {"perv_gptr", 1, 0x01, 0x01, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, + {"perv_time", 2, 0x01, 0x01, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST}, + {"occ_gptr", 4, 0x01, 0x01, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, + {"occ_time", 5, 0x01, 0x01, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST}, + {"perv_ana_gptr", 7, 0x01, 0x01, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, + {"perv_pll_gptr", 8, 0x01, 0x01, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, + {"perv_pibnet_gptr", 16, 0x01, 0x01, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, + {"perv_pibnet_time", 17, 0x01, 0x01, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST}, + {"n0_gptr", 22, 0x02, 0x02, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, + {"n0_time", 23, 0x02, 0x02, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST}, + {"n0_nx_gptr", 25, 0x02, 0x02, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, + {"n0_nx_time", 26, 0x02, 0x02, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST}, + {"n0_cxa0_gptr", 28, 0x02, 0x02, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, + {"n0_cxa0_time", 29, 0x02, 0x02, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST}, + {"n1_gptr", 34, 0x03, 0x03, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, + {"n1_time", 35, 0x03, 0x03, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST}, + {"n1_ioo0_gptr", 37, 0x03, 0x03, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, + {"n1_ioo0_time", 38, 0x03, 0x03, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST}, + {"n1_ioo1_gptr", 40, 0x03, 0x03, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, + {"n1_ioo1_time", 41, 0x03, 0x03, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST}, + {"n1_mcs23_gptr", 43, 0x03, 0x03, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, + {"n1_mcs23_time", 44, 0x03, 0x03, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST}, + {"n2_gptr", 50, 0x04, 0x04, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, + {"n2_time", 51, 0x04, 0x04, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST}, + {"n2_cxa1_gptr", 53, 0x04, 0x04, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, + {"n2_cxa1_time", 54, 0x04, 0x04, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST}, + {"n2_psi_gptr", 56, 0x04, 0x04, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, + {"n3_gptr", 63, 0x05, 0x05, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, + {"n3_time", 64, 0x05, 0x05, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST}, + {"n3_mcs01_gptr", 66, 0x05, 0x05, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, + {"n3_mcs01_time", 67, 0x05, 0x05, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST}, + {"n3_np_gptr", 69, 0x05, 0x05, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, + {"n3_np_time", 70, 0x05, 0x05, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST}, + {"xb_gptr", 76, 0x06, 0x06, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, + {"xb_time", 77, 0x06, 0x06, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST}, + {"xb_io0_gptr", 79, 0x06, 0x06, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, + {"xb_io0_time", 80, 0x06, 0x06, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST}, + {"xb_io1_gptr", 82, 0x06, 0x06, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, + {"xb_io1_time", 83, 0x06, 0x06, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST}, + {"xb_io2_gptr", 85, 0x06, 0x06, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, + {"xb_io2_time", 86, 0x06, 0x06, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST}, + {"xb_pll_gptr", 87, 0x06, 0x06, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, + {"mc_gptr", 97, 0x07, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, //0x07, 0x08: multicast group 2 + {"mc_time", 98, 0x07, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST}, //0x07, 0x08: multicast group 2 + {"mc_iom01_gptr", 100, 0x07, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, //0x07, 0x08: multicast group 2 + {"mc_iom23_gptr", 103, 0x07, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, //0x07, 0x08: multicast group 2 + {"mc_pll_gptr", 105, 0x07, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, //0x07, 0x08: multicast group 2 + {"ob0_gptr", 119, 0x09, 0x09, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, + {"ob0_time", 120, 0x09, 0x09, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST}, + {"ob0_pll_gptr", 121, 0x09, 0x09, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, + {"ob1_gptr", 128, 0x0A, 0x0A, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, + {"ob1_time", 129, 0x0A, 0x0A, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST}, + {"ob1_pll_gptr", 130, 0x0A, 0x0A, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, + {"ob2_gptr", 137, 0x0B, 0x0B, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, + {"ob2_time", 138, 0x0B, 0x0B, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST}, + {"ob2_pll_gptr", 139, 0x0B, 0x0B, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, + {"ob3_gptr", 146, 0x0C, 0x0C, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, + {"ob3_time", 147, 0x0C, 0x0C, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST}, + {"ob3_pll_gptr", 148, 0x0C, 0x0C, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, + {"pci0_gptr", 155, 0x0D, 0x0D, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, + {"pci0_time", 156, 0x0D, 0x0D, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST}, + {"pci0_pll_gptr", 158, 0x0D, 0x0D, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, + {"pci1_gptr", 161, 0x0E, 0x0E, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, + {"pci1_time", 162, 0x0E, 0x0E, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST}, + {"pci1_pll_gptr", 164, 0x0E, 0x0E, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, + {"pci2_gptr", 167, 0x0F, 0x0F, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, + {"pci2_time", 168, 0x0F, 0x0F, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST}, + {"pci2_pll_gptr", 170, 0x0F, 0x0F, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, + {"eq_gptr", 173, 0x10, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, // x10,x15: multicast group 4 + {"eq_time", 174, 0x10, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_EQ}, // x10,x15: multicast group 4 + {"ex_l3_gptr", 177, 0x10, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, // x10,x1B: multicast groups 5 and 6 + {"ex_l3_time", 178, 0x10, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_EX}, // x10,x1B: multicast groups 5 and 6 + {"ex_l2_gptr", 181, 0x10, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, // x10,x1B: multicast groups 5 and 6 + {"ex_l2_time", 182, 0x10, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_EX}, // x10,x1B: multicast groups 5 and 6 + {"ex_l3_refr_gptr", 184, 0x10, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, // x10,x1B: multicast groups 5 and 6 + {"eq_ana_gptr", 187, 0x10, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, // x10,x15: multicast group 4 + {"eq_dpll_gptr", 189, 0x10, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, // x10,x15: multicast group 4 + {"ec_gptr", 225, 0x20, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR}, // x20,x37: multicast group 1 + {"ec_time", 226, 0x20, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_EC}, // x20,x37: multicast group 1 }; const RingIdList RING_ID_LIST_PR[] = { - /* ringName ringId chipletId mvpdKeyword */ + /* ringName ringId chipletId vpdKeyword */ /* min max */ - {"perv_repr", 0x12, 0x01, 0x01, VPD_KEYWORD_PDR}, - {"occ_repr", 0x13, 0x01, 0x01, VPD_KEYWORD_PDR}, - {"perv_pibnet_repr", 0x14, 0x01, 0x01, VPD_KEYWORD_PDR}, - {"n0_repr", 0x1E, 0x02, 0x02, VPD_KEYWORD_PDR}, - {"n0_nx_repr", 0x1F, 0x02, 0x02, VPD_KEYWORD_PDR}, - {"n0_cxa0_repr", 0x20, 0x02, 0x02, VPD_KEYWORD_PDR}, - {"n1_repr", 0x2D, 0x03, 0x03, VPD_KEYWORD_PDR}, - {"n1_ioo0_repr", 0x2E, 0x03, 0x03, VPD_KEYWORD_PDR}, - {"n1_ioo1_repr", 0x2F, 0x03, 0x03, VPD_KEYWORD_PDR}, - {"n1_mcs23_repr", 0x30, 0x03, 0x03, VPD_KEYWORD_PDR}, - {"n2_repr", 0x3A, 0x04, 0x04, VPD_KEYWORD_PDR}, - {"n2_cxa1_repr", 0x3B, 0x04, 0x04, VPD_KEYWORD_PDR}, - {"n3_repr", 0x47, 0x05, 0x05, VPD_KEYWORD_PDR}, - {"n3_mcs01_repr", 0x48, 0x05, 0x05, VPD_KEYWORD_PDR}, - {"n3_np_repr", 0x49, 0x05, 0x05, VPD_KEYWORD_PDR}, - {"xb_repr", 0x5F, 0x06, 0x06, VPD_KEYWORD_PDR}, - {"xb_io0_repr", 0x60, 0x06, 0x06, VPD_KEYWORD_PDR}, - {"xb_io1_repr", 0x61, 0x06, 0x06, VPD_KEYWORD_PDR}, - {"xb_io2_repr", 0x62, 0x06, 0x06, VPD_KEYWORD_PDR}, - {"mc_repr", 0x76, 0x07, 0x08, VPD_KEYWORD_PDR}, - {"ob0_repr", 0x86, 0x09, 0x09, VPD_KEYWORD_PDR}, - {"ob1_repr", 0x94, 0x0A, 0x0A, VPD_KEYWORD_PDR}, - {"ob2_repr", 0xA2, 0x0B, 0x0B, VPD_KEYWORD_PDR}, - {"ob3_repr", 0xB0, 0x0C, 0x0C, VPD_KEYWORD_PDR}, - {"pci0_repr", 0xB8, 0x0D, 0x0D, VPD_KEYWORD_PDR}, - {"pci1_repr", 0xBE, 0x0E, 0x0E, VPD_KEYWORD_PDR}, - {"pci2_repr", 0xC4, 0x0F, 0x0F, VPD_KEYWORD_PDR}, - {"eq_repr", 0xDA, 0x10, 0x15, VPD_KEYWORD_PDR}, - {"ex_l3_repr", 0xDB, 0x10, 0x1B, VPD_KEYWORD_PDR}, - {"ex_l2_repr", 0xDC, 0x10, 0x1B, VPD_KEYWORD_PDR}, - {"ex_l3_refr_repr", 0xDD, 0x10, 0x1B, VPD_KEYWORD_PDR}, - {"ec_repr", 0xE2, 0x20, 0x37, VPD_KEYWORD_PDR}, + {"perv_repr", 18, 0x01, 0x01, VPD_KEYWORD_PDR, VPD_RING_CLASS_NEST}, + {"occ_repr", 19, 0x01, 0x01, VPD_KEYWORD_PDR, VPD_RING_CLASS_NEST}, + {"perv_pibnet_repr", 20, 0x01, 0x01, VPD_KEYWORD_PDR, VPD_RING_CLASS_NEST}, + {"n0_repr", 30, 0x02, 0x02, VPD_KEYWORD_PDR, VPD_RING_CLASS_NEST}, + {"n0_nx_repr", 31, 0x02, 0x02, VPD_KEYWORD_PDR, VPD_RING_CLASS_NEST}, + {"n0_cxa0_repr", 32, 0x02, 0x02, VPD_KEYWORD_PDR, VPD_RING_CLASS_NEST}, + {"n1_repr", 45, 0x03, 0x03, VPD_KEYWORD_PDR, VPD_RING_CLASS_NEST}, + {"n1_ioo0_repr", 46, 0x03, 0x03, VPD_KEYWORD_PDR, VPD_RING_CLASS_NEST}, + {"n1_ioo1_repr", 47, 0x03, 0x03, VPD_KEYWORD_PDR, VPD_RING_CLASS_NEST}, + {"n1_mcs23_repr", 48, 0x03, 0x03, VPD_KEYWORD_PDR, VPD_RING_CLASS_NEST}, + {"n2_repr", 58, 0x04, 0x04, VPD_KEYWORD_PDR, VPD_RING_CLASS_NEST}, + {"n2_cxa1_repr", 59, 0x04, 0x04, VPD_KEYWORD_PDR, VPD_RING_CLASS_NEST}, + {"n3_repr", 71, 0x05, 0x05, VPD_KEYWORD_PDR, VPD_RING_CLASS_NEST}, + {"n3_mcs01_repr", 72, 0x05, 0x05, VPD_KEYWORD_PDR, VPD_RING_CLASS_NEST}, + {"n3_np_repr", 73, 0x05, 0x05, VPD_KEYWORD_PDR, VPD_RING_CLASS_NEST}, + {"xb_repr", 90, 0x06, 0x06, VPD_KEYWORD_PDR, VPD_RING_CLASS_NEST}, + {"xb_io0_repr", 91, 0x06, 0x06, VPD_KEYWORD_PDR, VPD_RING_CLASS_NEST}, + {"xb_io1_repr", 92, 0x06, 0x06, VPD_KEYWORD_PDR, VPD_RING_CLASS_NEST}, + {"xb_io2_repr", 93, 0x06, 0x06, VPD_KEYWORD_PDR, VPD_RING_CLASS_NEST}, + {"mc_repr", 113, 0x07, 0x08, VPD_KEYWORD_PDR, VPD_RING_CLASS_NEST}, + {"ob0_repr", 124, 0x09, 0x09, VPD_KEYWORD_PDR, VPD_RING_CLASS_NEST}, + {"ob1_repr", 133, 0x0A, 0x0A, VPD_KEYWORD_PDR, VPD_RING_CLASS_NEST}, + {"ob2_repr", 142, 0x0B, 0x0B, VPD_KEYWORD_PDR, VPD_RING_CLASS_NEST}, + {"ob3_repr", 151, 0x0C, 0x0C, VPD_KEYWORD_PDR, VPD_RING_CLASS_NEST}, + {"pci0_repr", 159, 0x0D, 0x0D, VPD_KEYWORD_PDR, VPD_RING_CLASS_NEST}, + {"pci1_repr", 165, 0x0E, 0x0E, VPD_KEYWORD_PDR, VPD_RING_CLASS_NEST}, + {"pci2_repr", 171, 0x0F, 0x0F, VPD_KEYWORD_PDR, VPD_RING_CLASS_NEST}, + {"eq_repr", 220, 0x10, 0x15, VPD_KEYWORD_PDR, VPD_RING_CLASS_EQ}, + {"ex_l3_refr_time", 185, 0x10, 0x15, VPD_KEYWORD_PDR, VPD_RING_CLASS_EX}, + {"ex_l3_repr", 221, 0x10, 0x15, VPD_KEYWORD_PDR, VPD_RING_CLASS_EX}, + {"ex_l2_repr", 222, 0x10, 0x15, VPD_KEYWORD_PDR, VPD_RING_CLASS_EX}, + {"ex_l3_refr_repr", 223, 0x10, 0x15, VPD_KEYWORD_PDR, VPD_RING_CLASS_EX}, + {"ec_repr", 228, 0x20, 0x37, VPD_KEYWORD_PDR, VPD_RING_CLASS_EC}, +}; + +const VPDRingList ALL_VPD_RINGS[NUM_OF_VPD_TYPES] = +{ + {RING_ID_LIST_PG, (sizeof(RING_ID_LIST_PG) / sizeof(RING_ID_LIST_PG[0]))}, + {RING_ID_LIST_PR, (sizeof(RING_ID_LIST_PR) / sizeof(RING_ID_LIST_PR[0]))}, + }; -const uint32_t RING_ID_LIST_PG_SIZE = sizeof(RING_ID_LIST_PG) / sizeof( - RING_ID_LIST_PG[0]); -const uint32_t RING_ID_LIST_PR_SIZE = sizeof(RING_ID_LIST_PR) / sizeof( - RING_ID_LIST_PR[0]); const uint32_t RING_ID_LIST_CORE_SIZE = 4; // get_vpd_ring_list_entry() retrieves the MVPD list entry based on either a ringName // or a ringId. If both are supplied, only the ringName is used. If ringName==NULL, // then the ringId is used. A pointer to the RingIdList is returned. +/* int get_vpd_ring_list_entry(const char* i_ringName, const uint8_t i_ringId, RingIdList** i_ringIdList) @@ -209,7 +213,7 @@ int get_vpd_ring_list_entry(const char* i_ringName, return rc; } - +*/ diff --git a/src/import/chips/p9/utils/imageProcs/p9_ring_identification.H b/src/import/chips/p9/utils/imageProcs/p9_ring_identification.H index e1ad15ebd..b9ddd5f4f 100644 --- a/src/import/chips/p9/utils/imageProcs/p9_ring_identification.H +++ b/src/import/chips/p9/utils/imageProcs/p9_ring_identification.H @@ -24,7 +24,6 @@ #include <stdlib.h> #include <string.h> - // General Ring ID list structure typedef struct { @@ -162,22 +161,27 @@ extern const GenRingIdList RING_ID_LIST_INSTANCE[]; extern const RingVariantOrder RING_VARIANT_ORDER[]; } -// VPD Ring ID list structure. +// MVPD Ring ID list structure. typedef struct { const char* ringName; + //@FIXME: CMO: Replace this with RingID asap. uint8_t ringId; uint8_t instanceIdMin; // the min instanceId uint8_t instanceIdMax; // the max instanceId uint8_t vpdKeyword; + uint8_t vpdRingClass; // Indicates std, gptr, or ex instance. } RingIdList; +typedef struct +{ + const RingIdList* ringIdList; + uint32_t ringIdListSize; +} VPDRingList; extern const RingIdList RING_ID_LIST_PG[], RING_ID_LIST_PR[]; -extern const uint32_t RING_ID_LIST_PG_SIZE, RING_ID_LIST_PR_SIZE; -extern const RingIdList RING_ID_LIST[]; -extern const uint32_t RING_ID_LIST_SIZE; +extern const VPDRingList ALL_VPD_RINGS[]; extern const uint32_t RING_ID_LIST_CHIP_SIZE, RING_ID_LIST_CORE_SIZE, RING_ID_LIST_CME_SIZE, RING_ID_LIST_CC_SIZE; @@ -198,10 +202,18 @@ enum VpdKeyword }; +enum VpdRingClass +{ + VPD_RING_CLASS_NEST = 0, // Indicates NEST rings + VPD_RING_CLASS_EQ = 1, // Indicates EQ rings + VPD_RING_CLASS_EX = 2, // Indicates EX rings + VPD_RING_CLASS_EC = 3, // Indicates EC rings + VPD_RING_CLASS_GPTR = 4, // Indicates GPTR #G rings + VPD_RING_CLASS_LAST = 5, +}; + -int get_vpd_ring_list_entry(const char* i_ringName, - const uint8_t i_ringId, - RingIdList** i_ringIdList); +#define MVPD_END_OF_DATA_MAGIC (uint32_t)0x454E4400 // "END " #endif |