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-rw-r--r--src/import/chips/p9a/procedures/hwp/memory/lib/mc/omi.H9
-rw-r--r--src/import/chips/p9a/procedures/hwp/memory/p9a_omi_train.C22
2 files changed, 25 insertions, 6 deletions
diff --git a/src/import/chips/p9a/procedures/hwp/memory/lib/mc/omi.H b/src/import/chips/p9a/procedures/hwp/memory/lib/mc/omi.H
index f7a9f08b3..06471052e 100644
--- a/src/import/chips/p9a/procedures/hwp/memory/lib/mc/omi.H
+++ b/src/import/chips/p9a/procedures/hwp/memory/lib/mc/omi.H
@@ -470,10 +470,11 @@ fapi_try_exit:
/// @tparam T the fapi2 target type of the target
/// @tparam TT the class traits for the omi
/// @param[in] i_target the OMI target to operate on
+/// @param[in] i_train_mode training step to enable
/// @return FAPI2_RC_SUCCESS iff ok
///
template< mss::proc_type PROC = DEFAULT_PROC_TYPE, fapi2::TargetType T, typename TT = omiTraits<T, PROC>>
-fapi2::ReturnCode setup_mc_config0_helper(const fapi2::Target<T>& i_target)
+fapi2::ReturnCode setup_mc_config0_helper(const fapi2::Target<T>& i_target, const uint8_t i_train_mode)
{
// The value is 0x8200040000152824
fapi2::buffer<uint64_t> l_val;
@@ -576,7 +577,7 @@ fapi2::ReturnCode setup_mc_config0_helper(const fapi2::Target<T>& i_target)
// CFG_DL0_TRAIN_MODE: dl0 train mode
l_val.template insertFromRight<TT::MC_REG2_DL0_CONFIG0_CFG_TRAIN_MODE, TT::MC_REG2_DL0_CONFIG0_CFG_TRAIN_MODE_LEN>
- (ENABLE_AUTO_TRAINING);
+ (i_train_mode);
// CFG_DL0_VERSION: dl0 version number
l_val.template insertFromRight<TT::MC_REG2_DL0_CONFIG0_CFG_VERSION, TT::MC_REG2_DL0_CONFIG0_CFG_VERSION_LEN>(9);
@@ -614,8 +615,8 @@ fapi2::ReturnCode setup_mc_config1_helper(const fapi2::Target<T>& i_target)
// CFG_DL0_CFG1_PREIPL_PRBS
l_val.template insertFromRight<TT::MC_REG2_DL0_CONFIG1_CFG_PREIPL_PRBS_TIME,
TT::MC_REG2_DL0_CONFIG1_CFG_PREIPL_PRBS_TIME_LEN>(l_sim ? PREIPL_PRBS_1US : PREIPL_PRBS_256MS);
-
- l_val.template writeBit<TT::MC_REG2_DL0_CONFIG1_CFG_PREIPL_PRBS_ENA, 1>(1); // Enable
+ // PRE-IPL PRBS Timing is not functional in Axone, so set to disable
+ l_val.template writeBit<TT::MC_REG2_DL0_CONFIG1_CFG_PREIPL_PRBS_ENA, 1>(0); // Disable
l_val.template insertFromRight<TT::MC_REG2_DL0_CONFIG1_CFG_LANE_WIDTH,
TT::MC_REG2_DL0_CONFIG1_CFG_LANE_WIDTH_LEN>(TL_CTR_BY_SIDEBAND);
diff --git a/src/import/chips/p9a/procedures/hwp/memory/p9a_omi_train.C b/src/import/chips/p9a/procedures/hwp/memory/p9a_omi_train.C
index f26f85a87..aeb0d9fe8 100644
--- a/src/import/chips/p9a/procedures/hwp/memory/p9a_omi_train.C
+++ b/src/import/chips/p9a/procedures/hwp/memory/p9a_omi_train.C
@@ -62,6 +62,15 @@ fapi2::ReturnCode p9a_omi_train( const fapi2::Target<fapi2::TARGET_TYPE_OMI>& i_
FAPI_INF("%s Start p9a_omi_train", mss::c_str(i_target));
const auto l_mc = mss::find_target<fapi2::TARGET_TYPE_MC>(i_target);
+ uint32_t l_prbs_time;
+ uint64_t PRBS_TIME;
+ uint8_t l_sim = 0;
+
+ FAPI_TRY( mss::attr::get_is_simulation( l_sim) );
+
+ FAPI_TRY(mss::attr::get_omi_dl_preipl_prbs_time(i_target, l_prbs_time),
+ "Error from FAPI_ATTR_GET (ATTR_OMI_DL_PREIPL_PRBS_TIME)");
+ PRBS_TIME = l_prbs_time * mss::common_timings::DELAY_1MS;
FAPI_TRY(mss::mc::setup_mc_mcn_config_helper(l_mc));
FAPI_TRY(mss::mc::setup_mc_config1_helper(i_target));
@@ -70,8 +79,17 @@ fapi2::ReturnCode p9a_omi_train( const fapi2::Target<fapi2::TARGET_TYPE_OMI>& i_
FAPI_TRY(mss::mc::setup_mc_rmt_config_helper(i_target));
// *_CONFIG0 should be the last one written, since it starts the training.
- FAPI_TRY(mss::mc::setup_mc_config0_helper(i_target));
-
+ // We are not using the pre-ipl PRBS auto training mode because it doesn't function properly in Axone
+ // Enable training state 6 to send TS3
+ FAPI_TRY(mss::mc::setup_mc_config0_helper(i_target, mss::mc::train_mode::TX_TRAINING_STATE3));
+ // Set configurable delay based on the PRBS ATTR and SIM mode
+ FAPI_TRY(fapi2::delay(PRBS_TIME, mss::common_timings::DELAY_1US));
+ FAPI_DBG("OMI Training Pre-ipl PRBS Time = %dns",
+ (l_sim ? mss::common_timings::DELAY_1US : PRBS_TIME));
+ // Enable training state 1 to send Pattern A
+ FAPI_TRY(mss::mc::setup_mc_config0_helper(i_target, mss::mc::train_mode::TX_PATTERN_A));
+ // Enable training state 8 for auto training
+ FAPI_TRY(mss::mc::setup_mc_config0_helper(i_target, mss::mc::train_mode::ENABLE_AUTO_TRAINING));
fapi_try_exit:
return fapi2::current_err;
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