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-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H27
-rwxr-xr-xsrc/import/chips/p9/procedures/xml/attribute_info/memory_mrw_attributes.xml21
2 files changed, 45 insertions, 3 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H
index 98a0452b1..0fc3992bc 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H
@@ -19489,8 +19489,9 @@ fapi_try_exit:
/// @param[out] uint8_t& reference to store the value
/// @note Generated by gen_accessors.pl generateParameters (SYSTEM)
/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note Capable power control settings. In
-/// MRW.
+/// @note Memory power control settings programmed during IPL Used by OCC when exiting
+/// idle powersave
+/// mode
///
inline fapi2::ReturnCode mrw_power_control_requested(uint8_t& o_value)
{
@@ -19506,6 +19507,28 @@ fapi_try_exit:
}
///
+/// @brief ATTR_MSS_MRW_IDLE_POWER_CONTROL_REQUESTED getter
+/// @param[out] uint8_t& reference to store the value
+/// @note Generated by gen_accessors.pl generateParameters (SYSTEM)
+/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
+/// @note Memory power control settings for IDLE powersave mode Used by OCC when entering
+/// idle powersave
+/// mode
+///
+inline fapi2::ReturnCode mrw_idle_power_control_requested(uint8_t& o_value)
+{
+
+ FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_MRW_IDLE_POWER_CONTROL_REQUESTED, fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>(),
+ o_value) );
+ return fapi2::current_err;
+
+fapi_try_exit:
+ FAPI_ERR("failed accessing ATTR_MSS_MRW_IDLE_POWER_CONTROL_REQUESTED: 0x%lx (system target)",
+ uint64_t(fapi2::current_err));
+ return fapi2::current_err;
+}
+
+///
/// @brief ATTR_MSS_MRW_VMEM_REGULATOR_POWER_LIMIT_PER_DIMM_ADJ_ENABLE getter
/// @param[out] uint8_t& reference to store the value
/// @note Generated by gen_accessors.pl generateParameters (SYSTEM)
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/memory_mrw_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/memory_mrw_attributes.xml
index f5735ae58..6c35ef2ac 100755
--- a/src/import/chips/p9/procedures/xml/attribute_info/memory_mrw_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/memory_mrw_attributes.xml
@@ -245,7 +245,10 @@
<attribute>
<id>ATTR_MSS_MRW_POWER_CONTROL_REQUESTED</id>
<targetType>TARGET_TYPE_SYSTEM</targetType>
- <description>Capable power control settings. In MRW.</description>
+ <description>
+ Memory power control settings programmed during IPL
+ Used by OCC when exiting idle powersave mode
+ </description>
<valueType>uint8</valueType>
<enum>OFF = 0x00, POWER_DOWN = 0x01, STR = 0x02, PD_AND_STR = 0x03</enum>
<platInit/>
@@ -256,6 +259,22 @@
</attribute>
<attribute>
+ <id>ATTR_MSS_MRW_IDLE_POWER_CONTROL_REQUESTED</id>
+ <targetType>TARGET_TYPE_SYSTEM</targetType>
+ <description>
+ Memory power control settings for IDLE powersave mode
+ Used by OCC when entering idle powersave mode
+ </description>
+ <valueType>uint8</valueType>
+ <enum>OFF = 0x00, POWER_DOWN = 0x01, STR = 0x02, PD_AND_STR = 0x03</enum>
+ <platInit/>
+ <default>OFF</default>
+ <initToZero/>
+ <!-- little comment to tell us this might change during power/thermal implemetation -->
+ <mssAccessorName>mrw_idle_power_control_requested</mssAccessorName>
+ </attribute>
+
+ <attribute>
<id>ATTR_MSS_MRW_VMEM_REGULATOR_POWER_LIMIT_PER_DIMM_ADJ_ENABLE</id>
<targetType>TARGET_TYPE_SYSTEM</targetType>
<description>
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